DMAENGINE: ste_dma40: code clean-up
This patch includes non functional code clean up changes, file header updates and a few magic numbers got defined. Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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4 changed files with 56 additions and 65 deletions
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@ -1,10 +1,8 @@
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/*
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* arch/arm/plat-nomadik/include/plat/ste_dma40.h
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*
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* Copyright (C) ST-Ericsson 2007-2010
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* Copyright (C) ST-Ericsson SA 2007-2010
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* Author: Per Friden <per.friden@stericsson.com> for ST-Ericsson
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
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* License terms: GNU General Public License (GPL) version 2
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* Author: Per Friden <per.friden@stericsson.com>
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com>
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*/
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@ -73,6 +71,9 @@
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#define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8
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#define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16
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/* Maximum number of possible physical channels */
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#define STEDMA40_MAX_PHYS 32
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enum stedma40_flow_ctrl {
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STEDMA40_NO_FLOW_CTRL,
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STEDMA40_FLOW_CTRL,
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@ -160,7 +161,7 @@ struct stedma40_platform_data {
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struct stedma40_chan_cfg *memcpy_conf_phy;
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struct stedma40_chan_cfg *memcpy_conf_log;
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unsigned int llis_per_log;
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int disabled_channels[8];
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int disabled_channels[STEDMA40_MAX_PHYS];
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};
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/**
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@ -1,11 +1,8 @@
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/*
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* driver/dma/ste_dma40.c
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*
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* Copyright (C) ST-Ericsson 2007-2010
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* Copyright (C) ST-Ericsson SA 2007-2010
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* Author: Per Friden <per.friden@stericsson.com> for ST-Ericsson
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
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* License terms: GNU General Public License (GPL) version 2
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* Author: Per Friden <per.friden@stericsson.com>
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com>
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*
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*/
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#include <linux/kernel.h>
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@ -90,7 +87,6 @@ struct d40_lli_pool {
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* @txd: DMA engine struct. Used for among other things for communication
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* during a transfer.
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* @node: List entry.
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* @dir: The transfer direction of this job.
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* @is_in_client_list: true if the client owns this descriptor.
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* @is_hw_linked: true if this job will automatically be continued for
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* the previous one.
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@ -112,7 +108,6 @@ struct d40_desc {
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struct dma_async_tx_descriptor txd;
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struct list_head node;
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enum dma_data_direction dir;
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bool is_in_client_list;
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bool is_hw_linked;
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};
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@ -149,9 +144,7 @@ struct d40_lcla_pool {
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* this physical channel. Can also be free or physically allocated.
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* @allocated_dst: Same as for src but is dst.
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* allocated_dst and allocated_src uses the D40_ALLOC* defines as well as
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* event line number. Both allocated_src and allocated_dst can not be
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* allocated to a physical channel, since the interrupt handler has then
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* no way of figure out which one the interrupt belongs to.
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* event line number.
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*/
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struct d40_phy_res {
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spinlock_t lock;
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@ -237,7 +230,6 @@ struct d40_chan {
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* @dma_both: dma_device channels that can do both memcpy and slave transfers.
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* @dma_slave: dma_device channels that can do only do slave transfers.
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* @dma_memcpy: dma_device channels that can do only do memcpy transfers.
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* @phy_chans: Room for all possible physical channels in system.
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* @log_chans: Room for all possible logical channels in system.
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* @lookup_log_chans: Used to map interrupt number to logical channel. Points
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* to log_chans entries.
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@ -500,7 +492,8 @@ static int d40_lcla_id_get(struct d40_chan *d40c)
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static int d40_channel_execute_command(struct d40_chan *d40c,
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enum d40_command command)
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{
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int status, i;
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u32 status;
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int i;
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void __iomem *active_reg;
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int ret = 0;
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unsigned long flags;
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@ -568,16 +561,12 @@ static void d40_term_all(struct d40_chan *d40c)
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/* Release active descriptors */
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while ((d40d = d40_first_active_get(d40c))) {
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d40_desc_remove(d40d);
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/* Return desc to free-list */
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d40_desc_free(d40c, d40d);
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}
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/* Release queued descriptors waiting for transfer */
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while ((d40d = d40_first_queued(d40c))) {
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d40_desc_remove(d40d);
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/* Return desc to free-list */
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d40_desc_free(d40c, d40d);
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}
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@ -973,9 +962,6 @@ static void dma_tc_handle(struct d40_chan *d40c)
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{
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struct d40_desc *d40d;
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if (!d40c->phy_chan)
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return;
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/* Get first active entry from list */
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d40d = d40_first_active_get(d40c);
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@ -1001,7 +987,7 @@ static void dma_tc_handle(struct d40_chan *d40c)
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static void dma_tasklet(unsigned long data)
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{
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struct d40_chan *d40c = (struct d40_chan *) data;
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struct d40_desc *d40d_fin;
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struct d40_desc *d40d;
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unsigned long flags;
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dma_async_tx_callback callback;
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void *callback_param;
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@ -1009,12 +995,12 @@ static void dma_tasklet(unsigned long data)
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spin_lock_irqsave(&d40c->lock, flags);
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/* Get first active entry from list */
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d40d_fin = d40_first_active_get(d40c);
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d40d = d40_first_active_get(d40c);
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if (d40d_fin == NULL)
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if (d40d == NULL)
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goto err;
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d40c->completed = d40d_fin->txd.cookie;
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d40c->completed = d40d->txd.cookie;
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/*
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* If terminating a channel pending_tx is set to zero.
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@ -1026,19 +1012,18 @@ static void dma_tasklet(unsigned long data)
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}
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/* Callback to client */
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callback = d40d_fin->txd.callback;
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callback_param = d40d_fin->txd.callback_param;
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callback = d40d->txd.callback;
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callback_param = d40d->txd.callback_param;
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if (async_tx_test_ack(&d40d_fin->txd)) {
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d40_pool_lli_free(d40d_fin);
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d40_desc_remove(d40d_fin);
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/* Return desc to free-list */
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d40_desc_free(d40c, d40d_fin);
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if (async_tx_test_ack(&d40d->txd)) {
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d40_pool_lli_free(d40d);
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d40_desc_remove(d40d);
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d40_desc_free(d40c, d40d);
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} else {
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if (!d40d_fin->is_in_client_list) {
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d40_desc_remove(d40d_fin);
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list_add_tail(&d40d_fin->node, &d40c->client);
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d40d_fin->is_in_client_list = true;
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if (!d40d->is_in_client_list) {
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d40_desc_remove(d40d);
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list_add_tail(&d40d->node, &d40c->client);
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d40d->is_in_client_list = true;
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}
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}
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@ -1049,7 +1034,7 @@ static void dma_tasklet(unsigned long data)
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spin_unlock_irqrestore(&d40c->lock, flags);
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if (callback && (d40d_fin->txd.flags & DMA_PREP_INTERRUPT))
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if (callback && (d40d->txd.flags & DMA_PREP_INTERRUPT))
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callback(callback_param);
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return;
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@ -1127,7 +1112,6 @@ static irqreturn_t d40_handle_interrupt(int irq, void *data)
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return IRQ_HANDLED;
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}
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static int d40_validate_conf(struct d40_chan *d40c,
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struct stedma40_chan_cfg *conf)
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{
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@ -1432,7 +1416,6 @@ static int d40_free_dma(struct d40_chan *d40c)
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list_for_each_entry_safe(d, _d, &d40c->client, node) {
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d40_pool_lli_free(d);
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d40_desc_remove(d);
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/* Return desc to free-list */
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d40_desc_free(d40c, d);
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}
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@ -2793,8 +2776,10 @@ static int __init d40_lcla_allocate(struct d40_base *base)
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if (i < MAX_LCLA_ALLOC_ATTEMPTS) {
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base->lcla_pool.base = (void *)page_list[i];
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} else {
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/* After many attempts, no succees with finding the correct
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* alignment try with allocating a big buffer */
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/*
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* After many attempts and no succees with finding the correct
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* alignment, try with allocating a big buffer.
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*/
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dev_warn(base->dev,
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"[%s] Failed to get %d pages @ 18 bit align.\n",
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__func__, base->lcla_pool.pages);
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if (!base->lcla_pool.base_unaligned && base->lcla_pool.base)
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free_pages((unsigned long)base->lcla_pool.base,
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base->lcla_pool.pages);
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if (base->lcla_pool.base_unaligned)
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kfree(base->lcla_pool.base_unaligned);
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kfree(base->lcla_pool.base_unaligned);
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if (base->phy_lcpa)
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release_mem_region(base->phy_lcpa,
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base->lcpa_size);
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@ -1,10 +1,8 @@
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/*
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* driver/dma/ste_dma40_ll.c
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*
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* Copyright (C) ST-Ericsson 2007-2010
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* Copyright (C) ST-Ericsson SA 2007-2010
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* Author: Per Friden <per.friden@stericsson.com> for ST-Ericsson
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
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* License terms: GNU General Public License (GPL) version 2
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* Author: Per Friden <per.friden@stericsson.com>
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com>
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*/
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#include <linux/kernel.h>
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/*
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* driver/dma/ste_dma40_ll.h
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*
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* Copyright (C) ST-Ericsson 2007-2010
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* Copyright (C) ST-Ericsson SA 2007-2010
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* Author: Per Friden <per.friden@stericsson.com> for ST-Ericsson SA
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson SA
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* License terms: GNU General Public License (GPL) version 2
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* Author: Per Friden <per.friden@stericsson.com>
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com>
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*/
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#ifndef STE_DMA40_LL_H
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#define STE_DMA40_LL_H
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/* Physical channels */
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void d40_phy_cfg(struct stedma40_chan_cfg *cfg,
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u32 *src_cfg, u32 *dst_cfg, bool is_log);
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u32 *src_cfg,
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u32 *dst_cfg,
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bool is_log);
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void d40_log_cfg(struct stedma40_chan_cfg *cfg,
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u32 *lcsp1, u32 *lcsp2);
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u32 *lcsp1,
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u32 *lcsp2);
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int d40_phy_sg_to_lli(struct scatterlist *sg,
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int sg_len,
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/* Logical channels */
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void d40_log_fill_lli(struct d40_log_lli *lli,
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dma_addr_t data, u32 data_size,
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u32 lli_next_off, u32 reg_cfg,
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dma_addr_t data,
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u32 data_size,
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u32 lli_next_off,
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u32 reg_cfg,
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u32 data_width,
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bool term_int, bool addr_inc);
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bool term_int,
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bool addr_inc);
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int d40_log_sg_to_dev(struct d40_lcla_elem *lcla,
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struct scatterlist *sg,
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u32 src_data_width,
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u32 dst_data_width,
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enum dma_data_direction direction,
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dma_addr_t dev_addr, int max_len,
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dma_addr_t dev_addr,
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int max_len,
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int llis_per_log);
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int d40_log_lli_write(struct d40_log_lli_full *lcpa,
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struct d40_log_lli *lli_sg,
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u32 lcsp13, /* src or dst*/
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u32 data_width,
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int max_len, int llis_per_log);
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int max_len,
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int llis_per_log);
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#endif /* STE_DMA40_LLI_H */
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