ide: convert ide_find_best_mode() users to use ide_max_dma_mode()
ide-timing.h: * remove handling of DMA modes from ide_find_best_mode() and rename it to ide_find_best_pio_mode() * drop no longer needed "map" argument from ide_find_best_pio_mode() and delete needless ->id check * remove no longer needed XFER_SWDMA and XFER_UDMA* defines au1xxx-ide.c: * use ide_max_dma_mode() instead of ide_find_best_mode() * remove needless CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA #ifdef amd74xx.c: * store UDMA masks in amd_ide_chip[] and while at it make "base" field to be u8 instead of unsigned long * convert the driver to use UDMA masks from amd_ide_chip[] * use ide_max_dma_mode() and ide_find_best_pio_mode() instead of ide_find_best_mode() * delete stale comment from amd74xx_ide_dma_check() * remove no longer needed AMD_UDMA* defines via82cxxx.c: * remove unused DISPLAY_VIA_TIMINGS define * store UDMA masks in via_isa_bridges[] and while at it make "flags" field to be u8 instead of u16 * convert the driver to use UDMA masks from via_isa_bridges[] * use ide_max_dma_mode() and ide_find_best_pio_mode() instead of ide_find_best_mode() * remove no longer needed VIA_UDMA* defines pmac.c: * use ide_max_dma_mode() instead of ide_find_best_mode() There should be no functionality changes caused by this patch. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Reviewed-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
This commit is contained in:
Bartlomiej Zolnierkiewicz
parent
15a4f943e7
commit
75b1d97535
5 changed files with 123 additions and 215 deletions
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@ -102,66 +102,16 @@ static struct ide_timing ide_timing[] = {
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#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
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#define XFER_MODE 0xf0
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#define XFER_UDMA_133 0x48
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#define XFER_UDMA_100 0x44
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#define XFER_UDMA_66 0x42
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#define XFER_UDMA 0x40
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#define XFER_MWDMA 0x20
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#define XFER_SWDMA 0x10
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#define XFER_EPIO 0x01
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#define XFER_PIO 0x00
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static short ide_find_best_mode(ide_drive_t *drive, int map)
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static short ide_find_best_pio_mode(ide_drive_t *drive)
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{
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struct hd_driveid *id = drive->id;
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short best = 0;
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if (!id)
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return XFER_PIO_SLOW;
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if ((map & XFER_UDMA) && (id->field_valid & 4)) { /* Want UDMA and UDMA bitmap valid */
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if ((map & XFER_UDMA_133) == XFER_UDMA_133)
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if ((best = (id->dma_ultra & 0x0040) ? XFER_UDMA_6 : 0)) return best;
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if ((map & XFER_UDMA_100) == XFER_UDMA_100)
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if ((best = (id->dma_ultra & 0x0020) ? XFER_UDMA_5 : 0)) return best;
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if ((map & XFER_UDMA_66) == XFER_UDMA_66)
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if ((best = (id->dma_ultra & 0x0010) ? XFER_UDMA_4 :
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(id->dma_ultra & 0x0008) ? XFER_UDMA_3 : 0)) return best;
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if ((best = (id->dma_ultra & 0x0004) ? XFER_UDMA_2 :
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(id->dma_ultra & 0x0002) ? XFER_UDMA_1 :
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(id->dma_ultra & 0x0001) ? XFER_UDMA_0 : 0)) return best;
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}
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if ((map & XFER_MWDMA) && (id->field_valid & 2)) { /* Want MWDMA and drive has EIDE fields */
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if ((best = (id->dma_mword & 0x0004) ? XFER_MW_DMA_2 :
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(id->dma_mword & 0x0002) ? XFER_MW_DMA_1 :
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(id->dma_mword & 0x0001) ? XFER_MW_DMA_0 : 0)) return best;
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}
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if (map & XFER_SWDMA) { /* Want SWDMA */
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if (id->field_valid & 2) { /* EIDE SWDMA */
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if ((best = (id->dma_1word & 0x0004) ? XFER_SW_DMA_2 :
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(id->dma_1word & 0x0002) ? XFER_SW_DMA_1 :
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(id->dma_1word & 0x0001) ? XFER_SW_DMA_0 : 0)) return best;
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}
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if (id->capability & 1) { /* Pre-EIDE style SWDMA */
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if ((best = (id->tDMA == 2) ? XFER_SW_DMA_2 :
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(id->tDMA == 1) ? XFER_SW_DMA_1 :
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(id->tDMA == 0) ? XFER_SW_DMA_0 : 0)) return best;
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}
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}
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if ((map & XFER_EPIO) && (id->field_valid & 2)) { /* EIDE PIO modes */
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if (id->field_valid & 2) { /* EIDE PIO modes */
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if ((best = (drive->id->eide_pio_modes & 4) ? XFER_PIO_5 :
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(drive->id->eide_pio_modes & 2) ? XFER_PIO_4 :
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@ -262,7 +212,7 @@ static int ide_timing_compute(ide_drive_t *drive, short speed, struct ide_timing
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*/
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if ((speed & XFER_MODE) != XFER_PIO) {
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ide_timing_compute(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO), &p, T, UT);
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ide_timing_compute(drive, ide_find_best_pio_mode(drive), &p, T, UT);
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ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
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}
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@ -381,9 +381,7 @@ static int auide_dma_setup(ide_drive_t *drive)
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static int auide_dma_check(ide_drive_t *drive)
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{
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u8 speed;
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#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
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u8 speed = ide_max_dma_mode(drive);
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if( dbdma_init_done == 0 ){
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auide_hwif.white_list = ide_in_drive_list(drive->id,
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@ -394,7 +392,6 @@ static int auide_dma_check(ide_drive_t *drive)
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auide_ddma_init(&auide_hwif);
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dbdma_init_done = 1;
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}
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#endif
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/* Is the drive in our DMA black list? */
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@ -409,8 +406,6 @@ static int auide_dma_check(ide_drive_t *drive)
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else
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drive->using_dma = 1;
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speed = ide_find_best_mode(drive, XFER_PIO | XFER_MWDMA);
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if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
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return 0;
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@ -1,10 +1,11 @@
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/*
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* Version 2.16
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* Version 2.20
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*
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* AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04
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* IDE driver for Linux.
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*
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* Copyright (c) 2000-2002 Vojtech Pavlik
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* Copyright (c) 2007 Bartlomiej Zolnierkiewicz
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*
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* Based on the work of:
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* Andre Hedrick
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@ -37,11 +38,6 @@
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#define AMD_ADDRESS_SETUP (0x0c + amd_config->base)
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#define AMD_UDMA_TIMING (0x10 + amd_config->base)
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#define AMD_UDMA 0x07
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#define AMD_UDMA_33 0x01
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#define AMD_UDMA_66 0x02
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#define AMD_UDMA_100 0x03
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#define AMD_UDMA_133 0x04
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#define AMD_CHECK_SWDMA 0x08
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#define AMD_BAD_SWDMA 0x10
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#define AMD_BAD_FIFO 0x20
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@ -53,32 +49,33 @@
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static struct amd_ide_chip {
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unsigned short id;
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unsigned long base;
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unsigned char flags;
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u8 base;
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u8 udma_mask;
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u8 flags;
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} amd_ide_chips[] = {
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{ PCI_DEVICE_ID_AMD_COBRA_7401, 0x40, AMD_UDMA_33 | AMD_BAD_SWDMA },
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{ PCI_DEVICE_ID_AMD_VIPER_7409, 0x40, AMD_UDMA_66 | AMD_CHECK_SWDMA },
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{ PCI_DEVICE_ID_AMD_VIPER_7411, 0x40, AMD_UDMA_100 | AMD_BAD_FIFO },
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{ PCI_DEVICE_ID_AMD_OPUS_7441, 0x40, AMD_UDMA_100 },
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{ PCI_DEVICE_ID_AMD_8111_IDE, 0x40, AMD_UDMA_133 | AMD_CHECK_SERENADE },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x50, AMD_UDMA_100 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, AMD_UDMA_100 },
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{ PCI_DEVICE_ID_AMD_COBRA_7401, 0x40, ATA_UDMA2, AMD_BAD_SWDMA },
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{ PCI_DEVICE_ID_AMD_VIPER_7409, 0x40, ATA_UDMA4, AMD_CHECK_SWDMA },
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{ PCI_DEVICE_ID_AMD_VIPER_7411, 0x40, ATA_UDMA5, AMD_BAD_FIFO },
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{ PCI_DEVICE_ID_AMD_OPUS_7441, 0x40, ATA_UDMA5, },
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{ PCI_DEVICE_ID_AMD_8111_IDE, 0x40, ATA_UDMA6, AMD_CHECK_SERENADE },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x50, ATA_UDMA5, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE, 0x50, ATA_UDMA6, },
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{ PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, ATA_UDMA5, },
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{ 0 }
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};
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@ -87,7 +84,7 @@ static ide_pci_device_t *amd_chipset;
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static unsigned int amd_80w;
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static unsigned int amd_clock;
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static char *amd_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
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static char *amd_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
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static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 };
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/*
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@ -128,7 +125,7 @@ static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count)
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pci_read_config_byte(dev, PCI_REVISION_ID, &t);
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amd_print("Revision: IDE %#x", t);
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amd_print("Highest DMA rate: %s", amd_dma[amd_config->flags & AMD_UDMA]);
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amd_print("Highest DMA rate: UDMA%s", amd_dma[fls(amd_config->udma_mask) - 1]);
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amd_print("BM-DMA base: %#lx", amd_base);
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amd_print("PCI clock: %d.%dMHz", amd_clock / 1000, amd_clock / 100 % 10);
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@ -221,12 +218,12 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi
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pci_write_config_byte(dev, AMD_DRIVE_TIMING + (3 - dn),
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((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
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switch (amd_config->flags & AMD_UDMA) {
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case AMD_UDMA_33: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
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case AMD_UDMA_66: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break;
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case AMD_UDMA_100: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break;
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case AMD_UDMA_133: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break;
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default: return;
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switch (amd_config->udma_mask) {
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case ATA_UDMA2: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
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case ATA_UDMA4: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break;
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case ATA_UDMA5: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break;
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case ATA_UDMA6: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break;
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default: return;
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}
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pci_write_config_byte(dev, AMD_UDMA_TIMING + (3 - dn), t);
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@ -248,7 +245,7 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed)
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ide_config_drive_speed(drive, speed);
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T = 1000000000 / amd_clock;
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UT = T / min_t(int, max_t(int, amd_config->flags & AMD_UDMA, 1), 2);
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UT = (amd_config->udma_mask == ATA_UDMA2) ? T : (T / 2);
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ide_timing_compute(drive, speed, &t, T, UT);
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@ -277,29 +274,19 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed)
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static void amd74xx_tune_drive(ide_drive_t *drive, u8 pio)
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{
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if (pio == 255) {
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amd_set_drive(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
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amd_set_drive(drive, ide_find_best_pio_mode(drive));
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return;
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}
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amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5));
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}
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/*
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* amd74xx_dmaproc() is a callback from upper layers that can do
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* a lot, but we use it for DMA/PIO tuning only, delegating everything
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* else to the default ide_dmaproc().
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*/
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static int amd74xx_ide_dma_check(ide_drive_t *drive)
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{
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int w80 = HWIF(drive)->udma_four;
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u8 speed = ide_max_dma_mode(drive);
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u8 speed = ide_find_best_mode(drive,
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XFER_PIO | XFER_EPIO | XFER_MWDMA | XFER_UDMA |
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((amd_config->flags & AMD_BAD_SWDMA) ? 0 : XFER_SWDMA) |
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(w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_66 ? XFER_UDMA_66 : 0) |
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(w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_100 ? XFER_UDMA_100 : 0) |
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(w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_133 ? XFER_UDMA_133 : 0));
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if (speed == 0)
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speed = ide_find_best_pio_mode(drive);
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amd_set_drive(drive, speed);
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@ -334,10 +321,10 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
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* Check 80-wire cable presence.
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*/
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switch (amd_config->flags & AMD_UDMA) {
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switch (amd_config->udma_mask) {
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case AMD_UDMA_133:
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case AMD_UDMA_100:
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case ATA_UDMA6:
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case ATA_UDMA5:
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pci_read_config_byte(dev, AMD_CABLE_DETECT, &t);
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pci_read_config_dword(dev, AMD_UDMA_TIMING, &u);
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amd_80w = ((t & 0x3) ? 1 : 0) | ((t & 0xc) ? 2 : 0);
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@ -349,7 +336,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
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}
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break;
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case AMD_UDMA_66:
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case ATA_UDMA4:
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/* no host side cable detection */
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amd_80w = 0x03;
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break;
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@ -370,7 +357,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
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if ((amd_config->flags & AMD_CHECK_SERENADE) &&
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dev->subsystem_vendor == PCI_VENDOR_ID_AMD &&
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dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE)
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amd_config->flags = AMD_UDMA_100;
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amd_config->udma_mask = ATA_UDMA5;
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/*
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* Determine the system bus clock.
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|
|
@ -395,8 +382,9 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
|
|||
*/
|
||||
|
||||
pci_read_config_byte(dev, PCI_REVISION_ID, &t);
|
||||
printk(KERN_INFO "%s: %s (rev %02x) %s controller\n",
|
||||
amd_chipset->name, pci_name(dev), t, amd_dma[amd_config->flags & AMD_UDMA]);
|
||||
printk(KERN_INFO "%s: %s (rev %02x) UDMA%s controller\n",
|
||||
amd_chipset->name, pci_name(dev), t,
|
||||
amd_dma[fls(amd_config->udma_mask) - 1]);
|
||||
|
||||
/*
|
||||
* Register /proc/ide/amd74xx entry
|
||||
|
|
@ -437,9 +425,11 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
|
|||
return;
|
||||
|
||||
hwif->atapi_dma = 1;
|
||||
hwif->ultra_mask = 0x7f;
|
||||
hwif->mwdma_mask = 0x07;
|
||||
hwif->swdma_mask = 0x07;
|
||||
|
||||
hwif->ultra_mask = amd_config->udma_mask;
|
||||
hwif->mwdma_mask = 0x07;
|
||||
if ((amd_config->flags & AMD_BAD_SWDMA) == 0)
|
||||
hwif->swdma_mask = 0x07;
|
||||
|
||||
if (!hwif->udma_four)
|
||||
hwif->udma_four = (amd_80w >> hwif->channel) & 1;
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
*
|
||||
* Version 3.38
|
||||
* Version 3.40
|
||||
*
|
||||
* VIA IDE driver for Linux. Supported southbridges:
|
||||
*
|
||||
|
|
@ -9,6 +9,7 @@
|
|||
* vt8235, vt8237, vt8237a
|
||||
*
|
||||
* Copyright (c) 2000-2002 Vojtech Pavlik
|
||||
* Copyright (c) 2007 Bartlomiej Zolnierkiewicz
|
||||
*
|
||||
* Based on the work of:
|
||||
* Michel Aubry
|
||||
|
|
@ -41,8 +42,6 @@
|
|||
|
||||
#include "ide-timing.h"
|
||||
|
||||
#define DISPLAY_VIA_TIMINGS
|
||||
|
||||
#define VIA_IDE_ENABLE 0x40
|
||||
#define VIA_IDE_CONFIG 0x41
|
||||
#define VIA_FIFO_CONFIG 0x43
|
||||
|
|
@ -54,18 +53,12 @@
|
|||
#define VIA_ADDRESS_SETUP 0x4c
|
||||
#define VIA_UDMA_TIMING 0x50
|
||||
|
||||
#define VIA_UDMA 0x007
|
||||
#define VIA_UDMA_NONE 0x000
|
||||
#define VIA_UDMA_33 0x001
|
||||
#define VIA_UDMA_66 0x002
|
||||
#define VIA_UDMA_100 0x003
|
||||
#define VIA_UDMA_133 0x004
|
||||
#define VIA_BAD_PREQ 0x010 /* Crashes if PREQ# till DDACK# set */
|
||||
#define VIA_BAD_CLK66 0x020 /* 66 MHz clock doesn't work correctly */
|
||||
#define VIA_SET_FIFO 0x040 /* Needs to have FIFO split set */
|
||||
#define VIA_NO_UNMASK 0x080 /* Doesn't work with IRQ unmasking on */
|
||||
#define VIA_BAD_ID 0x100 /* Has wrong vendor ID (0x1107) */
|
||||
#define VIA_BAD_AST 0x200 /* Don't touch Address Setup Timing */
|
||||
#define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
|
||||
#define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
|
||||
#define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
|
||||
#define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
|
||||
#define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
|
||||
#define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
|
||||
|
||||
/*
|
||||
* VIA SouthBridge chips.
|
||||
|
|
@ -76,36 +69,37 @@ static struct via_isa_bridge {
|
|||
u16 id;
|
||||
u8 rev_min;
|
||||
u8 rev_max;
|
||||
u16 flags;
|
||||
u8 udma_mask;
|
||||
u8 flags;
|
||||
} via_isa_bridges[] = {
|
||||
{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
|
||||
{ "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
|
||||
{ "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
|
||||
{ "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
|
||||
{ "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
|
||||
{ "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
|
||||
{ "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
|
||||
{ "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
|
||||
{ "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
|
||||
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
|
||||
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
|
||||
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
|
||||
{ "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
|
||||
{ "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
|
||||
{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
|
||||
{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
|
||||
{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
||||
{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
||||
{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
||||
{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
||||
{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
||||
{ "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
||||
{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
||||
{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
|
||||
{ "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
|
||||
{ "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
|
||||
{ "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
|
||||
{ "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
|
||||
{ "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
|
||||
{ "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
|
||||
{ "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
|
||||
{ "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
|
||||
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
|
||||
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
|
||||
{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
|
||||
{ "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
|
||||
{ "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
|
||||
{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
|
||||
{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
|
||||
{ NULL }
|
||||
};
|
||||
|
||||
static unsigned int via_clock;
|
||||
static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
|
||||
static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
|
||||
|
||||
struct via82cxxx_dev
|
||||
{
|
||||
|
|
@ -140,12 +134,12 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
|
|||
pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
|
||||
((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
|
||||
|
||||
switch (vdev->via_config->flags & VIA_UDMA) {
|
||||
case VIA_UDMA_33: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
|
||||
case VIA_UDMA_66: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
|
||||
case VIA_UDMA_100: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
|
||||
case VIA_UDMA_133: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
|
||||
default: return;
|
||||
switch (vdev->via_config->udma_mask) {
|
||||
case ATA_UDMA2: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
|
||||
case ATA_UDMA4: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
|
||||
case ATA_UDMA5: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
|
||||
case ATA_UDMA6: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
|
||||
default: return;
|
||||
}
|
||||
|
||||
pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
|
||||
|
|
@ -173,12 +167,12 @@ static int via_set_drive(ide_drive_t *drive, u8 speed)
|
|||
|
||||
T = 1000000000 / via_clock;
|
||||
|
||||
switch (vdev->via_config->flags & VIA_UDMA) {
|
||||
case VIA_UDMA_33: UT = T; break;
|
||||
case VIA_UDMA_66: UT = T/2; break;
|
||||
case VIA_UDMA_100: UT = T/3; break;
|
||||
case VIA_UDMA_133: UT = T/4; break;
|
||||
default: UT = T;
|
||||
switch (vdev->via_config->udma_mask) {
|
||||
case ATA_UDMA2: UT = T; break;
|
||||
case ATA_UDMA4: UT = T/2; break;
|
||||
case ATA_UDMA5: UT = T/3; break;
|
||||
case ATA_UDMA6: UT = T/4; break;
|
||||
default: UT = T;
|
||||
}
|
||||
|
||||
ide_timing_compute(drive, speed, &t, T, UT);
|
||||
|
|
@ -208,8 +202,7 @@ static int via_set_drive(ide_drive_t *drive, u8 speed)
|
|||
static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
|
||||
{
|
||||
if (pio == 255) {
|
||||
via_set_drive(drive,
|
||||
ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
|
||||
via_set_drive(drive, ide_find_best_pio_mode(drive));
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -226,16 +219,10 @@ static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
|
|||
|
||||
static int via82cxxx_ide_dma_check (ide_drive_t *drive)
|
||||
{
|
||||
ide_hwif_t *hwif = HWIF(drive);
|
||||
struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
|
||||
u16 w80 = hwif->udma_four;
|
||||
u8 speed = ide_max_dma_mode(drive);
|
||||
|
||||
u16 speed = ide_find_best_mode(drive,
|
||||
XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
|
||||
(vdev->via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
|
||||
(w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
|
||||
(w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) |
|
||||
(w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0));
|
||||
if (speed == 0)
|
||||
speed = ide_find_best_pio_mode(drive);
|
||||
|
||||
via_set_drive(drive, speed);
|
||||
|
||||
|
|
@ -272,8 +259,8 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
|
|||
{
|
||||
int i;
|
||||
|
||||
switch (vdev->via_config->flags & VIA_UDMA) {
|
||||
case VIA_UDMA_66:
|
||||
switch (vdev->via_config->udma_mask) {
|
||||
case ATA_UDMA4:
|
||||
for (i = 24; i >= 0; i -= 8)
|
||||
if (((u >> (i & 16)) & 8) &&
|
||||
((u >> i) & 0x20) &&
|
||||
|
|
@ -286,7 +273,7 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
|
|||
}
|
||||
break;
|
||||
|
||||
case VIA_UDMA_100:
|
||||
case ATA_UDMA5:
|
||||
for (i = 24; i >= 0; i -= 8)
|
||||
if (((u >> i) & 0x10) ||
|
||||
(((u >> i) & 0x20) &&
|
||||
|
|
@ -298,7 +285,7 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
|
|||
}
|
||||
break;
|
||||
|
||||
case VIA_UDMA_133:
|
||||
case ATA_UDMA6:
|
||||
for (i = 24; i >= 0; i -= 8)
|
||||
if (((u >> i) & 0x10) ||
|
||||
(((u >> i) & 0x20) &&
|
||||
|
|
@ -353,7 +340,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
|
|||
|
||||
via_cable_detect(vdev, u);
|
||||
|
||||
if ((via_config->flags & VIA_UDMA) == VIA_UDMA_66) {
|
||||
if (via_config->udma_mask == ATA_UDMA4) {
|
||||
/* Enable Clk66 */
|
||||
pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
|
||||
} else if (via_config->flags & VIA_BAD_CLK66) {
|
||||
|
|
@ -416,10 +403,12 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
|
|||
*/
|
||||
|
||||
pci_read_config_byte(isa, PCI_REVISION_ID, &t);
|
||||
printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s "
|
||||
printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %sDMA%s "
|
||||
"controller on pci%s\n",
|
||||
via_config->name, t,
|
||||
via_dma[via_config->flags & VIA_UDMA],
|
||||
via_config->udma_mask ? "U" : "MW",
|
||||
via_dma[via_config->udma_mask ?
|
||||
(fls(via_config->udma_mask) - 1) : 0],
|
||||
pci_name(dev));
|
||||
|
||||
pci_dev_put(isa);
|
||||
|
|
@ -454,7 +443,8 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
|
|||
return;
|
||||
|
||||
hwif->atapi_dma = 1;
|
||||
hwif->ultra_mask = 0x7f;
|
||||
|
||||
hwif->ultra_mask = vdev->via_config->udma_mask;
|
||||
hwif->mwdma_mask = 0x07;
|
||||
hwif->swdma_mask = 0x07;
|
||||
|
||||
|
|
|
|||
|
|
@ -1821,28 +1821,11 @@ pmac_ide_dma_check(ide_drive_t *drive)
|
|||
enable = 0;
|
||||
|
||||
if (enable) {
|
||||
short mode;
|
||||
|
||||
map = XFER_MWDMA;
|
||||
if (pmif->kind == controller_kl_ata4
|
||||
|| pmif->kind == controller_un_ata6
|
||||
|| pmif->kind == controller_k2_ata6
|
||||
|| pmif->kind == controller_sh_ata6) {
|
||||
map |= XFER_UDMA;
|
||||
if (pmif->cable_80) {
|
||||
map |= XFER_UDMA_66;
|
||||
if (pmif->kind == controller_un_ata6 ||
|
||||
pmif->kind == controller_k2_ata6 ||
|
||||
pmif->kind == controller_sh_ata6)
|
||||
map |= XFER_UDMA_100;
|
||||
if (pmif->kind == controller_sh_ata6)
|
||||
map |= XFER_UDMA_133;
|
||||
}
|
||||
}
|
||||
mode = ide_find_best_mode(drive, map);
|
||||
if (mode & XFER_UDMA)
|
||||
u8 mode = ide_max_dma_mode(drive);
|
||||
|
||||
if (mode >= XFER_UDMA_0)
|
||||
drive->using_dma = pmac_ide_udma_enable(drive, mode);
|
||||
else if (mode & XFER_MWDMA)
|
||||
else if (mode >= XFER_MW_DMA_0)
|
||||
drive->using_dma = pmac_ide_mdma_enable(drive, mode);
|
||||
hwif->OUTB(0, IDE_CONTROL_REG);
|
||||
/* Apply settings to controller */
|
||||
|
|
|
|||
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Reference in a new issue