RDMA/nes: Formatting cleanup
Various cleanups: - Change // to /* .. */ - Place whitespace around binary operators. - Trim down a few long lines. - Some minor alignment formatting for better readability. - Remove some silly tabs. Signed-off-by: Glenn Streiff <gstreiff@neteffect.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
Glenn Streiff
Roland Dreier
parent
0e1de5d62e
commit
7495ab6837
5 changed files with 109 additions and 102 deletions
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@ -594,7 +594,7 @@ static void nes_cm_timer_tick(unsigned long pass)
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continue;
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}
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/* this seems like the correct place, but leave send entry unprotected */
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// spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags);
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/* spin_unlock_irqrestore(&cm_node->retrans_list_lock, flags); */
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atomic_inc(&send_entry->skb->users);
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cm_packets_retrans++;
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nes_debug(NES_DBG_CM, "Retransmitting send_entry %p for node %p,"
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@ -1335,7 +1335,7 @@ static int process_packet(struct nes_cm_node *cm_node, struct sk_buff *skb,
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cm_node->loc_addr, cm_node->loc_port,
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cm_node->rem_addr, cm_node->rem_port,
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cm_node->state, atomic_read(&cm_node->ref_count));
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// create event
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/* create event */
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cm_node->state = NES_CM_STATE_CLOSED;
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create_event(cm_node, NES_CM_EVENT_ABORTED);
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@ -1669,7 +1669,7 @@ static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *cm_core,
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if (!cm_node)
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return NULL;
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// set our node side to client (active) side
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/* set our node side to client (active) side */
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cm_node->tcp_cntxt.client = 1;
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cm_node->tcp_cntxt.rcv_wscale = NES_CM_DEFAULT_RCV_WND_SCALE;
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@ -1694,7 +1694,7 @@ static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *cm_core,
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loopbackremotenode->mpa_frame_size = mpa_frame_size -
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sizeof(struct ietf_mpa_frame);
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// we are done handling this state, set node to a TSA state
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/* we are done handling this state, set node to a TSA state */
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cm_node->state = NES_CM_STATE_TSA;
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cm_node->tcp_cntxt.rcv_nxt = loopbackremotenode->tcp_cntxt.loc_seq_num;
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loopbackremotenode->tcp_cntxt.rcv_nxt = cm_node->tcp_cntxt.loc_seq_num;
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@ -833,7 +833,7 @@ static void nes_init_csr_ne020(struct nes_device *nesdev, u8 hw_rev, u8 port_cou
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nes_write_indexed(nesdev, 0x00000900, 0x20000001);
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nes_write_indexed(nesdev, 0x000060C0, 0x0000028e);
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nes_write_indexed(nesdev, 0x000060C8, 0x00000020);
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//
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nes_write_indexed(nesdev, 0x000001EC, 0x7b2625a0);
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/* nes_write_indexed(nesdev, 0x000001EC, 0x5f2625a0); */
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@ -1229,7 +1229,7 @@ int nes_init_phy(struct nes_device *nesdev)
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nes_read_1G_phy_reg(nesdev, 1, nesadapter->phy_index[mac_index], &phy_data);
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nes_debug(NES_DBG_PHY, "Phy data from register 1 phy address %u = 0x%X.\n",
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nesadapter->phy_index[mac_index], phy_data);
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nes_write_1G_phy_reg(nesdev, 23, nesadapter->phy_index[mac_index], 0xb000);
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nes_write_1G_phy_reg(nesdev, 23, nesadapter->phy_index[mac_index], 0xb000);
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/* Reset the PHY */
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nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[mac_index], 0x8000);
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@ -1373,7 +1373,7 @@ int nes_init_phy(struct nes_device *nesdev)
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* the amcc phy is stable
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*/
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sds_common_control0 = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0);
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sds_common_control0 = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0);
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sds_common_control0 |= 0x1;
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nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds_common_control0);
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@ -1382,7 +1382,7 @@ int nes_init_phy(struct nes_device *nesdev)
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nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, sds_common_control0);
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i = 0;
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while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET) & 0x00000040) != 0x00000040)
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while (((nes_read32(nesdev->regs + NES_SOFTWARE_RESET) & 0x00000040) != 0x00000040)
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&& (i++ < 5000)) {
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/* mdelay(1); */
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}
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@ -1659,10 +1659,10 @@ int nes_init_nic_qp(struct nes_device *nesdev, struct net_device *netdev)
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}
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u64temp = (u64)nesvnic->nic.sq_pbase;
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nic_context->context_words[NES_NIC_CTX_SQ_LOW_IDX] = cpu_to_le32((u32)u64temp);
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nic_context->context_words[NES_NIC_CTX_SQ_LOW_IDX] = cpu_to_le32((u32)u64temp);
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nic_context->context_words[NES_NIC_CTX_SQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32));
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u64temp = (u64)nesvnic->nic.rq_pbase;
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nic_context->context_words[NES_NIC_CTX_RQ_LOW_IDX] = cpu_to_le32((u32)u64temp);
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nic_context->context_words[NES_NIC_CTX_RQ_LOW_IDX] = cpu_to_le32((u32)u64temp);
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nic_context->context_words[NES_NIC_CTX_RQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32));
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cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_CREATE_QP |
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@ -1714,7 +1714,7 @@ int nes_init_nic_qp(struct nes_device *nesdev, struct net_device *netdev)
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nic_rqe = &nesvnic->nic.rq_vbase[counter];
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nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = cpu_to_le32(nesvnic->max_frame_size);
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nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_3_2_IDX] = 0;
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nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = cpu_to_le32((u32)pmem);
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nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = cpu_to_le32((u32)pmem);
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nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX] = cpu_to_le32((u32)((u64)pmem >> 32));
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nesvnic->nic.rx_skb[counter] = skb;
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}
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@ -1738,13 +1738,13 @@ int nes_init_nic_qp(struct nes_device *nesdev, struct net_device *netdev)
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jumbomode = 1;
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nes_nic_init_timer_defaults(nesdev, jumbomode);
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}
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nesvnic->lro_mgr.max_aggr = NES_LRO_MAX_AGGR;
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nesvnic->lro_mgr.max_desc = NES_MAX_LRO_DESCRIPTORS;
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nesvnic->lro_mgr.lro_arr = nesvnic->lro_desc;
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nesvnic->lro_mgr.max_aggr = NES_LRO_MAX_AGGR;
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nesvnic->lro_mgr.max_desc = NES_MAX_LRO_DESCRIPTORS;
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nesvnic->lro_mgr.lro_arr = nesvnic->lro_desc;
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nesvnic->lro_mgr.get_skb_header = nes_lro_get_skb_hdr;
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nesvnic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
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nesvnic->lro_mgr.dev = netdev;
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nesvnic->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
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nesvnic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
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nesvnic->lro_mgr.dev = netdev;
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nesvnic->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
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nesvnic->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
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return 0;
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}
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@ -1765,8 +1765,8 @@ void nes_destroy_nic_qp(struct nes_vnic *nesvnic)
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/* Free remaining NIC receive buffers */
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while (nesvnic->nic.rq_head != nesvnic->nic.rq_tail) {
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nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail];
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wqe_frag = (u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]);
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nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail];
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wqe_frag = (u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]);
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wqe_frag |= ((u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX])) << 32;
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pci_unmap_single(nesdev->pcidev, (dma_addr_t)wqe_frag,
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nesvnic->max_frame_size, PCI_DMA_FROMDEVICE);
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@ -1849,17 +1849,17 @@ int nes_napi_isr(struct nes_device *nesdev)
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/* iff NIC, process here, else wait for DPC */
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if ((int_stat) && ((int_stat & 0x0000ff00) == int_stat)) {
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nesdev->napi_isr_ran = 0;
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nes_write32(nesdev->regs+NES_INT_STAT,
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(int_stat &
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~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3)));
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nes_write32(nesdev->regs + NES_INT_STAT,
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(int_stat &
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~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0 | NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3)));
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/* Process the CEQs */
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nes_process_ceq(nesdev, &nesdev->nesadapter->ceq[nesdev->nic_ceq_index]);
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if (unlikely((((nesadapter->et_rx_coalesce_usecs_irq) &&
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(!nesadapter->et_use_adaptive_rx_coalesce)) ||
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((nesadapter->et_use_adaptive_rx_coalesce) &&
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(nesdev->deepcq_count > nesadapter->et_pkt_rate_low)))) ) {
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(!nesadapter->et_use_adaptive_rx_coalesce)) ||
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((nesadapter->et_use_adaptive_rx_coalesce) &&
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(nesdev->deepcq_count > nesadapter->et_pkt_rate_low))))) {
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if ((nesdev->int_req & NES_INT_TIMER) == 0) {
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/* Enable Periodic timer interrupts */
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nesdev->int_req |= NES_INT_TIMER;
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@ -1937,12 +1937,12 @@ void nes_dpc(unsigned long param)
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}
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if (int_stat) {
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if (int_stat & ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|
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NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3)) {
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if (int_stat & ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0|
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NES_INT_MAC1|NES_INT_MAC2 | NES_INT_MAC3)) {
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/* Ack the interrupts */
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nes_write32(nesdev->regs+NES_INT_STAT,
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(int_stat & ~(NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|
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NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3)));
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(int_stat & ~(NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0|
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NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3)));
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}
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temp_int_stat = int_stat;
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@ -2007,8 +2007,8 @@ void nes_dpc(unsigned long param)
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}
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}
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/* Don't use the interface interrupt bit stay in loop */
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int_stat &= ~NES_INT_INTF|NES_INT_TIMER|NES_INT_MAC0|
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NES_INT_MAC1|NES_INT_MAC2|NES_INT_MAC3;
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int_stat &= ~NES_INT_INTF | NES_INT_TIMER | NES_INT_MAC0 |
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NES_INT_MAC1 | NES_INT_MAC2 | NES_INT_MAC3;
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} while ((int_stat != 0) && (loop_counter++ < MAX_DPC_ITERATIONS));
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if (timer_ints == 1) {
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@ -2019,9 +2019,9 @@ void nes_dpc(unsigned long param)
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nesdev->timer_only_int_count = 0;
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nesdev->int_req &= ~NES_INT_TIMER;
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nes_write32(nesdev->regs + NES_INTF_INT_MASK, ~(nesdev->intf_int_req));
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nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req);
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nes_write32(nesdev->regs + NES_INT_MASK, ~nesdev->int_req);
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} else {
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nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff|(~nesdev->int_req));
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nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff | (~nesdev->int_req));
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}
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} else {
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if (unlikely(nesadapter->et_use_adaptive_rx_coalesce))
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@ -2029,7 +2029,7 @@ void nes_dpc(unsigned long param)
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nes_nic_init_timer(nesdev);
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}
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nesdev->timer_only_int_count = 0;
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nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff|(~nesdev->int_req));
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nes_write32(nesdev->regs+NES_INT_MASK, 0x0000ffff | (~nesdev->int_req));
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}
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} else {
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nesdev->timer_only_int_count = 0;
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@ -2078,7 +2078,7 @@ static void nes_process_ceq(struct nes_device *nesdev, struct nes_hw_ceq *ceq)
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do {
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if (le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]) &
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NES_CEQE_VALID) {
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u64temp = (((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX])))<<32) |
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u64temp = (((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_HIGH_IDX]))) << 32) |
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((u64)(le32_to_cpu(ceq->ceq_vbase[head].ceqe_words[NES_CEQE_CQ_CTX_LOW_IDX])));
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u64temp <<= 1;
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cq = *((struct nes_hw_cq **)&u64temp);
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@ -2106,7 +2106,7 @@ static void nes_process_ceq(struct nes_device *nesdev, struct nes_hw_ceq *ceq)
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*/
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static void nes_process_aeq(struct nes_device *nesdev, struct nes_hw_aeq *aeq)
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{
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// u64 u64temp;
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/* u64 u64temp; */
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u32 head;
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u32 aeq_size;
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u32 aeqe_misc;
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@ -2125,8 +2125,10 @@ static void nes_process_aeq(struct nes_device *nesdev, struct nes_hw_aeq *aeq)
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if (aeqe_misc & (NES_AEQE_QP|NES_AEQE_CQ)) {
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if (aeqe_cq_id >= NES_FIRST_QPN) {
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/* dealing with an accelerated QP related AE */
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// u64temp = (((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])))<<32) |
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// ((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX])));
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/*
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* u64temp = (((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX]))) << 32) |
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* ((u64)(le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX])));
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*/
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nes_process_iwarp_aeqe(nesdev, (struct nes_hw_aeqe *)aeqe);
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} else {
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/* TODO: dealing with a CQP related AE */
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@ -2474,8 +2476,10 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
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/* bump past the vlan tag */
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wqe_fragment_length++;
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if (le16_to_cpu(wqe_fragment_length[wqe_fragment_index]) != 0) {
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u64temp = (u64) le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX+wqe_fragment_index*2]);
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u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX+wqe_fragment_index*2]))<<32;
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u64temp = (u64) le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX +
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wqe_fragment_index * 2]);
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u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX +
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wqe_fragment_index * 2])) << 32;
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bus_address = (dma_addr_t)u64temp;
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if (test_and_clear_bit(nesnic->sq_tail, nesnic->first_frag_overflow)) {
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pci_unmap_single(nesdev->pcidev,
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@ -2485,8 +2489,10 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
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}
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for (; wqe_fragment_index < 5; wqe_fragment_index++) {
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if (wqe_fragment_length[wqe_fragment_index]) {
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u64temp = le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX+wqe_fragment_index*2]);
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u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX+wqe_fragment_index*2]))<<32;
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u64temp = le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_LOW_IDX +
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wqe_fragment_index * 2]);
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u64temp += ((u64)le32_to_cpu(nic_sqe->wqe_words[NES_NIC_SQ_WQE_FRAG0_HIGH_IDX
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+ wqe_fragment_index * 2])) <<32;
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bus_address = (dma_addr_t)u64temp;
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pci_unmap_page(nesdev->pcidev,
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bus_address,
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@ -2533,7 +2539,7 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
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if (atomic_read(&nesvnic->rx_skbs_needed) > (nesvnic->nic.rq_size>>1)) {
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nes_write32(nesdev->regs+NES_CQE_ALLOC,
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cq->cq_number | (cqe_count << 16));
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// nesadapter->tune_timer.cq_count += cqe_count;
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/* nesadapter->tune_timer.cq_count += cqe_count; */
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nesdev->currcq_count += cqe_count;
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cqe_count = 0;
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nes_replenish_nic_rq(nesvnic);
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|
|
@ -2608,7 +2614,7 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
|
|||
/* Replenish Nic CQ */
|
||||
nes_write32(nesdev->regs+NES_CQE_ALLOC,
|
||||
cq->cq_number | (cqe_count << 16));
|
||||
// nesdev->nesadapter->tune_timer.cq_count += cqe_count;
|
||||
/* nesdev->nesadapter->tune_timer.cq_count += cqe_count; */
|
||||
nesdev->currcq_count += cqe_count;
|
||||
cqe_count = 0;
|
||||
}
|
||||
|
|
@ -2636,7 +2642,7 @@ void nes_nic_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq)
|
|||
cq->cqe_allocs_pending = cqe_count;
|
||||
if (unlikely(nesadapter->et_use_adaptive_rx_coalesce))
|
||||
{
|
||||
// nesdev->nesadapter->tune_timer.cq_count += cqe_count;
|
||||
/* nesdev->nesadapter->tune_timer.cq_count += cqe_count; */
|
||||
nesdev->currcq_count += cqe_count;
|
||||
nes_nic_tune_timer(nesdev);
|
||||
}
|
||||
|
|
@ -2671,7 +2677,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
|
|||
|
||||
if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_VALID) {
|
||||
u64temp = (((u64)(le32_to_cpu(cq->cq_vbase[head].
|
||||
cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX])))<<32) |
|
||||
cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX]))) << 32) |
|
||||
((u64)(le32_to_cpu(cq->cq_vbase[head].
|
||||
cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX])));
|
||||
cqp = *((struct nes_hw_cqp **)&u64temp);
|
||||
|
|
@ -2688,7 +2694,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
|
|||
}
|
||||
|
||||
u64temp = (((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail].
|
||||
wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX])))<<32) |
|
||||
wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX]))) << 32) |
|
||||
((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail].
|
||||
wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX])));
|
||||
cqp_request = *((struct nes_cqp_request **)&u64temp);
|
||||
|
|
@ -2725,7 +2731,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
|
|||
} else {
|
||||
nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n",
|
||||
cqp_request,
|
||||
le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f);
|
||||
le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f);
|
||||
if (cqp_request->dynamic) {
|
||||
kfree(cqp_request);
|
||||
} else {
|
||||
|
|
@ -2739,7 +2745,7 @@ static void nes_cqp_ce_handler(struct nes_device *nesdev, struct nes_hw_cq *cq)
|
|||
}
|
||||
|
||||
cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX] = 0;
|
||||
nes_write32(nesdev->regs+NES_CQE_ALLOC, cq->cq_number | (1 << 16));
|
||||
nes_write32(nesdev->regs + NES_CQE_ALLOC, cq->cq_number | (1 << 16));
|
||||
if (++cqp->sq_tail >= cqp->sq_size)
|
||||
cqp->sq_tail = 0;
|
||||
|
||||
|
|
@ -2808,13 +2814,13 @@ static void nes_process_iwarp_aeqe(struct nes_device *nesdev,
|
|||
nes_debug(NES_DBG_AEQ, "\n");
|
||||
aeq_info = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_MISC_IDX]);
|
||||
if ((NES_AEQE_INBOUND_RDMA&aeq_info) || (!(NES_AEQE_QP&aeq_info))) {
|
||||
context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]);
|
||||
context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]);
|
||||
context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32;
|
||||
} else {
|
||||
aeqe_context = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_LOW_IDX]);
|
||||
aeqe_context += ((u64)le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_CTXT_HIGH_IDX])) << 32;
|
||||
context = (unsigned long)nesadapter->qp_table[le32_to_cpu(
|
||||
aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX])-NES_FIRST_QPN];
|
||||
aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]) - NES_FIRST_QPN];
|
||||
BUG_ON(!context);
|
||||
}
|
||||
|
||||
|
|
@ -2827,7 +2833,6 @@ static void nes_process_iwarp_aeqe(struct nes_device *nesdev,
|
|||
le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]), aeqe,
|
||||
nes_tcp_state_str[tcp_state], nes_iwarp_state_str[iwarp_state]);
|
||||
|
||||
|
||||
switch (async_event_id) {
|
||||
case NES_AEQE_AEID_LLP_FIN_RECEIVED:
|
||||
nesqp = *((struct nes_qp **)&context);
|
||||
|
|
@ -3231,7 +3236,7 @@ void nes_manage_arp_cache(struct net_device *netdev, unsigned char *mac_addr,
|
|||
cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_ARP_VALID);
|
||||
cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_ADDR_LOW_IDX] = cpu_to_le32(
|
||||
(((u32)mac_addr[2]) << 24) | (((u32)mac_addr[3]) << 16) |
|
||||
(((u32)mac_addr[4]) << 8) | (u32)mac_addr[5]);
|
||||
(((u32)mac_addr[4]) << 8) | (u32)mac_addr[5]);
|
||||
cqp_wqe->wqe_words[NES_CQP_ARP_WQE_MAC_HIGH_IDX] = cpu_to_le32(
|
||||
(((u32)mac_addr[0]) << 16) | (u32)mac_addr[1]);
|
||||
} else {
|
||||
|
|
|
|||
|
|
@ -969,7 +969,7 @@ struct nes_arp_entry {
|
|||
#define NES_NIC_CQ_DOWNWARD_TREND 16
|
||||
|
||||
struct nes_hw_tune_timer {
|
||||
//u16 cq_count;
|
||||
/* u16 cq_count; */
|
||||
u16 threshold_low;
|
||||
u16 threshold_target;
|
||||
u16 threshold_high;
|
||||
|
|
|
|||
|
|
@ -185,12 +185,13 @@ static int nes_netdev_open(struct net_device *netdev)
|
|||
nic_active |= nic_active_bit;
|
||||
nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active);
|
||||
|
||||
macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
|
||||
macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
|
||||
macaddr_high += (u16)netdev->dev_addr[1];
|
||||
macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
|
||||
macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
|
||||
macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
|
||||
macaddr_low += (u32)netdev->dev_addr[5];
|
||||
|
||||
macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
|
||||
macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
|
||||
macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
|
||||
macaddr_low += (u32)netdev->dev_addr[5];
|
||||
|
||||
/* Program the various MAC regs */
|
||||
for (i = 0; i < NES_MAX_PORT_COUNT; i++) {
|
||||
|
|
@ -451,7 +452,7 @@ static int nes_netdev_start_xmit(struct sk_buff *skb, struct net_device *netdev)
|
|||
__le16 *wqe_fragment_length;
|
||||
u32 nr_frags;
|
||||
u32 original_first_length;
|
||||
// u64 *wqe_fragment_address;
|
||||
/* u64 *wqe_fragment_address; */
|
||||
/* first fragment (0) is used by copy buffer */
|
||||
u16 wqe_fragment_index=1;
|
||||
u16 hoffset;
|
||||
|
|
@ -461,11 +462,12 @@ static int nes_netdev_start_xmit(struct sk_buff *skb, struct net_device *netdev)
|
|||
u32 old_head;
|
||||
u32 wqe_misc;
|
||||
|
||||
/* nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u,"
|
||||
" (%u frags), tso_size=%u\n",
|
||||
netdev->name, skb->len, skb_headlen(skb),
|
||||
skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
|
||||
*/
|
||||
/*
|
||||
* nes_debug(NES_DBG_NIC_TX, "%s Request to tx NIC packet length %u, headlen %u,"
|
||||
* " (%u frags), tso_size=%u\n",
|
||||
* netdev->name, skb->len, skb_headlen(skb),
|
||||
* skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
|
||||
*/
|
||||
|
||||
if (!netif_carrier_ok(netdev))
|
||||
return NETDEV_TX_OK;
|
||||
|
|
@ -795,12 +797,12 @@ static int nes_netdev_set_mac_address(struct net_device *netdev, void *p)
|
|||
memcpy(netdev->dev_addr, mac_addr->sa_data, netdev->addr_len);
|
||||
printk(PFX "%s: Address length = %d, Address = %s\n",
|
||||
__func__, netdev->addr_len, print_mac(mac, mac_addr->sa_data));
|
||||
macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
|
||||
macaddr_high = ((u16)netdev->dev_addr[0]) << 8;
|
||||
macaddr_high += (u16)netdev->dev_addr[1];
|
||||
macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
|
||||
macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
|
||||
macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
|
||||
macaddr_low += (u32)netdev->dev_addr[5];
|
||||
macaddr_low = ((u32)netdev->dev_addr[2]) << 24;
|
||||
macaddr_low += ((u32)netdev->dev_addr[3]) << 16;
|
||||
macaddr_low += ((u32)netdev->dev_addr[4]) << 8;
|
||||
macaddr_low += (u32)netdev->dev_addr[5];
|
||||
|
||||
for (i = 0; i < NES_MAX_PORT_COUNT; i++) {
|
||||
if (nesvnic->qp_nic_index[i] == 0xf) {
|
||||
|
|
@ -881,12 +883,12 @@ static void nes_netdev_set_multicast_list(struct net_device *netdev)
|
|||
print_mac(mac, multicast_addr->dmi_addr),
|
||||
perfect_filter_register_address+(mc_index * 8),
|
||||
mc_nic_index);
|
||||
macaddr_high = ((u16)multicast_addr->dmi_addr[0]) << 8;
|
||||
macaddr_high = ((u16)multicast_addr->dmi_addr[0]) << 8;
|
||||
macaddr_high += (u16)multicast_addr->dmi_addr[1];
|
||||
macaddr_low = ((u32)multicast_addr->dmi_addr[2]) << 24;
|
||||
macaddr_low += ((u32)multicast_addr->dmi_addr[3]) << 16;
|
||||
macaddr_low += ((u32)multicast_addr->dmi_addr[4]) << 8;
|
||||
macaddr_low += (u32)multicast_addr->dmi_addr[5];
|
||||
macaddr_low = ((u32)multicast_addr->dmi_addr[2]) << 24;
|
||||
macaddr_low += ((u32)multicast_addr->dmi_addr[3]) << 16;
|
||||
macaddr_low += ((u32)multicast_addr->dmi_addr[4]) << 8;
|
||||
macaddr_low += (u32)multicast_addr->dmi_addr[5];
|
||||
nes_write_indexed(nesdev,
|
||||
perfect_filter_register_address+(mc_index * 8),
|
||||
macaddr_low);
|
||||
|
|
@ -910,23 +912,23 @@ static void nes_netdev_set_multicast_list(struct net_device *netdev)
|
|||
/**
|
||||
* nes_netdev_change_mtu
|
||||
*/
|
||||
static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu)
|
||||
static int nes_netdev_change_mtu(struct net_device *netdev, int new_mtu)
|
||||
{
|
||||
struct nes_vnic *nesvnic = netdev_priv(netdev);
|
||||
struct nes_device *nesdev = nesvnic->nesdev;
|
||||
int ret = 0;
|
||||
u8 jumbomode=0;
|
||||
struct nes_device *nesdev = nesvnic->nesdev;
|
||||
int ret = 0;
|
||||
u8 jumbomode = 0;
|
||||
|
||||
if ((new_mtu < ETH_ZLEN) || (new_mtu > max_mtu))
|
||||
if ((new_mtu < ETH_ZLEN) || (new_mtu > max_mtu))
|
||||
return -EINVAL;
|
||||
|
||||
netdev->mtu = new_mtu;
|
||||
netdev->mtu = new_mtu;
|
||||
nesvnic->max_frame_size = new_mtu + VLAN_ETH_HLEN;
|
||||
|
||||
if (netdev->mtu > 1500) {
|
||||
jumbomode=1;
|
||||
}
|
||||
nes_nic_init_timer_defaults(nesdev, jumbomode);
|
||||
nes_nic_init_timer_defaults(nesdev, jumbomode);
|
||||
|
||||
if (netif_running(netdev)) {
|
||||
nes_netdev_stop(netdev);
|
||||
|
|
@ -1225,14 +1227,14 @@ static int nes_netdev_set_coalesce(struct net_device *netdev,
|
|||
struct ethtool_coalesce *et_coalesce)
|
||||
{
|
||||
struct nes_vnic *nesvnic = netdev_priv(netdev);
|
||||
struct nes_device *nesdev = nesvnic->nesdev;
|
||||
struct nes_device *nesdev = nesvnic->nesdev;
|
||||
struct nes_adapter *nesadapter = nesdev->nesadapter;
|
||||
struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
|
||||
spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
|
||||
if (et_coalesce->rx_max_coalesced_frames_low) {
|
||||
shared_timer->threshold_low = et_coalesce->rx_max_coalesced_frames_low;
|
||||
shared_timer->threshold_low = et_coalesce->rx_max_coalesced_frames_low;
|
||||
}
|
||||
if (et_coalesce->rx_max_coalesced_frames_irq) {
|
||||
shared_timer->threshold_target = et_coalesce->rx_max_coalesced_frames_irq;
|
||||
|
|
@ -1252,14 +1254,14 @@ static int nes_netdev_set_coalesce(struct net_device *netdev,
|
|||
nesadapter->et_rx_coalesce_usecs_irq = et_coalesce->rx_coalesce_usecs_irq;
|
||||
if (et_coalesce->use_adaptive_rx_coalesce) {
|
||||
nesadapter->et_use_adaptive_rx_coalesce = 1;
|
||||
nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT_DYNAMIC;
|
||||
nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT_DYNAMIC;
|
||||
nesadapter->et_rx_coalesce_usecs_irq = 0;
|
||||
if (et_coalesce->pkt_rate_low) {
|
||||
nesadapter->et_pkt_rate_low = et_coalesce->pkt_rate_low;
|
||||
nesadapter->et_pkt_rate_low = et_coalesce->pkt_rate_low;
|
||||
}
|
||||
} else {
|
||||
nesadapter->et_use_adaptive_rx_coalesce = 0;
|
||||
nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT;
|
||||
nesadapter->timer_int_limit = NES_TIMER_INT_LIMIT;
|
||||
if (nesadapter->et_rx_coalesce_usecs_irq) {
|
||||
nes_write32(nesdev->regs+NES_PERIODIC_CONTROL,
|
||||
0x80000000 | ((u32)(nesadapter->et_rx_coalesce_usecs_irq*8)));
|
||||
|
|
@ -1276,28 +1278,28 @@ static int nes_netdev_get_coalesce(struct net_device *netdev,
|
|||
struct ethtool_coalesce *et_coalesce)
|
||||
{
|
||||
struct nes_vnic *nesvnic = netdev_priv(netdev);
|
||||
struct nes_device *nesdev = nesvnic->nesdev;
|
||||
struct nes_device *nesdev = nesvnic->nesdev;
|
||||
struct nes_adapter *nesadapter = nesdev->nesadapter;
|
||||
struct ethtool_coalesce temp_et_coalesce;
|
||||
struct nes_hw_tune_timer *shared_timer = &nesadapter->tune_timer;
|
||||
unsigned long flags;
|
||||
|
||||
memset(&temp_et_coalesce, 0, sizeof(temp_et_coalesce));
|
||||
temp_et_coalesce.rx_coalesce_usecs_irq = nesadapter->et_rx_coalesce_usecs_irq;
|
||||
temp_et_coalesce.use_adaptive_rx_coalesce = nesadapter->et_use_adaptive_rx_coalesce;
|
||||
temp_et_coalesce.rate_sample_interval = nesadapter->et_rate_sample_interval;
|
||||
temp_et_coalesce.rx_coalesce_usecs_irq = nesadapter->et_rx_coalesce_usecs_irq;
|
||||
temp_et_coalesce.use_adaptive_rx_coalesce = nesadapter->et_use_adaptive_rx_coalesce;
|
||||
temp_et_coalesce.rate_sample_interval = nesadapter->et_rate_sample_interval;
|
||||
temp_et_coalesce.pkt_rate_low = nesadapter->et_pkt_rate_low;
|
||||
spin_lock_irqsave(&nesadapter->periodic_timer_lock, flags);
|
||||
temp_et_coalesce.rx_max_coalesced_frames_low = shared_timer->threshold_low;
|
||||
temp_et_coalesce.rx_max_coalesced_frames_irq = shared_timer->threshold_target;
|
||||
temp_et_coalesce.rx_max_coalesced_frames_low = shared_timer->threshold_low;
|
||||
temp_et_coalesce.rx_max_coalesced_frames_irq = shared_timer->threshold_target;
|
||||
temp_et_coalesce.rx_max_coalesced_frames_high = shared_timer->threshold_high;
|
||||
temp_et_coalesce.rx_coalesce_usecs_low = shared_timer->timer_in_use_min;
|
||||
temp_et_coalesce.rx_coalesce_usecs_low = shared_timer->timer_in_use_min;
|
||||
temp_et_coalesce.rx_coalesce_usecs_high = shared_timer->timer_in_use_max;
|
||||
if (nesadapter->et_use_adaptive_rx_coalesce) {
|
||||
temp_et_coalesce.rx_coalesce_usecs_irq = shared_timer->timer_in_use;
|
||||
}
|
||||
spin_unlock_irqrestore(&nesadapter->periodic_timer_lock, flags);
|
||||
memcpy(et_coalesce, &temp_et_coalesce, sizeof(*et_coalesce));
|
||||
memcpy(et_coalesce, &temp_et_coalesce, sizeof(*et_coalesce));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1376,7 +1378,7 @@ static int nes_netdev_get_settings(struct net_device *netdev, struct ethtool_cmd
|
|||
u16 phy_data;
|
||||
|
||||
et_cmd->duplex = DUPLEX_FULL;
|
||||
et_cmd->port = PORT_MII;
|
||||
et_cmd->port = PORT_MII;
|
||||
|
||||
if (nesadapter->OneG_Mode) {
|
||||
et_cmd->speed = SPEED_1000;
|
||||
|
|
@ -1401,13 +1403,13 @@ static int nes_netdev_get_settings(struct net_device *netdev, struct ethtool_cmd
|
|||
if ((nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_IRIS) ||
|
||||
(nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_ARGUS)) {
|
||||
et_cmd->transceiver = XCVR_EXTERNAL;
|
||||
et_cmd->port = PORT_FIBRE;
|
||||
et_cmd->supported = SUPPORTED_FIBRE;
|
||||
et_cmd->port = PORT_FIBRE;
|
||||
et_cmd->supported = SUPPORTED_FIBRE;
|
||||
et_cmd->advertising = ADVERTISED_FIBRE;
|
||||
et_cmd->phy_address = nesadapter->phy_index[nesdev->mac_index];
|
||||
} else {
|
||||
et_cmd->transceiver = XCVR_INTERNAL;
|
||||
et_cmd->supported = SUPPORTED_10000baseT_Full;
|
||||
et_cmd->supported = SUPPORTED_10000baseT_Full;
|
||||
et_cmd->advertising = ADVERTISED_10000baseT_Full;
|
||||
et_cmd->phy_address = nesdev->mac_index;
|
||||
}
|
||||
|
|
@ -1438,7 +1440,7 @@ static int nes_netdev_set_settings(struct net_device *netdev, struct ethtool_cmd
|
|||
/* Turn on Full duplex, Autoneg, and restart autonegotiation */
|
||||
phy_data |= 0x1300;
|
||||
} else {
|
||||
// Turn off autoneg
|
||||
/* Turn off autoneg */
|
||||
phy_data &= ~0x1000;
|
||||
}
|
||||
nes_write_1G_phy_reg(nesdev, 0, nesadapter->phy_index[nesdev->mac_index],
|
||||
|
|
|
|||
|
|
@ -1266,7 +1266,7 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
|
|||
sq_size = init_attr->cap.max_send_wr;
|
||||
rq_size = init_attr->cap.max_recv_wr;
|
||||
|
||||
// check if the encoded sizes are OK or not...
|
||||
/* check if the encoded sizes are OK or not... */
|
||||
sq_encoded_size = nes_get_encoded_size(&sq_size);
|
||||
rq_encoded_size = nes_get_encoded_size(&rq_size);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue