ARM: SoC fixes for 3.7

These are three fixes for the Marvell EBU family and one for the Samsung
 s3c platforms. All of them are obvious should still make it into 3.7.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIVAwUAULdtoGCrR//JCVInAQLC8Q/7B8PWsUiNz2VSgCHC5pTDM1V2TqxjkhEI
 fdxlKQ5vgmY917j1J87mZLX6TKeXFcQaoAIHZlTI6ilRNk4CReRBC8lR3o+xlR0r
 aBCv+fOXtsDtEMUWRPLWr+6lu8OLyqWHy7viW0bSHOt3frPAxLr0XM9QYyusXv2L
 x9ddBza4xM4DstxwQQH6yITqqGxkkhXTnnMqQ75J9rSxnJpC32CYs3MgN7/aMeV7
 8v6pGp2YYjwSnZxbL/2Oo0if4T/45f7wncFfMGPKDvGLin6BZ8ml0pH1QeN0lM5O
 49F61S8DPbntabaaqWfFStrzUCNIsTLNLRE4mYVGw8YoBdf2BuZIeH3nPaq24av7
 da93P2vmLbnrIuttdM6NURjPy8N8HD6wAnRuue+T8NQrDEtHwLIpatQp24CJEFyo
 ReXieb67SHrYZZIaQllDDsZrrPImFbX7xklHUxd+5UjT9VW8CE4r1pirt1D/cVwR
 n9rJ0TKERrliy/Wm2W6//Vs906QXcynMkvzCMBWm9MGJb8sd0AbupuVPWKA9jjZO
 8g7TUTxTBd7xg2nSgfAw+ofNgfrSS6Jm1ssASrz/A8jjp2kN1zM5Tm+nJDdSyQVR
 cvB9wUysMSCMvopBdlCoNOYEMngL387++ce6ImAOR1UOv663ue476EQ4jKQMxBLA
 lZ82RwVy/gI=
 =zrCM
 -----END PGP SIGNATURE-----

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "These are three fixes for the Marvell EBU family and one for the
  Samsung s3c platforms.  All of them are obvious should still make it
  into 3.7."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: Kirkwood: Update PCI-E fixup
  Dove: Fix irq_to_pmu()
  Dove: Attempt to fix PMU/RTC interrupts
  ARM: S3C24XX: Fix potential NULL pointer dereference error

arch/arm/Kconfig

@@ -547,6 +547,7 @@ config ARCH_KIRKWOOD
 	select CPU_FEROCEON
 	select GENERIC_CLOCKEVENTS
 	select PCI
+	select PCI_QUIRKS
 	select PLAT_ORION_LEGACY
 	help
 	  Support for the following Marvell Kirkwood series SoCs:

arch/arm/mach-dove/include/mach/pm.h

@@ -63,7 +63,7 @@ static inline int pmu_to_irq(int pin)
 
 static inline int irq_to_pmu(int irq)
 {
-	if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS)
+	if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS)
 		return irq - IRQ_DOVE_PMU_START;
 
 	return -EINVAL;

arch/arm/mach-dove/irq.c

@@ -46,8 +46,20 @@ static void pmu_irq_ack(struct irq_data *d)
 	int pin = irq_to_pmu(d->irq);
 	u32 u;
 
+	/*
+	 * The PMU mask register is not RW0C: it is RW.  This means that
+	 * the bits take whatever value is written to them; if you write
+	 * a '1', you will set the interrupt.
+	 *
+	 * Unfortunately this means there is NO race free way to clear
+	 * these interrupts.
+	 *
+	 * So, let's structure the code so that the window is as small as
+	 * possible.
+	 */
 	u = ~(1 << (pin & 31));
-	writel(u, PMU_INTERRUPT_CAUSE);
+	u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
+	writel_relaxed(u, PMU_INTERRUPT_CAUSE);
 }
 
 static struct irq_chip pmu_irq_chip = {

arch/arm/mach-kirkwood/pcie.c

@@ -207,14 +207,19 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
 	return 1;
 }
 
+/*
+ * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
+ * is operating as a root complex this needs to be switched to
+ * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
+ * the device. Decoding setup is handled by the orion code.
+ */
 static void __devinit rc_pci_fixup(struct pci_dev *dev)
 {
-	/*
-	 * Prevent enumeration of root complex.
-	 */
 	if (dev->bus->parent == NULL && dev->devfn == 0) {
 		int i;
 
+		dev->class &= 0xff;
+		dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
 		for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
 			dev->resource[i].start = 0;
 			dev->resource[i].end   = 0;

arch/arm/plat-s3c24xx/dma.c

@@ -473,12 +473,13 @@ int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
 		pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n",
 			 chan->number, __func__, buf);
 
-		if (chan->end == NULL)
+		if (chan->end == NULL) {
 			pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n",
 				 chan->number, __func__, chan);
-
-		chan->end->next = buf;
-		chan->end = buf;
+		} else {
+			chan->end->next = buf;
+			chan->end = buf;
+		}
 	}
 
 	/* if necessary, update the next buffer field */