x86, perf: Use apic_write unconditionally
Since apic_write() maps to a plain noop in the !CONFIG_X86_LOCAL_APIC case we're safe to remove this conditional compilation and clean up the code a bit. Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org> Cc: fweisbec@gmail.com Cc: acme@redhat.com Cc: eranian@google.com Cc: peterz@infradead.org LKML-Reference: <20100317104356.232371479@openvz.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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2 changed files with 0 additions and 6 deletions
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@ -1136,7 +1136,6 @@ void set_perf_event_pending(void)
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void perf_events_lapic_init(void)
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{
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#ifdef CONFIG_X86_LOCAL_APIC
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if (!x86_pmu.apic || !x86_pmu_initialized())
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return;
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@ -1144,7 +1143,6 @@ void perf_events_lapic_init(void)
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* Always use NMI for PMU
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*/
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apic_write(APIC_LVTPC, APIC_DM_NMI);
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#endif
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}
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static int __kprobes
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@ -1168,9 +1166,7 @@ perf_event_nmi_handler(struct notifier_block *self,
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regs = args->regs;
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#ifdef CONFIG_X86_LOCAL_APIC
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apic_write(APIC_LVTPC, APIC_DM_NMI);
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#endif
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/*
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* Can't rely on the handled return value to say it was our NMI, two
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* events could trigger 'simultaneously' raising two back-to-back NMIs.
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@ -363,10 +363,8 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
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}
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if (handled) {
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#ifdef CONFIG_X86_LOCAL_APIC
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/* p4 quirk: unmask it again */
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apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
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#endif
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inc_irq_stat(apic_perf_irqs);
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}
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