[SPARC64]: Get SUN4V SMP working.
The sibling cpu bringup is extremely fragile. We can only perform the most basic calls until we take over the trap table from the firmware/hypervisor on the new cpu. This means no accesses to %g4, %g5, %g6 since those can't be TLB translated without our trap handlers. In order to achieve this: 1) Change sun4v_init_mondo_queues() so that it can operate in several modes. It can allocate the queues, or install them in the current processor, or both. The boot cpu does both in it's call early on. Later, the boot cpu allocates the sibling cpu queue, starts the sibling cpu, then the sibling cpu loads them in. 2) init_cur_cpu_trap() is changed to take the current_thread_info() as an argument instead of reading %g6 directly on the current cpu. 3) Create a trampoline stack for the sibling cpus. We do our basic kernel calls using this stack, which is locked into the kernel image, then go to our proper thread stack after taking over the trap table. 4) While we are in this delicate startup state, we put 0xdeadbeef into %g4/%g5/%g6 in order to catch accidental accesses. 5) On the final prom_set_trap_table*() call, we put &init_thread_union into %g6. This is a hack to make prom_world(0) work. All that wants to do is restore the %asi register using get_thread_current_ds(). Longer term we should just do the OBP calls to set the trap table by hand just like we do for everything else. This would avoid that silly prom_world(0) issue, then we can remove the init_thread_union hack. Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
parent
19a0d585e8
commit
72aff53f1f
6 changed files with 85 additions and 51 deletions
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@ -1018,21 +1018,29 @@ static void __cpuinit init_cpu_send_mondo_info(struct trap_per_cpu *tb, int use_
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}
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/* Allocate and register the mondo and error queues for this cpu. */
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void __cpuinit sun4v_init_mondo_queues(int use_bootmem)
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void __cpuinit sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int load)
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{
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int cpu = hard_smp_processor_id();
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struct trap_per_cpu *tb = &trap_block[cpu];
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alloc_one_mondo(&tb->cpu_mondo_pa, use_bootmem);
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alloc_one_mondo(&tb->dev_mondo_pa, use_bootmem);
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alloc_one_mondo(&tb->resum_mondo_pa, use_bootmem);
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alloc_one_kbuf(&tb->resum_kernel_buf_pa, use_bootmem);
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alloc_one_mondo(&tb->nonresum_mondo_pa, use_bootmem);
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alloc_one_kbuf(&tb->nonresum_kernel_buf_pa, use_bootmem);
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if (alloc) {
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alloc_one_mondo(&tb->cpu_mondo_pa, use_bootmem);
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alloc_one_mondo(&tb->dev_mondo_pa, use_bootmem);
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alloc_one_mondo(&tb->resum_mondo_pa, use_bootmem);
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alloc_one_kbuf(&tb->resum_kernel_buf_pa, use_bootmem);
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alloc_one_mondo(&tb->nonresum_mondo_pa, use_bootmem);
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alloc_one_kbuf(&tb->nonresum_kernel_buf_pa, use_bootmem);
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init_cpu_send_mondo_info(tb, use_bootmem);
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init_cpu_send_mondo_info(tb, use_bootmem);
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}
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sun4v_register_mondo_queues(cpu);
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if (load) {
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if (cpu != hard_smp_processor_id()) {
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prom_printf("SUN4V: init mondo on cpu %d not %d\n",
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cpu, hard_smp_processor_id());
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prom_halt();
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}
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sun4v_register_mondo_queues(cpu);
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}
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}
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/* Only invoked on boot processor. */
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@ -1043,7 +1051,7 @@ void __init init_IRQ(void)
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memset(&ivector_table[0], 0, sizeof(ivector_table));
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if (tlb_type == hypervisor)
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sun4v_init_mondo_queues(1);
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sun4v_init_mondo_queues(1, hard_smp_processor_id(), 1, 1);
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/* We need to clear any IRQ's pending in the soft interrupt
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* registers, a spurious one could be left around from the
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@ -384,7 +384,7 @@ void __init setup_arch(char **cmdline_p)
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paging_init();
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/* Get boot processor trap_block[] setup. */
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init_cur_cpu_trap();
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init_cur_cpu_trap(current_thread_info());
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}
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static int __init set_preferred_console(void)
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@ -316,6 +316,8 @@ static void smp_synchronize_one_tick(int cpu)
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spin_unlock_irqrestore(&itc_sync_lock, flags);
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}
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extern void sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int load);
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extern unsigned long sparc64_cpu_startup;
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/* The OBP cpu startup callback truncates the 3rd arg cookie to
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@ -339,6 +341,9 @@ static int __devinit smp_boot_one_cpu(unsigned int cpu)
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cpu_set(cpu, cpu_callout_map);
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if (tlb_type == hypervisor) {
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/* Alloc the mondo queues, cpu will load them. */
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sun4v_init_mondo_queues(0, cpu, 1, 0);
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prom_startcpu_cpuid(cpu, entry, cookie);
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} else {
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int cpu_node;
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@ -352,6 +357,7 @@ static int __devinit smp_boot_one_cpu(unsigned int cpu)
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break;
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udelay(100);
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}
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if (callin_flag) {
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ret = 0;
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} else {
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@ -30,12 +30,16 @@ itlb_load:
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dtlb_load:
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.asciz "SUNW,dtlb-load"
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/* XXX __cpuinit this thing XXX */
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#define TRAMP_STACK_SIZE 1024
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.align 16
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tramp_stack:
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.skip TRAMP_STACK_SIZE
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.text
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.align 8
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.globl sparc64_cpu_startup, sparc64_cpu_startup_end
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sparc64_cpu_startup:
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flushw
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BRANCH_IF_SUN4V(g1, niagara_startup)
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BRANCH_IF_CHEETAH_BASE(g1, g5, cheetah_startup)
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BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(g1, g5, cheetah_plus_startup)
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@ -58,6 +62,7 @@ cheetah_startup:
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or %g5, DCU_DM | DCU_IM | DCU_DC | DCU_IC, %g5
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stxa %g5, [%g0] ASI_DCU_CONTROL_REG
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membar #Sync
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/* fallthru */
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cheetah_generic_startup:
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mov TSB_EXTENSION_P, %g3
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@ -90,19 +95,17 @@ spitfire_startup:
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membar #Sync
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startup_continue:
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wrpr %g0, 15, %pil
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sethi %hi(0x80000000), %g2
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sllx %g2, 32, %g2
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wr %g2, 0, %tick_cmpr
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mov %o0, %l0
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BRANCH_IF_SUN4V(g1, niagara_lock_tlb)
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/* Call OBP by hand to lock KERNBASE into i/d tlbs.
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* We lock 2 consequetive entries if we are 'bigkernel'.
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*/
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mov %o0, %l0
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sethi %hi(prom_entry_lock), %g2
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1: ldstub [%g2 + %lo(prom_entry_lock)], %g1
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membar #StoreLoad | #StoreStore
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@ -112,7 +115,6 @@ startup_continue:
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sethi %hi(p1275buf), %g2
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or %g2, %lo(p1275buf), %g2
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ldx [%g2 + 0x10], %l2
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mov %sp, %l1
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add %l2, -(192 + 128), %sp
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flushw
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@ -308,18 +310,9 @@ niagara_lock_tlb:
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ta HV_FAST_TRAP
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after_lock_tlb:
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mov %l1, %sp
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flushw
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mov %l0, %o0
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wrpr %g0, (PSTATE_PRIV | PSTATE_PEF), %pstate
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wr %g0, 0, %fprs
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/* XXX Buggy PROM... */
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srl %o0, 0, %o0
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ldx [%o0], %g6
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wr %g0, ASI_P, %asi
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mov PRIMARY_CONTEXT, %g7
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@ -341,22 +334,25 @@ after_lock_tlb:
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membar #Sync
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mov 1, %g5
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sllx %g5, THREAD_SHIFT, %g5
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sub %g5, (STACKFRAME_SZ + STACK_BIAS), %g5
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add %g6, %g5, %sp
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/* Everything we do here, until we properly take over the
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* trap table, must be done with extreme care. We cannot
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* make any references to %g6 (current thread pointer),
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* %g4 (current task pointer), or %g5 (base of current cpu's
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* per-cpu area) until we properly take over the trap table
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* from the firmware and hypervisor.
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*
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* Get onto temporary stack which is in the locked kernel image.
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*/
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sethi %hi(tramp_stack), %g1
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or %g1, %lo(tramp_stack), %g1
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add %g1, TRAMP_STACK_SIZE, %g1
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sub %g1, STACKFRAME_SZ + STACK_BIAS, %sp
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mov 0, %fp
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wrpr %g0, 0, %wstate
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wrpr %g0, 0, %tl
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/* Load TBA, then we can resurface. */
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sethi %hi(sparc64_ttable_tl0), %g5
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wrpr %g5, %tba
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ldx [%g6 + TI_TASK], %g4
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wrpr %g0, 0, %wstate
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/* Put garbage in these registers to trap any access to them. */
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set 0xdeadbeef, %g4
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set 0xdeadbeef, %g5
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set 0xdeadbeef, %g6
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call init_irqwork_curcpu
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nop
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@ -367,11 +363,17 @@ after_lock_tlb:
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bne,pt %icc, 1f
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nop
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call hard_smp_processor_id
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nop
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mov %o0, %o1
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mov 0, %o0
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mov 0, %o2
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call sun4v_init_mondo_queues
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mov 0, %o0
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mov 1, %o3
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1: call init_cur_cpu_trap
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nop
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ldx [%l0], %o0
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/* Start using proper page size encodings in ctx register. */
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sethi %hi(sparc64_kern_pri_context), %g3
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@ -386,9 +388,14 @@ after_lock_tlb:
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membar #Sync
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rdpr %pstate, %o1
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or %o1, PSTATE_IE, %o1
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wrpr %o1, 0, %pstate
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wrpr %g0, 0, %wstate
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/* As a hack, put &init_thread_union into %g6.
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* prom_world() loads from here to restore the %asi
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* register.
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*/
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sethi %hi(init_thread_union), %g6
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or %g6, %lo(init_thread_union), %g6
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sethi %hi(is_sun4v), %o0
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lduw [%o0 + %lo(is_sun4v)], %o0
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@ -418,7 +425,20 @@ after_lock_tlb:
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1: call prom_set_trap_table
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sethi %hi(sparc64_ttable_tl0), %o0
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2: call smp_callin
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2: ldx [%l0], %g6
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ldx [%g6 + TI_TASK], %g4
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mov 1, %g5
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sllx %g5, THREAD_SHIFT, %g5
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sub %g5, (STACKFRAME_SZ + STACK_BIAS), %g5
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add %g6, %g5, %sp
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mov 0, %fp
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rdpr %pstate, %o1
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or %o1, PSTATE_IE, %o1
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wrpr %o1, 0, %pstate
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call smp_callin
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nop
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call cpu_idle
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mov 0, %o0
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@ -2413,12 +2413,12 @@ struct trap_per_cpu trap_block[NR_CPUS];
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/* This can get invoked before sched_init() so play it super safe
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* and use hard_smp_processor_id().
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*/
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void init_cur_cpu_trap(void)
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void init_cur_cpu_trap(struct thread_info *t)
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{
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int cpu = hard_smp_processor_id();
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struct trap_per_cpu *p = &trap_block[cpu];
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p->thread = current_thread_info();
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p->thread = t;
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p->pgd_paddr = 0;
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}
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@ -77,7 +77,7 @@ struct trap_per_cpu {
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unsigned long __pad2[4];
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} __attribute__((aligned(64)));
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extern struct trap_per_cpu trap_block[NR_CPUS];
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extern void init_cur_cpu_trap(void);
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extern void init_cur_cpu_trap(struct thread_info *);
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extern void setup_tba(void);
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#ifdef CONFIG_SMP
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