More .set to keep 32-bit processors happy.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -178,7 +178,9 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
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__asm__ __volatile__(
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" .set mips3 \n"
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"1: ll %0, %3 # xchg_u32 \n"
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" .set mips0 \n"
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" move %2, %z4 \n"
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" .set mips3 \n"
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" sc %2, %1 \n"
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" beqzl %2, 1b \n"
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ROT_IN_PIECES
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@ -195,7 +197,9 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
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__asm__ __volatile__(
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" .set mips3 \n"
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"1: ll %0, %3 # xchg_u32 \n"
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" .set mips0 \n"
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" move %2, %z4 \n"
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" .set mips3 \n"
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" sc %2, %1 \n"
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" beqz %2, 1b \n"
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#ifdef CONFIG_SMP
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