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mtd: mxc_nand: fix 2KiB pagesize NAND on i.MX27

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This patch allows i.MX27 to support 2KiB pagesize NAND flash.
We are using a 1.8V NAND flash which datasheet (unfortunately only
available under NDA) says :
Page size: x8: 2,112 bytes (2,048 + 64 bytes).
Without this patch, all sectors are marked as bad eraseblock.

Signed-off-by: Eric Benard <ebenard@eukrea.com>
Acked-by : Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Eric Benard 2009-06-29 13:58:01 +02:00 committed by David Woodhouse
parent 64da392ab0
commit 71b7d0d90d
1 changed files with 15 additions and 1 deletions
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16
drivers/mtd/nand/mxc_nand.c
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@ -857,6 +857,17 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
}
}
/* Define some generic bad / good block scan pattern which are used
* while scanning a device for factory marked good / bad blocks. */
static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
static struct nand_bbt_descr smallpage_memorybased = {
.options = NAND_BBT_SCAN2NDPAGE,
.offs = 5,
.len = 1,
.pattern = scan_ff_pattern
};
static int __init mxcnd_probe(struct platform_device *pdev)
{
struct nand_chip *this;
@ -973,7 +984,10 @@ static int __init mxcnd_probe(struct platform_device *pdev)
goto escan;
}
host->pagesize_2k = (mtd->writesize == 2048) ? 1 : 0;
if (mtd->writesize == 2048) {
host->pagesize_2k = 1;
this->badblock_pattern = &smallpage_memorybased;
}
if (this->ecc.mode == NAND_ECC_HW) {
switch (mtd->oobsize) {