Merge branch 'drm-fixes-4.1' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Mostly stability fixes for UVD and VCE, plus a few other bug and regression fixes. * 'drm-fixes-4.1' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: stop trying to suspend UVD sessions drm/radeon: more strictly validate the UVD codec drm/radeon: make UVD handle checking more strict drm/radeon: make VCE handle check more strict drm/radeon: fix userptr lockup drm/radeon: fix userptr BO unpin bug v3 drm/radeon: don't setup audio on asics that don't support it drm/radeon: disable semaphores for UVD V1 (v2)
This commit is contained in:
commit
7122e505a5
11 changed files with 190 additions and 87 deletions
|
@ -1673,7 +1673,6 @@ struct radeon_uvd {
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struct radeon_bo *vcpu_bo;
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void *cpu_addr;
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uint64_t gpu_addr;
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void *saved_bo;
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atomic_t handles[RADEON_MAX_UVD_HANDLES];
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struct drm_file *filp[RADEON_MAX_UVD_HANDLES];
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unsigned img_size[RADEON_MAX_UVD_HANDLES];
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@ -1202,7 +1202,7 @@ static struct radeon_asic rs780_asic = {
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static struct radeon_asic_ring rv770_uvd_ring = {
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.ib_execute = &uvd_v1_0_ib_execute,
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.emit_fence = &uvd_v2_2_fence_emit,
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.emit_semaphore = &uvd_v1_0_semaphore_emit,
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.emit_semaphore = &uvd_v2_2_semaphore_emit,
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.cs_parse = &radeon_uvd_cs_parse,
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.ring_test = &uvd_v1_0_ring_test,
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.ib_test = &uvd_v1_0_ib_test,
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@ -949,6 +949,10 @@ void uvd_v1_0_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
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int uvd_v2_2_resume(struct radeon_device *rdev);
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void uvd_v2_2_fence_emit(struct radeon_device *rdev,
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struct radeon_fence *fence);
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bool uvd_v2_2_semaphore_emit(struct radeon_device *rdev,
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struct radeon_ring *ring,
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struct radeon_semaphore *semaphore,
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bool emit_wait);
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/* uvd v3.1 */
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bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev,
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@ -464,6 +464,10 @@ void radeon_audio_detect(struct drm_connector *connector,
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return;
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rdev = connector->encoder->dev->dev_private;
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if (!radeon_audio_chipset_supported(rdev))
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return;
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radeon_encoder = to_radeon_encoder(connector->encoder);
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dig = radeon_encoder->enc_priv;
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@ -142,6 +142,9 @@ static void radeon_mn_invalidate_range_start(struct mmu_notifier *mn,
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list_for_each_entry(bo, &node->bos, mn_list) {
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if (!bo->tbo.ttm || bo->tbo.ttm->state != tt_bound)
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continue;
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r = radeon_bo_reserve(bo, true);
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if (r) {
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DRM_ERROR("(%ld) failed to reserve user bo\n", r);
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@ -591,8 +591,7 @@ static void radeon_ttm_tt_unpin_userptr(struct ttm_tt *ttm)
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{
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struct radeon_device *rdev = radeon_get_rdev(ttm->bdev);
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struct radeon_ttm_tt *gtt = (void *)ttm;
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struct scatterlist *sg;
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int i;
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struct sg_page_iter sg_iter;
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int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
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enum dma_data_direction direction = write ?
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@ -605,9 +604,8 @@ static void radeon_ttm_tt_unpin_userptr(struct ttm_tt *ttm)
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/* free the sg table and pages again */
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dma_unmap_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction);
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for_each_sg(ttm->sg->sgl, sg, ttm->sg->nents, i) {
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struct page *page = sg_page(sg);
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for_each_sg_page(ttm->sg->sgl, &sg_iter, ttm->sg->nents, 0) {
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struct page *page = sg_page_iter_page(&sg_iter);
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if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
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set_page_dirty(page);
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@ -204,28 +204,32 @@ void radeon_uvd_fini(struct radeon_device *rdev)
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int radeon_uvd_suspend(struct radeon_device *rdev)
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{
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unsigned size;
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void *ptr;
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int i;
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int i, r;
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if (rdev->uvd.vcpu_bo == NULL)
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return 0;
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for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i)
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if (atomic_read(&rdev->uvd.handles[i]))
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break;
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for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) {
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uint32_t handle = atomic_read(&rdev->uvd.handles[i]);
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if (handle != 0) {
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struct radeon_fence *fence;
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if (i == RADEON_MAX_UVD_HANDLES)
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return 0;
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radeon_uvd_note_usage(rdev);
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size = radeon_bo_size(rdev->uvd.vcpu_bo);
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size -= rdev->uvd_fw->size;
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r = radeon_uvd_get_destroy_msg(rdev,
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R600_RING_TYPE_UVD_INDEX, handle, &fence);
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if (r) {
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DRM_ERROR("Error destroying UVD (%d)!\n", r);
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continue;
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}
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ptr = rdev->uvd.cpu_addr;
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ptr += rdev->uvd_fw->size;
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radeon_fence_wait(fence, false);
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radeon_fence_unref(&fence);
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rdev->uvd.saved_bo = kmalloc(size, GFP_KERNEL);
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memcpy(rdev->uvd.saved_bo, ptr, size);
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rdev->uvd.filp[i] = NULL;
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atomic_set(&rdev->uvd.handles[i], 0);
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}
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}
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return 0;
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}
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@ -246,12 +250,7 @@ int radeon_uvd_resume(struct radeon_device *rdev)
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ptr = rdev->uvd.cpu_addr;
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ptr += rdev->uvd_fw->size;
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if (rdev->uvd.saved_bo != NULL) {
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memcpy(ptr, rdev->uvd.saved_bo, size);
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kfree(rdev->uvd.saved_bo);
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rdev->uvd.saved_bo = NULL;
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} else
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memset(ptr, 0, size);
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memset(ptr, 0, size);
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return 0;
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}
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@ -396,6 +395,29 @@ static int radeon_uvd_cs_msg_decode(uint32_t *msg, unsigned buf_sizes[])
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return 0;
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}
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static int radeon_uvd_validate_codec(struct radeon_cs_parser *p,
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unsigned stream_type)
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{
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switch (stream_type) {
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case 0: /* H264 */
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case 1: /* VC1 */
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/* always supported */
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return 0;
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case 3: /* MPEG2 */
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case 4: /* MPEG4 */
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/* only since UVD 3 */
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if (p->rdev->family >= CHIP_PALM)
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return 0;
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/* fall through */
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default:
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DRM_ERROR("UVD codec not supported by hardware %d!\n",
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stream_type);
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return -EINVAL;
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}
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}
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static int radeon_uvd_cs_msg(struct radeon_cs_parser *p, struct radeon_bo *bo,
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unsigned offset, unsigned buf_sizes[])
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{
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@ -436,50 +458,70 @@ static int radeon_uvd_cs_msg(struct radeon_cs_parser *p, struct radeon_bo *bo,
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return -EINVAL;
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}
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if (msg_type == 1) {
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/* it's a decode msg, calc buffer sizes */
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r = radeon_uvd_cs_msg_decode(msg, buf_sizes);
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/* calc image size (width * height) */
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img_size = msg[6] * msg[7];
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switch (msg_type) {
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case 0:
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/* it's a create msg, calc image size (width * height) */
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img_size = msg[7] * msg[8];
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r = radeon_uvd_validate_codec(p, msg[4]);
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radeon_bo_kunmap(bo);
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if (r)
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return r;
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} else if (msg_type == 2) {
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/* try to alloc a new handle */
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for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) {
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if (atomic_read(&p->rdev->uvd.handles[i]) == handle) {
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DRM_ERROR("Handle 0x%x already in use!\n", handle);
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return -EINVAL;
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}
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if (!atomic_cmpxchg(&p->rdev->uvd.handles[i], 0, handle)) {
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p->rdev->uvd.filp[i] = p->filp;
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p->rdev->uvd.img_size[i] = img_size;
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return 0;
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}
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}
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DRM_ERROR("No more free UVD handles!\n");
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return -EINVAL;
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case 1:
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/* it's a decode msg, validate codec and calc buffer sizes */
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r = radeon_uvd_validate_codec(p, msg[4]);
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if (!r)
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r = radeon_uvd_cs_msg_decode(msg, buf_sizes);
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radeon_bo_kunmap(bo);
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if (r)
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return r;
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/* validate the handle */
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for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) {
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if (atomic_read(&p->rdev->uvd.handles[i]) == handle) {
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if (p->rdev->uvd.filp[i] != p->filp) {
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DRM_ERROR("UVD handle collision detected!\n");
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return -EINVAL;
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}
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return 0;
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}
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}
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DRM_ERROR("Invalid UVD handle 0x%x!\n", handle);
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return -ENOENT;
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case 2:
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/* it's a destroy msg, free the handle */
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for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i)
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atomic_cmpxchg(&p->rdev->uvd.handles[i], handle, 0);
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radeon_bo_kunmap(bo);
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return 0;
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} else {
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/* it's a create msg, calc image size (width * height) */
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img_size = msg[7] * msg[8];
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radeon_bo_kunmap(bo);
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if (msg_type != 0) {
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DRM_ERROR("Illegal UVD message type (%d)!\n", msg_type);
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return -EINVAL;
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}
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default:
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/* it's a create msg, no special handling needed */
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DRM_ERROR("Illegal UVD message type (%d)!\n", msg_type);
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return -EINVAL;
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}
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|
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/* create or decode, validate the handle */
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for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) {
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if (atomic_read(&p->rdev->uvd.handles[i]) == handle)
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return 0;
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}
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/* handle not found try to alloc a new one */
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for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) {
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if (!atomic_cmpxchg(&p->rdev->uvd.handles[i], 0, handle)) {
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p->rdev->uvd.filp[i] = p->filp;
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p->rdev->uvd.img_size[i] = img_size;
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return 0;
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}
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}
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|
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DRM_ERROR("No more free UVD handles!\n");
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BUG();
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return -EINVAL;
|
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}
|
||||
|
||||
|
|
|
@ -493,18 +493,27 @@ int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi,
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|||
*
|
||||
* @p: parser context
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* @handle: handle to validate
|
||||
* @allocated: allocated a new handle?
|
||||
*
|
||||
* Validates the handle and return the found session index or -EINVAL
|
||||
* we we don't have another free session index.
|
||||
*/
|
||||
int radeon_vce_validate_handle(struct radeon_cs_parser *p, uint32_t handle)
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||||
static int radeon_vce_validate_handle(struct radeon_cs_parser *p,
|
||||
uint32_t handle, bool *allocated)
|
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{
|
||||
unsigned i;
|
||||
|
||||
*allocated = false;
|
||||
|
||||
/* validate the handle */
|
||||
for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
|
||||
if (atomic_read(&p->rdev->vce.handles[i]) == handle)
|
||||
if (atomic_read(&p->rdev->vce.handles[i]) == handle) {
|
||||
if (p->rdev->vce.filp[i] != p->filp) {
|
||||
DRM_ERROR("VCE handle collision detected!\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
/* handle not found try to alloc a new one */
|
||||
|
@ -512,6 +521,7 @@ int radeon_vce_validate_handle(struct radeon_cs_parser *p, uint32_t handle)
|
|||
if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) {
|
||||
p->rdev->vce.filp[i] = p->filp;
|
||||
p->rdev->vce.img_size[i] = 0;
|
||||
*allocated = true;
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
@ -529,10 +539,10 @@ int radeon_vce_validate_handle(struct radeon_cs_parser *p, uint32_t handle)
|
|||
int radeon_vce_cs_parse(struct radeon_cs_parser *p)
|
||||
{
|
||||
int session_idx = -1;
|
||||
bool destroyed = false;
|
||||
bool destroyed = false, created = false, allocated = false;
|
||||
uint32_t tmp, handle = 0;
|
||||
uint32_t *size = &tmp;
|
||||
int i, r;
|
||||
int i, r = 0;
|
||||
|
||||
while (p->idx < p->chunk_ib->length_dw) {
|
||||
uint32_t len = radeon_get_ib_value(p, p->idx);
|
||||
|
@ -540,18 +550,21 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p)
|
|||
|
||||
if ((len < 8) || (len & 3)) {
|
||||
DRM_ERROR("invalid VCE command length (%d)!\n", len);
|
||||
return -EINVAL;
|
||||
r = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (destroyed) {
|
||||
DRM_ERROR("No other command allowed after destroy!\n");
|
||||
return -EINVAL;
|
||||
r = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
switch (cmd) {
|
||||
case 0x00000001: // session
|
||||
handle = radeon_get_ib_value(p, p->idx + 2);
|
||||
session_idx = radeon_vce_validate_handle(p, handle);
|
||||
session_idx = radeon_vce_validate_handle(p, handle,
|
||||
&allocated);
|
||||
if (session_idx < 0)
|
||||
return session_idx;
|
||||
size = &p->rdev->vce.img_size[session_idx];
|
||||
|
@ -561,6 +574,13 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p)
|
|||
break;
|
||||
|
||||
case 0x01000001: // create
|
||||
created = true;
|
||||
if (!allocated) {
|
||||
DRM_ERROR("Handle already in use!\n");
|
||||
r = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
*size = radeon_get_ib_value(p, p->idx + 8) *
|
||||
radeon_get_ib_value(p, p->idx + 10) *
|
||||
8 * 3 / 2;
|
||||
|
@ -578,12 +598,12 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p)
|
|||
r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9,
|
||||
*size);
|
||||
if (r)
|
||||
return r;
|
||||
goto out;
|
||||
|
||||
r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11,
|
||||
*size / 3);
|
||||
if (r)
|
||||
return r;
|
||||
goto out;
|
||||
break;
|
||||
|
||||
case 0x02000001: // destroy
|
||||
|
@ -594,7 +614,7 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p)
|
|||
r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
|
||||
*size * 2);
|
||||
if (r)
|
||||
return r;
|
||||
goto out;
|
||||
break;
|
||||
|
||||
case 0x05000004: // video bitstream buffer
|
||||
|
@ -602,36 +622,47 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p)
|
|||
r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
|
||||
tmp);
|
||||
if (r)
|
||||
return r;
|
||||
goto out;
|
||||
break;
|
||||
|
||||
case 0x05000005: // feedback buffer
|
||||
r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
|
||||
4096);
|
||||
if (r)
|
||||
return r;
|
||||
goto out;
|
||||
break;
|
||||
|
||||
default:
|
||||
DRM_ERROR("invalid VCE command (0x%x)!\n", cmd);
|
||||
return -EINVAL;
|
||||
r = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (session_idx == -1) {
|
||||
DRM_ERROR("no session command at start of IB\n");
|
||||
return -EINVAL;
|
||||
r = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
p->idx += len / 4;
|
||||
}
|
||||
|
||||
if (destroyed) {
|
||||
/* IB contains a destroy msg, free the handle */
|
||||
if (allocated && !created) {
|
||||
DRM_ERROR("New session without create command!\n");
|
||||
r = -ENOENT;
|
||||
}
|
||||
|
||||
out:
|
||||
if ((!r && destroyed) || (r && allocated)) {
|
||||
/*
|
||||
* IB contains a destroy msg or we have allocated an
|
||||
* handle and got an error, anyway free the handle
|
||||
*/
|
||||
for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i)
|
||||
atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
return r;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -989,6 +989,9 @@
|
|||
((n) & 0x3FFF) << 16)
|
||||
|
||||
/* UVD */
|
||||
#define UVD_SEMA_ADDR_LOW 0xef00
|
||||
#define UVD_SEMA_ADDR_HIGH 0xef04
|
||||
#define UVD_SEMA_CMD 0xef08
|
||||
#define UVD_GPCOM_VCPU_CMD 0xef0c
|
||||
#define UVD_GPCOM_VCPU_DATA0 0xef10
|
||||
#define UVD_GPCOM_VCPU_DATA1 0xef14
|
||||
|
|
|
@ -466,18 +466,8 @@ bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev,
|
|||
struct radeon_semaphore *semaphore,
|
||||
bool emit_wait)
|
||||
{
|
||||
uint64_t addr = semaphore->gpu_addr;
|
||||
|
||||
radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0));
|
||||
radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF);
|
||||
|
||||
radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_HIGH, 0));
|
||||
radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF);
|
||||
|
||||
radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0));
|
||||
radeon_ring_write(ring, emit_wait ? 1 : 0);
|
||||
|
||||
return true;
|
||||
/* disable semaphores for UVD V1 hardware */
|
||||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -59,6 +59,35 @@ void uvd_v2_2_fence_emit(struct radeon_device *rdev,
|
|||
radeon_ring_write(ring, 2);
|
||||
}
|
||||
|
||||
/**
|
||||
* uvd_v2_2_semaphore_emit - emit semaphore command
|
||||
*
|
||||
* @rdev: radeon_device pointer
|
||||
* @ring: radeon_ring pointer
|
||||
* @semaphore: semaphore to emit commands for
|
||||
* @emit_wait: true if we should emit a wait command
|
||||
*
|
||||
* Emit a semaphore command (either wait or signal) to the UVD ring.
|
||||
*/
|
||||
bool uvd_v2_2_semaphore_emit(struct radeon_device *rdev,
|
||||
struct radeon_ring *ring,
|
||||
struct radeon_semaphore *semaphore,
|
||||
bool emit_wait)
|
||||
{
|
||||
uint64_t addr = semaphore->gpu_addr;
|
||||
|
||||
radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0));
|
||||
radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF);
|
||||
|
||||
radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_HIGH, 0));
|
||||
radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF);
|
||||
|
||||
radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0));
|
||||
radeon_ring_write(ring, emit_wait ? 1 : 0);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* uvd_v2_2_resume - memory controller programming
|
||||
*
|
||||
|
|
Loading…
Reference in a new issue