m32r: Rename STI/CLI macros
The names of STI and CLI macros were derived from i386 arch historically, but their name are incomprehensible. So, for easy to understand, rename these macros to ENABLE_INTERRUPTS and DISABLE_INTERRUPTS, respectively. Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
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33205613cd
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7071b2914a
2 changed files with 16 additions and 16 deletions
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@ -112,7 +112,7 @@
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#define nr_syscalls ((syscall_table_size)/4)
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#define nr_syscalls ((syscall_table_size)/4)
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#ifdef CONFIG_PREEMPT
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#ifdef CONFIG_PREEMPT
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#define preempt_stop(x) CLI(x)
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#define preempt_stop(x) DISABLE_INTERRUPTS(x)
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#else
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#else
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#define preempt_stop(x)
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#define preempt_stop(x)
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#define resume_kernel restore_all
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#define resume_kernel restore_all
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@ -144,7 +144,7 @@ ret_from_intr:
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#endif
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#endif
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beqz r4, resume_kernel
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beqz r4, resume_kernel
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ENTRY(resume_userspace)
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ENTRY(resume_userspace)
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CLI(r4) ; make sure we don't miss an interrupt
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DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
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; setting need_resched or sigpending
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; setting need_resched or sigpending
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; between sampling and the iret
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; between sampling and the iret
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GET_THREAD_INFO(r8)
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GET_THREAD_INFO(r8)
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@ -168,11 +168,11 @@ need_resched:
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beqz r4, restore_all
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beqz r4, restore_all
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LDIMM (r4, PREEMPT_ACTIVE)
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LDIMM (r4, PREEMPT_ACTIVE)
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st r4, @(TI_PRE_COUNT, r8)
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st r4, @(TI_PRE_COUNT, r8)
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STI(r4)
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ENABLE_INTERRUPTS(r4)
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bl schedule
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bl schedule
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ldi r4, #0
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ldi r4, #0
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st r4, @(TI_PRE_COUNT, r8)
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st r4, @(TI_PRE_COUNT, r8)
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CLI(r4)
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DISABLE_INTERRUPTS(r4)
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bra need_resched
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bra need_resched
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#endif
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#endif
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@ -180,7 +180,7 @@ need_resched:
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ENTRY(system_call)
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ENTRY(system_call)
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SWITCH_TO_KERNEL_STACK
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SWITCH_TO_KERNEL_STACK
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SAVE_ALL
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SAVE_ALL
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STI(r4) ; Enable interrupt
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ENABLE_INTERRUPTS(r4) ; Enable interrupt
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st sp, PTREGS(sp) ; implicit pt_regs parameter
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st sp, PTREGS(sp) ; implicit pt_regs parameter
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cmpui r7, #NR_syscalls
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cmpui r7, #NR_syscalls
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bnc syscall_badsys
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bnc syscall_badsys
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@ -198,7 +198,7 @@ syscall_call:
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jl r7 ; execute system call
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jl r7 ; execute system call
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st r0, R0(sp) ; save the return value
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st r0, R0(sp) ; save the return value
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syscall_exit:
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syscall_exit:
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CLI(r4) ; make sure we don't miss an interrupt
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DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
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; setting need_resched or sigpending
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; setting need_resched or sigpending
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; between sampling and the iret
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; between sampling and the iret
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ld r9, @(TI_FLAGS, r8)
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ld r9, @(TI_FLAGS, r8)
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@ -215,7 +215,7 @@ work_pending:
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beqz r4, work_notifysig
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beqz r4, work_notifysig
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work_resched:
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work_resched:
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bl schedule
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bl schedule
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CLI(r4) ; make sure we don't miss an interrupt
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DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
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; setting need_resched or sigpending
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; setting need_resched or sigpending
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; between sampling and the iret
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; between sampling and the iret
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ld r9, @(TI_FLAGS, r8)
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ld r9, @(TI_FLAGS, r8)
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@ -257,7 +257,7 @@ syscall_exit_work:
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ld r9, @(TI_FLAGS, r8)
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_SYSCALL_TRACE
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and3 r4, r9, #_TIF_SYSCALL_TRACE
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beqz r4, work_pending
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beqz r4, work_pending
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STI(r4) ; could let do_syscall_trace() call
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ENABLE_INTERRUPTS(r4) ; could let do_syscall_trace() call
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; schedule() instead
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; schedule() instead
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bl do_syscall_trace
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bl do_syscall_trace
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bra resume_userspace
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bra resume_userspace
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@ -52,27 +52,27 @@
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.endm
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.endm
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#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
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#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
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#define STI(reg) STI_M reg
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#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
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.macro STI_M reg
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.macro ENABLE_INTERRUPTS reg
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setpsw #0x40 -> nop
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setpsw #0x40 -> nop
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; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
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; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
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.endm
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.endm
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#define CLI(reg) CLI_M reg
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#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
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.macro CLI_M reg
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.macro DISABLE_INTERRUPTS reg
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clrpsw #0x40 -> nop
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clrpsw #0x40 -> nop
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; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
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; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
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.endm
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.endm
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#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
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#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
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#define STI(reg) STI_M reg
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#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
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.macro STI_M reg
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.macro ENABLE_INTERRUPTS reg
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mvfc \reg, psw
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mvfc \reg, psw
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or3 \reg, \reg, #0x0040
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or3 \reg, \reg, #0x0040
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mvtc \reg, psw
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mvtc \reg, psw
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.endm
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.endm
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#define CLI(reg) CLI_M reg
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#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
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.macro CLI_M reg
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.macro DISABLE_INTERRUPTS reg
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mvfc \reg, psw
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mvfc \reg, psw
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and3 \reg, \reg, #0xffbf
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and3 \reg, \reg, #0xffbf
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mvtc \reg, psw
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mvtc \reg, psw
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