Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

ARM: tegra: select correct parent clk for pll_p

Browse source 
For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of
pll_ref in the tegra30_clk_init_table and this is resulting in a
boot-time warning. This patch fixes this by correcting the clk init
table.

Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Sivaram Nair 2012-11-20 09:29:16 +02:00 committed by Stephen Warren
parent 9489e9dcae
commit 6eb583da95
1 changed files with 1 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/mach-tegra/common.c
View file

@ -102,7 +102,7 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = { static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
/* name parent rate enabled */ /* name parent rate enabled */
{ "clk_m", NULL, 0, true }, { "clk_m", NULL, 0, true },
{ "pll_p", "clk_m", 408000000, true }, { "pll_p", "pll_ref", 408000000, true },
{ "pll_p_out1", "pll_p", 9600000, true }, { "pll_p_out1", "pll_p", 9600000, true },
{ NULL, NULL, 0, 0}, { NULL, NULL, 0, 0},
}; };