sh: Kill off broken snapgear ds1302 code.
This will force the snapgear boards to use the on-chip SH RTC instead, until the rtc-ds1302 driver is merged. The current code is broken and hasn't built in some time, so just kill it off and get the board working again. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
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cbeb13447f
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6d1c76d4e7
3 changed files with 2 additions and 326 deletions
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@ -2,5 +2,4 @@
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# Makefile for the SnapGear specific parts of the kernel
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#
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obj-y := setup.o io.o rtc.o
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obj-y := setup.o io.o
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@ -1,309 +0,0 @@
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/****************************************************************************/
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/*
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* linux/arch/sh/boards/snapgear/rtc.c -- Secureedge5410 RTC code
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*
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* Copyright (C) 2002 David McCullough <davidm@snapgear.com>
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* Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
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*
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* The SecureEdge5410 can have one of 2 real time clocks, the SH
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* built in version or the preferred external DS1302. Here we work out
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* each to see what we have and then run with it.
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*/
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/****************************************************************************/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/time.h>
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#include <linux/rtc.h>
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#include <linux/mc146818rtc.h>
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#include <asm/io.h>
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static int use_ds1302;
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/****************************************************************************/
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/*
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* we need to implement a DS1302 driver here that can operate in
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* conjunction with the builtin rtc driver which is already quite friendly
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*/
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/*****************************************************************************/
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#define RTC_CMD_READ 0x81 /* Read command */
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#define RTC_CMD_WRITE 0x80 /* Write command */
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#define RTC_ADDR_YEAR 0x06 /* Address of year register */
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#define RTC_ADDR_DAY 0x05 /* Address of day of week register */
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#define RTC_ADDR_MON 0x04 /* Address of month register */
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#define RTC_ADDR_DATE 0x03 /* Address of day of month register */
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#define RTC_ADDR_HOUR 0x02 /* Address of hour register */
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#define RTC_ADDR_MIN 0x01 /* Address of minute register */
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#define RTC_ADDR_SEC 0x00 /* Address of second register */
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#define RTC_RESET 0x1000
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#define RTC_IODATA 0x0800
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#define RTC_SCLK 0x0400
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#define set_dirp(x)
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#define get_dirp(x) 0
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#define set_dp(x) SECUREEDGE_WRITE_IOPORT(x, 0x1c00)
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#define get_dp(x) SECUREEDGE_READ_IOPORT()
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static void ds1302_sendbits(unsigned int val)
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{
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int i;
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for (i = 8; (i); i--, val >>= 1) {
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set_dp((get_dp() & ~RTC_IODATA) | ((val & 0x1) ? RTC_IODATA : 0));
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set_dp(get_dp() | RTC_SCLK); // clock high
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set_dp(get_dp() & ~RTC_SCLK); // clock low
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}
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}
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static unsigned int ds1302_recvbits(void)
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{
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unsigned int val;
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int i;
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for (i = 0, val = 0; (i < 8); i++) {
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val |= (((get_dp() & RTC_IODATA) ? 1 : 0) << i);
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set_dp(get_dp() | RTC_SCLK); // clock high
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set_dp(get_dp() & ~RTC_SCLK); // clock low
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}
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return(val);
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}
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static unsigned int ds1302_readbyte(unsigned int addr)
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{
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unsigned int val;
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unsigned long flags;
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local_irq_save(flags);
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set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
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set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
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set_dp(get_dp() | RTC_RESET);
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ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ);
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set_dirp(get_dirp() & ~RTC_IODATA);
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val = ds1302_recvbits();
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set_dp(get_dp() & ~RTC_RESET);
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local_irq_restore(flags);
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return(val);
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}
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static void ds1302_writebyte(unsigned int addr, unsigned int val)
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{
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unsigned long flags;
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local_irq_save(flags);
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set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
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set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
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set_dp(get_dp() | RTC_RESET);
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ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE);
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ds1302_sendbits(val);
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set_dp(get_dp() & ~RTC_RESET);
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local_irq_restore(flags);
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}
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static void ds1302_reset(void)
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{
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unsigned long flags;
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/* Hardware dependent reset/init */
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local_irq_save(flags);
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set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
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set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
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local_irq_restore(flags);
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}
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/*****************************************************************************/
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static inline int bcd2int(int val)
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{
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return((((val & 0xf0) >> 4) * 10) + (val & 0xf));
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}
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static inline int int2bcd(int val)
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{
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return(((val / 10) << 4) + (val % 10));
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}
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/*****************************************************************************/
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/*
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* Write and Read some RAM in the DS1302, if it works assume it's there
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* Otherwise use the SH4 internal RTC
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*/
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void snapgear_rtc_gettimeofday(struct timespec *);
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int snapgear_rtc_settimeofday(const time_t);
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void __init secureedge5410_rtc_init(void)
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{
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unsigned char *test = "snapgear";
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int i;
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ds1302_reset();
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use_ds1302 = 1;
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for (i = 0; test[i]; i++)
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ds1302_writebyte(32 + i, test[i]);
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for (i = 0; test[i]; i++)
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if (ds1302_readbyte(32 + i) != test[i]) {
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use_ds1302 = 0;
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break;
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}
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if (use_ds1302) {
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rtc_sh_get_time = snapgear_rtc_gettimeofday;
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rtc_sh_set_time = snapgear_rtc_settimeofday;
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}
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printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal");
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}
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/****************************************************************************/
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/*
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* our generic interface that chooses the correct code to use
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*/
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void snapgear_rtc_gettimeofday(struct timespec *ts)
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{
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unsigned int sec, min, hr, day, mon, yr;
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if (!use_ds1302)
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return;
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sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC));
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min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN));
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hr = bcd2int(ds1302_readbyte(RTC_ADDR_HOUR));
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day = bcd2int(ds1302_readbyte(RTC_ADDR_DATE));
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mon = bcd2int(ds1302_readbyte(RTC_ADDR_MON));
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yr = bcd2int(ds1302_readbyte(RTC_ADDR_YEAR));
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bad_time:
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if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
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hr > 23 || min > 59 || sec > 59) {
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printk(KERN_ERR
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"SnapGear RTC: invalid value, resetting to 1 Jan 2000\n");
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ds1302_writebyte(RTC_ADDR_MIN, min = 0);
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ds1302_writebyte(RTC_ADDR_HOUR, hr = 0);
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ds1302_writebyte(RTC_ADDR_DAY, 7);
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ds1302_writebyte(RTC_ADDR_DATE, day = 1);
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ds1302_writebyte(RTC_ADDR_MON, mon = 1);
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ds1302_writebyte(RTC_ADDR_YEAR, yr = 0);
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ds1302_writebyte(RTC_ADDR_SEC, sec = 0);
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}
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ts->tv_sec = mktime(2000 + yr, mon, day, hr, min, sec);
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if (ts->tv_sec < 0) {
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#if 0
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printk("BAD TIME %d %d %d %d %d %d\n", yr, mon, day, hr, min, sec);
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#endif
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yr = 100;
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goto bad_time;
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}
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ts->tv_nsec = 0;
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}
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int snapgear_rtc_settimeofday(const time_t secs)
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{
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int retval = 0;
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int real_seconds, real_minutes, cmos_minutes;
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unsigned long nowtime;
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if (!use_ds1302)
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return 0;
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/*
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* This is called direct from the kernel timer handling code.
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* It is supposed to synchronize the kernel clock to the RTC.
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*/
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nowtime = secs;
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/* STOP RTC */
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ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
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cmos_minutes = bcd2int(ds1302_readbyte(RTC_ADDR_MIN));
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/*
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* since we're only adjusting minutes and seconds,
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* don't interfere with hour overflow. This avoids
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* messing with unknown time zones but requires your
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* RTC not to be off by more than 15 minutes
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*/
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real_seconds = nowtime % 60;
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real_minutes = nowtime / 60;
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if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
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real_minutes += 30; /* correct for half hour time zone */
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real_minutes %= 60;
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if (abs(real_minutes - cmos_minutes) < 30) {
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ds1302_writebyte(RTC_ADDR_MIN, int2bcd(real_minutes));
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ds1302_writebyte(RTC_ADDR_SEC, int2bcd(real_seconds));
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} else {
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printk(KERN_WARNING
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"SnapGear RTC: can't update from %d to %d\n",
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cmos_minutes, real_minutes);
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retval = -1;
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}
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/* START RTC */
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ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80);
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return(0);
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}
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unsigned char secureedge5410_cmos_read(int addr)
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{
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unsigned char val = 0;
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if (!use_ds1302)
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return(__CMOS_READ(addr, w));
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switch(addr) {
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case RTC_SECONDS: val = ds1302_readbyte(RTC_ADDR_SEC); break;
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case RTC_SECONDS_ALARM: break;
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case RTC_MINUTES: val = ds1302_readbyte(RTC_ADDR_MIN); break;
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case RTC_MINUTES_ALARM: break;
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case RTC_HOURS: val = ds1302_readbyte(RTC_ADDR_HOUR); break;
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case RTC_HOURS_ALARM: break;
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case RTC_DAY_OF_WEEK: val = ds1302_readbyte(RTC_ADDR_DAY); break;
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case RTC_DAY_OF_MONTH: val = ds1302_readbyte(RTC_ADDR_DATE); break;
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case RTC_MONTH: val = ds1302_readbyte(RTC_ADDR_MON); break;
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case RTC_YEAR: val = ds1302_readbyte(RTC_ADDR_YEAR); break;
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case RTC_REG_A: /* RTC_FREQ_SELECT */ break;
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case RTC_REG_B: /* RTC_CONTROL */ break;
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case RTC_REG_C: /* RTC_INTR_FLAGS */ break;
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case RTC_REG_D: val = RTC_VRT /* RTC_VALID */; break;
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default: break;
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}
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return(val);
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}
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void secureedge5410_cmos_write(unsigned char val, int addr)
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{
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if (!use_ds1302) {
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__CMOS_WRITE(val, addr, w);
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return;
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}
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switch(addr) {
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case RTC_SECONDS: ds1302_writebyte(RTC_ADDR_SEC, val); break;
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case RTC_SECONDS_ALARM: break;
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case RTC_MINUTES: ds1302_writebyte(RTC_ADDR_MIN, val); break;
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case RTC_MINUTES_ALARM: break;
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case RTC_HOURS: ds1302_writebyte(RTC_ADDR_HOUR, val); break;
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case RTC_HOURS_ALARM: break;
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case RTC_DAY_OF_WEEK: ds1302_writebyte(RTC_ADDR_DAY, val); break;
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case RTC_DAY_OF_MONTH: ds1302_writebyte(RTC_ADDR_DATE, val); break;
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case RTC_MONTH: ds1302_writebyte(RTC_ADDR_MON, val); break;
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case RTC_YEAR: ds1302_writebyte(RTC_ADDR_YEAR, val); break;
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case RTC_REG_A: /* RTC_FREQ_SELECT */ break;
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case RTC_REG_B: /* RTC_CONTROL */ break;
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case RTC_REG_C: /* RTC_INTR_FLAGS */ break;
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case RTC_REG_D: /* RTC_VALID */ break;
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default: break;
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}
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}
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@ -22,20 +22,15 @@
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#include <asm/snapgear.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/rtc.h>
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#include <asm/cpu/timer.h>
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extern void secureedge5410_rtc_init(void);
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extern void pcibios_init(void);
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/****************************************************************************/
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/*
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* EraseConfig handling functions
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*/
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static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
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{
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volatile char dummy __attribute__((unused)) = * (volatile char *) 0xb8000000;
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(void)ctrl_inb(0xb8000000); /* dummy read */
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printk("SnapGear: erase switch interrupt!\n");
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plat_irq_setup_pins(IRQ_MODE_IRQ);
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}
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/*
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* Initialize the board
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*/
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static void __init snapgear_setup(char **cmdline_p)
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{
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board_time_init = secureedge5410_rtc_init;
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}
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/*
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* The Machine Vector
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*/
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static struct sh_machine_vector mv_snapgear __initmv = {
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.mv_name = "SnapGear SecureEdge5410",
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.mv_setup = snapgear_setup,
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.mv_nr_irqs = 72,
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.mv_inb = snapgear_inb,
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