ASoC: tlv320dac33: BCLK divider fix
The BCLK divider was not configured in case of mode7. This leads to unpredictable behavior when switching between FIFO modes. Configure the BCLK divider depending on the fifo_mode (FIFO is in use, or FIFO bypass). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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1 changed files with 6 additions and 5 deletions
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@ -845,11 +845,14 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
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dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
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dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
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/* BCLK divide ratio */
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if (dac33->fifo_mode)
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dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 3);
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else
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dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
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switch (dac33->fifo_mode) {
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case DAC33_FIFO_MODE1:
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/* 20: BCLK divide ratio */
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dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 3);
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dac33_write16(codec, DAC33_ATHR_MSB,
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DAC33_THRREG(dac33->alarm_threshold));
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break;
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@ -864,8 +867,6 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
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DAC33_THRREG(10));
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break;
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default:
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/* BYPASS mode */
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dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
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break;
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}
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