Staging: comedi: add ni_at_ao driver
Driver for National Instruments AT-AO-6/10 cards From: David Schleef <ds@schleef.org> Cc: Ian Abbott <abbotti@mev.co.uk> Cc: Frank Mori Hess <fmhess@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
David Schleef
Greg Kroah-Hartman
parent
3c5e17227e
commit
6a9d800ffe
1 changed files with 451 additions and 0 deletions
451
drivers/staging/comedi/drivers/ni_at_ao.c
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451
drivers/staging/comedi/drivers/ni_at_ao.c
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/*
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comedi/drivers/ni_at_ao.c
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Driver for NI AT-AO-6/10 boards
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COMEDI - Linux Control and Measurement Device Interface
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Copyright (C) 2000,2002 David A. Schleef <ds@schleef.org>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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Driver: ni_at_ao
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Description: National Instruments AT-AO-6/10
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Devices: [National Instruments] AT-AO-6 (at-ao-6), AT-AO-10 (at-ao-10)
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Status: should work
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Author: ds
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Updated: Sun Dec 26 12:26:28 EST 2004
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Configuration options:
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[0] - I/O port base address
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[1] - IRQ (unused)
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[2] - DMA (unused)
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[3] - analog output range, set by jumpers on hardware (0 for -10 to 10V bipolar, 1 for 0V to 10V unipolar)
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*/
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/*
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* Register-level programming information can be found in NI
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* document 320379.pdf.
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*/
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#include "../comedidev.h"
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#include <linux/ioport.h>
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/* board egisters */
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/* registers with _2_ are accessed when GRP2WR is set in CFG1 */
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#define ATAO_SIZE 0x20
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#define ATAO_2_DMATCCLR 0x00 /* W 16 */
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#define ATAO_DIN 0x00 /* R 16 */
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#define ATAO_DOUT 0x00 /* W 16 */
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#define ATAO_CFG2 0x02 /* W 16 */
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#define CALLD1 0x8000
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#define CALLD0 0x4000
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#define FFRTEN 0x2000
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#define DAC2S8 0x1000
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#define DAC2S6 0x0800
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#define DAC2S4 0x0400
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#define DAC2S2 0x0200
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#define DAC2S0 0x0100
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#define LDAC8 0x0080
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#define LDAC6 0x0040
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#define LDAC4 0x0020
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#define LDAC2 0x0010
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#define LDAC0 0x0008
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#define PROMEN 0x0004
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#define SCLK 0x0002
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#define SDATA 0x0001
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#define ATAO_2_INT1CLR 0x02 /* W 16 */
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#define ATAO_CFG3 0x04 /* W 16 */
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#define DMAMODE 0x0040
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#define CLKOUT 0x0020
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#define RCLKEN 0x0010
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#define DOUTEN2 0x0008
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#define DOUTEN1 0x0004
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#define EN2_5V 0x0002
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#define SCANEN 0x0001
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#define ATAO_2_INT2CLR 0x04 /* W 16 */
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#define ATAO_82C53_BASE 0x06 /* RW 8 */
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#define ATAO_82C53_CNTR1 0x06 /* RW 8 */
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#define ATAO_82C53_CNTR2 0x07 /* RW 8 */
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#define ATAO_82C53_CNTR3 0x08 /* RW 8 */
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#define ATAO_82C53_CNTRCMD 0x09 /* W 8 */
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#define CNTRSEL1 0x80
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#define CNTRSEL0 0x40
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#define RWSEL1 0x20
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#define RWSEL0 0x10
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#define MODESEL2 0x08
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#define MODESEL1 0x04
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#define MODESEL0 0x02
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#define BCDSEL 0x01
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/* read-back command */
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#define COUNT 0x20
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#define STATUS 0x10
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#define CNTR3 0x08
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#define CNTR2 0x04
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#define CNTR1 0x02
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/* status */
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#define OUT 0x80
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#define _NULL 0x40
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#define RW1 0x20
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#define RW0 0x10
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#define MODE2 0x08
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#define MODE1 0x04
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#define MODE0 0x02
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#define BCD 0x01
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#define ATAO_2_RTSISHFT 0x06 /* W 8 */
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#define RSI 0x01
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#define ATAO_2_RTSISTRB 0x07 /* W 8 */
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#define ATAO_CFG1 0x0a /* W 16 */
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#define EXTINT2EN 0x8000
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#define EXTINT1EN 0x4000
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#define CNTINT2EN 0x2000
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#define CNTINT1EN 0x1000
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#define TCINTEN 0x0800
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#define CNT1SRC 0x0400
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#define CNT2SRC 0x0200
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#define FIFOEN 0x0100
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#define GRP2WR 0x0080
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#define EXTUPDEN 0x0040
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#define DMARQ 0x0020
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#define DMAEN 0x0010
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#define CH_mask 0x000f
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#define ATAO_STATUS 0x0a /* R 16 */
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#define FH 0x0040
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#define FE 0x0020
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#define FF 0x0010
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#define INT2 0x0008
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#define INT1 0x0004
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#define TCINT 0x0002
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#define PROMOUT 0x0001
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#define ATAO_FIFO_WRITE 0x0c /* W 16 */
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#define ATAO_FIFO_CLEAR 0x0c /* R 16 */
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#define ATAO_DACn(x) (0x0c + 2*(x)) /* W */
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/*
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* Board descriptions for two imaginary boards. Describing the
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* boards in this way is optional, and completely driver-dependent.
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* Some drivers use arrays such as this, other do not.
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*/
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typedef struct atao_board_struct {
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const char *name;
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int n_ao_chans;
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} atao_board;
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static const atao_board atao_boards[] = {
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{
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name: "ai-ao-6",
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n_ao_chans:6,
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},
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{
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name: "ai-ao-10",
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n_ao_chans:10,
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},
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};
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#define thisboard ((atao_board *)dev->board_ptr)
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typedef struct {
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unsigned short cfg1;
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unsigned short cfg2;
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unsigned short cfg3;
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/* Used for AO readback */
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lsampl_t ao_readback[10];
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} atao_private;
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#define devpriv ((atao_private *)dev->private)
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static int atao_attach(comedi_device * dev, comedi_devconfig * it);
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static int atao_detach(comedi_device * dev);
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static comedi_driver driver_atao = {
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driver_name:"ni_at_ao",
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module:THIS_MODULE,
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attach:atao_attach,
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detach:atao_detach,
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board_name:&atao_boards[0].name,
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offset:sizeof(atao_board),
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num_names:sizeof(atao_boards) / sizeof(atao_board),
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};
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COMEDI_INITCLEANUP(driver_atao);
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static void atao_reset(comedi_device * dev);
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static int atao_ao_winsn(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data);
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static int atao_ao_rinsn(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data);
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static int atao_dio_insn_bits(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data);
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static int atao_dio_insn_config(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data);
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static int atao_calib_insn_read(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data);
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static int atao_calib_insn_write(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data);
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static int atao_attach(comedi_device * dev, comedi_devconfig * it)
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{
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comedi_subdevice *s;
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unsigned long iobase;
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int ao_unipolar;
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iobase = it->options[0];
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if (iobase == 0)
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iobase = 0x1c0;
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ao_unipolar = it->options[3];
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printk("comedi%d: ni_at_ao: 0x%04lx", dev->minor, iobase);
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if (!request_region(iobase, ATAO_SIZE, "ni_at_ao")) {
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printk(" I/O port conflict\n");
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return -EIO;
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}
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dev->iobase = iobase;
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//dev->board_ptr = atao_probe(dev);
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dev->board_name = thisboard->name;
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if (alloc_private(dev, sizeof(atao_private)) < 0)
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return -ENOMEM;
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if (alloc_subdevices(dev, 4) < 0)
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return -ENOMEM;
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s = dev->subdevices + 0;
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/* analog output subdevice */
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s->type = COMEDI_SUBD_AO;
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s->subdev_flags = SDF_WRITABLE;
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s->n_chan = thisboard->n_ao_chans;
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s->maxdata = (1 << 12) - 1;
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if (ao_unipolar)
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s->range_table = &range_unipolar10;
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else
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s->range_table = &range_bipolar10;
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s->insn_write = &atao_ao_winsn;
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s->insn_read = &atao_ao_rinsn;
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s = dev->subdevices + 1;
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/* digital i/o subdevice */
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s->type = COMEDI_SUBD_DIO;
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s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
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s->n_chan = 8;
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s->maxdata = 1;
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s->range_table = &range_digital;
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s->insn_bits = atao_dio_insn_bits;
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s->insn_config = atao_dio_insn_config;
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s = dev->subdevices + 2;
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/* caldac subdevice */
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s->type = COMEDI_SUBD_CALIB;
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s->subdev_flags = SDF_WRITABLE | SDF_INTERNAL;
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s->n_chan = 21;
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s->maxdata = 0xff;
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s->insn_read = atao_calib_insn_read;
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s->insn_write = atao_calib_insn_write;
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s = dev->subdevices + 3;
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/* eeprom subdevice */
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//s->type=COMEDI_SUBD_EEPROM;
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s->type = COMEDI_SUBD_UNUSED;
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atao_reset(dev);
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printk("\n");
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return 0;
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}
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static int atao_detach(comedi_device * dev)
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{
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printk("comedi%d: atao: remove\n", dev->minor);
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if (dev->iobase)
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release_region(dev->iobase, ATAO_SIZE);
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return 0;
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}
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static void atao_reset(comedi_device * dev)
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{
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/* This is the reset sequence described in the manual */
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devpriv->cfg1 = 0;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
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outb(RWSEL0 | MODESEL2, dev->iobase + ATAO_82C53_CNTRCMD);
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outb(0x03, dev->iobase + ATAO_82C53_CNTR1);
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outb(CNTRSEL0 | RWSEL0 | MODESEL2, dev->iobase + ATAO_82C53_CNTRCMD);
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devpriv->cfg2 = 0;
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outw(devpriv->cfg2, dev->iobase + ATAO_CFG2);
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devpriv->cfg3 = 0;
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outw(devpriv->cfg3, dev->iobase + ATAO_CFG3);
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inw(dev->iobase + ATAO_FIFO_CLEAR);
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devpriv->cfg1 |= GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
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outw(0, dev->iobase + ATAO_2_INT1CLR);
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outw(0, dev->iobase + ATAO_2_INT2CLR);
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outw(0, dev->iobase + ATAO_2_DMATCCLR);
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devpriv->cfg1 &= ~GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
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}
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static int atao_ao_winsn(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data)
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{
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int i;
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int chan = CR_CHAN(insn->chanspec);
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short bits;
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for (i = 0; i < insn->n; i++) {
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bits = data[i] - 0x800;
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if (chan == 0) {
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devpriv->cfg1 |= GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
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}
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outw(bits, dev->iobase + ATAO_DACn(chan));
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if (chan == 0) {
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devpriv->cfg1 &= ~GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
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}
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devpriv->ao_readback[chan] = data[i];
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}
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return i;
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}
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static int atao_ao_rinsn(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data)
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{
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int i;
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int chan = CR_CHAN(insn->chanspec);
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for (i = 0; i < insn->n; i++)
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data[i] = devpriv->ao_readback[chan];
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return i;
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}
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static int atao_dio_insn_bits(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data)
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{
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if (insn->n != 2)
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return -EINVAL;
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if (data[0]) {
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s->state &= ~data[0];
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s->state |= data[0] & data[1];
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outw(s->state, dev->iobase + ATAO_DOUT);
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}
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data[1] = inw(dev->iobase + ATAO_DIN);
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return 2;
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}
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static int atao_dio_insn_config(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data)
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{
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int chan = CR_CHAN(insn->chanspec);
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unsigned int mask, bit;
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/* The input or output configuration of each digital line is
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* configured by a special insn_config instruction. chanspec
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* contains the channel to be changed, and data[0] contains the
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* value COMEDI_INPUT or COMEDI_OUTPUT. */
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mask = (chan < 4) ? 0x0f : 0xf0;
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bit = (chan < 4) ? DOUTEN1 : DOUTEN2;
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switch (data[0]) {
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case INSN_CONFIG_DIO_OUTPUT:
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s->io_bits |= mask;
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devpriv->cfg3 |= bit;
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break;
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case INSN_CONFIG_DIO_INPUT:
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s->io_bits &= ~mask;
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devpriv->cfg3 &= ~bit;
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break;
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case INSN_CONFIG_DIO_QUERY:
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data[1] =
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(s->
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io_bits & (1 << chan)) ? COMEDI_OUTPUT : COMEDI_INPUT;
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return insn->n;
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break;
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default:
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return -EINVAL;
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break;
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}
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outw(devpriv->cfg3, dev->iobase + ATAO_CFG3);
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return 1;
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}
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/*
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* Figure 2-1 in the manual shows 3 chips labeled DAC8800, which
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* are 8-channel 8-bit DACs. These are most likely the calibration
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* DACs. It is not explicitly stated in the manual how to access
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* the caldacs, but we can guess.
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*/
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static int atao_calib_insn_read(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data)
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{
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int i;
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for (i = 0; i < insn->n; i++) {
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data[i] = 0; /* XXX */
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}
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return insn->n;
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}
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static int atao_calib_insn_write(comedi_device * dev, comedi_subdevice * s,
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comedi_insn * insn, lsampl_t * data)
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{
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unsigned int bitstring, bit;
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unsigned int chan = CR_CHAN(insn->chanspec);
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bitstring = ((chan & 0x7) << 8) | (data[insn->n - 1] & 0xff);
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for (bit = 1 << (11 - 1); bit; bit >>= 1) {
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outw(devpriv->cfg2 | ((bit & bitstring) ? SDATA : 0),
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dev->iobase + ATAO_CFG2);
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outw(devpriv->cfg2 | SCLK | ((bit & bitstring) ? SDATA : 0),
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dev->iobase + ATAO_CFG2);
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}
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/* strobe the appropriate caldac */
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outw(devpriv->cfg2 | (((chan >> 3) + 1) << 14),
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dev->iobase + ATAO_CFG2);
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outw(devpriv->cfg2, dev->iobase + ATAO_CFG2);
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|
||||
return insn->n;
|
||||
}
|
||||
Loading…
Add table
Reference in a new issue