Merge branch 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze
* 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Makefile cleanup microblaze: Typo fix for cpu param inconsistency microblaze: Add support for R_MICROBLAZE_64_NONE microblaze: Get module loading working microblaze: remove sys_ipc microblaze: Support unaligned address for put/get_user macros microblaze: Detect new Microblaze 7.20 versions microblaze: Fix do_page_fault for no context microblaze: Add _PAGE_FILE macros to pgtable.h microblaze: Fix put_user macro for 64bits arguments microblaze: Clear print messages for DTB passing via r7 microblaze: Not to clear r7 after copying DTB to kernel microblaze: Add messages about FDT blob microblaze: Final support for statically linked DTB microblaze: remove duplicated #include microblaze: Define tlb_flush macro
This commit is contained in:
commit
6a31d4aeab
17 changed files with 126 additions and 220 deletions
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@ -6,14 +6,16 @@ endif
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|||
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# What CPU vesion are we building for, and crack it open
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# as major.minor.rev
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CPU_VER=$(subst ",,$(CONFIG_XILINX_MICROBLAZE0_HW_VER) )
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CPU_MAJOR=$(shell echo $(CPU_VER) | cut -d '.' -f 1)
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CPU_MINOR=$(shell echo $(CPU_VER) | cut -d '.' -f 2)
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CPU_REV=$(shell echo $(CPU_VER) | cut -d '.' -f 3)
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CPU_VER := $(shell echo $(CONFIG_XILINX_MICROBLAZE0_HW_VER))
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CPU_MAJOR := $(shell echo $(CPU_VER) | cut -d '.' -f 1)
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CPU_MINOR := $(shell echo $(CPU_VER) | cut -d '.' -f 2)
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CPU_REV := $(shell echo $(CPU_VER) | cut -d '.' -f 3)
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export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV
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# Use cpu-related CONFIG_ vars to set compile options.
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# The various CONFIG_XILINX cpu features options are integers 0/1/2...
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# rather than bools y/n
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# Work out HW multipler support. This is icky.
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# 1. Spartan2 has no HW multiplers.
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@ -34,30 +36,29 @@ CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR) += -mxl-pattern-compare
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CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER))
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# The various CONFIG_XILINX cpu features options are integers 0/1/2...
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# rather than bools y/n
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# r31 holds current when in kernel mode
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CFLAGS_KERNEL += -ffixed-r31 $(CPUFLAGS-1) $(CPUFLAGS-2)
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KBUILD_KERNEL += -ffixed-r31 $(CPUFLAGS-1) $(CPUFLAGS-2)
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LDFLAGS :=
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LDFLAGS_vmlinux :=
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LDFLAGS_BLOB := --format binary --oformat elf32-microblaze
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LIBGCC := $(shell $(CC) $(CFLAGS_KERNEL) -print-libgcc-file-name)
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LIBGCC := $(shell $(CC) $(KBUILD_KERNEL) -print-libgcc-file-name)
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head-y := arch/microblaze/kernel/head.o
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libs-y += arch/microblaze/lib/ $(LIBGCC)
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core-y += arch/microblaze/kernel/ arch/microblaze/mm/ \
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arch/microblaze/platform/
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head-y := arch/microblaze/kernel/head.o
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libs-y += arch/microblaze/lib/
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libs-y += $(LIBGCC)
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core-y += arch/microblaze/kernel/
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core-y += arch/microblaze/mm/
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core-y += arch/microblaze/platform/
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boot := arch/$(ARCH)/boot
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boot := arch/microblaze/boot
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# defines filename extension depending memory management type
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ifeq ($(CONFIG_MMU),)
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MMUEXT := -nommu
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MMU := -nommu
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endif
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export MMUEXT
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export MMU
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all: linux.bin
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@ -14,7 +14,6 @@
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#include <asm/byteorder.h>
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#include <asm/page.h>
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#include <linux/types.h>
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#include <asm/byteorder.h>
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#include <linux/mm.h> /* Get struct page {...} */
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@ -185,6 +185,7 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
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/* Definitions for MicroBlaze. */
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#define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */
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#define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */
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#define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */
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#define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */
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#define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */
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@ -320,8 +321,7 @@ static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
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static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_EXEC; }
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static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
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static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
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/* FIXME */
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static inline int pte_file(pte_t pte) { return 0; }
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static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
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static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
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static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
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@ -488,7 +488,7 @@ static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
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/* Encode and decode a nonlinear file mapping entry */
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#define PTE_FILE_MAX_BITS 29
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#define pte_to_pgoff(pte) (pte_val(pte) >> 3)
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#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) })
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#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE })
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extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
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@ -16,6 +16,18 @@
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#define _ASM_MICROBLAZE_PROM_H
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#ifdef __KERNEL__
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/* Definitions used by the flattened device tree */
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#define OF_DT_HEADER 0xd00dfeed /* marker */
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#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
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#define OF_DT_END_NODE 0x2 /* End node */
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#define OF_DT_PROP 0x3 /* Property: name off, size, content */
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#define OF_DT_NOP 0x4 /* nop */
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#define OF_DT_END 0x9
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#define OF_DT_VERSION 0x10
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#include <linux/proc_fs.h>
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#include <linux/platform_device.h>
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@ -29,16 +41,6 @@
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#define of_prop_cmp(s1, s2) strcmp((s1), (s2))
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#define of_node_cmp(s1, s2) strcasecmp((s1), (s2))
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/* Definitions used by the flattened device tree */
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#define OF_DT_HEADER 0xd00dfeed /* marker */
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#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
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#define OF_DT_END_NODE 0x2 /* End node */
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#define OF_DT_PROP 0x3 /* Property: name off, size, content */
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#define OF_DT_NOP 0x4 /* nop */
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#define OF_DT_END 0x9
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#define OF_DT_VERSION 0x10
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/*
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* This is what gets passed to the kernel by prom_init or kexec
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*
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@ -309,5 +311,6 @@ extern void __iomem *of_iomap(struct device_node *device, int index);
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*/
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#include <linux/of.h>
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_MICROBLAZE_PROM_H */
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@ -11,7 +11,7 @@
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#ifndef _ASM_MICROBLAZE_TLB_H
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#define _ASM_MICROBLAZE_TLB_H
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#define tlb_flush(tlb) do {} while (0)
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#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
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#include <asm-generic/tlb.h>
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@ -189,7 +189,7 @@ extern long strnlen_user(const char *src, long count);
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#define __put_user(x, ptr) \
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({ \
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__typeof__(*(ptr)) __gu_val = x; \
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__typeof__(*(ptr)) volatile __gu_val = (x); \
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long __gu_err = 0; \
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switch (sizeof(__gu_val)) { \
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case 1: \
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@ -17,4 +17,4 @@ obj-$(CONFIG_HEART_BEAT) += heartbeat.o
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obj-$(CONFIG_MODULES) += microblaze_ksyms.o module.o
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obj-$(CONFIG_MMU) += misc.o
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obj-y += entry$(MMUEXT).o
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obj-y += entry$(MMU).o
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@ -22,7 +22,7 @@
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#define CI(c, p) { ci->c = PVR_##p(pvr); }
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#define err_printk(x) \
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early_printk("ERROR: Microblaze " x " - different for PVR and DTS\n");
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early_printk("ERROR: Microblaze " x "-different for PVR and DTS\n");
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void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
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{
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@ -18,7 +18,7 @@ static const char family_string[] = CONFIG_XILINX_MICROBLAZE0_FAMILY;
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static const char cpu_ver_string[] = CONFIG_XILINX_MICROBLAZE0_HW_VER;
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#define err_printk(x) \
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early_printk("ERROR: Microblaze " x "- different for kernel and DTS\n");
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early_printk("ERROR: Microblaze " x "-different for kernel and DTS\n");
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void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
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{
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@ -26,6 +26,8 @@ const struct cpu_ver_key cpu_ver_lookup[] = {
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{"7.10.b", 0x09},
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{"7.10.c", 0x0a},
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{"7.10.d", 0x0b},
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{"7.20.a", 0x0c},
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{"7.20.b", 0x0d},
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/* FIXME There is no keycode defined in MBV for these versions */
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{"2.10.a", 0x10},
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{"3.00.a", 0x20},
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@ -31,6 +31,7 @@
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#include <linux/linkage.h>
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#include <asm/thread_info.h>
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#include <asm/page.h>
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#include <asm/prom.h> /* for OF_DT_HEADER */
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#ifdef CONFIG_MMU
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#include <asm/setup.h> /* COMMAND_LINE_SIZE */
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@ -54,11 +55,19 @@ ENTRY(_start)
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andi r1, r1, ~2
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mts rmsr, r1
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/* save fdt to kernel location */
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/* r7 stores pointer to fdt blob */
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beqi r7, no_fdt_arg
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/* r7 may point to an FDT, or there may be one linked in.
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if it's in r7, we've got to save it away ASAP.
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We ensure r7 points to a valid FDT, just in case the bootloader
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is broken or non-existent */
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beqi r7, no_fdt_arg /* NULL pointer? don't copy */
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lw r11, r0, r7 /* Does r7 point to a */
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rsubi r11, r11, OF_DT_HEADER /* valid FDT? */
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beqi r11, _prepare_copy_fdt
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or r7, r0, r0 /* clear R7 when not valid DTB */
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bnei r11, no_fdt_arg /* No - get out of here */
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_prepare_copy_fdt:
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or r11, r0, r0 /* incremment */
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ori r4, r0, TOPHYS(_fdt_start) /* save bram context */
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ori r4, r0, TOPHYS(_fdt_start)
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ori r3, r0, (0x4000 - 4)
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_copy_fdt:
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lw r12, r7, r11 /* r12 = r7 + r11 */
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@ -74,6 +74,7 @@
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#include <asm/mmu.h>
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#include <asm/pgtable.h>
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#include <asm/signal.h>
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#include <asm/asm-offsets.h>
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/* Helpful Macros */
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@ -428,19 +429,9 @@ handle_unaligned_ex:
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mfs r17, rbtr; /* ESR[DS] set - return address in BTR */
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nop
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_no_delayslot:
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#endif
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#ifdef CONFIG_MMU
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/* Check if unaligned address is last on a 4k page */
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andi r5, r4, 0xffc
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xori r5, r5, 0xffc
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bnei r5, _unaligned_ex2
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_unaligned_ex1:
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RESTORE_STATE;
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/* Another page must be accessed or physical address not in page table */
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bri unaligned_data_trap
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_unaligned_ex2:
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/* jump to high level unaligned handler */
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RESTORE_STATE;
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bri unaligned_data_trap
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#endif
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andi r6, r3, 0x3E0; /* Mask and extract the register operand */
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srl r6, r6; /* r6 >> 5 */
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@ -450,45 +441,6 @@ _no_delayslot:
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srl r6, r6;
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/* Store the register operand in a temporary location */
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sbi r6, r0, TOPHYS(ex_reg_op);
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#ifdef CONFIG_MMU
|
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/* Get physical address */
|
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/* If we are faulting a kernel address, we have to use the
|
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* kernel page tables.
|
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*/
|
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ori r5, r0, CONFIG_KERNEL_START
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cmpu r5, r4, r5
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bgti r5, _unaligned_ex3
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ori r5, r0, swapper_pg_dir
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bri _unaligned_ex4
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|
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/* Get the PGD for the current thread. */
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_unaligned_ex3: /* user thread */
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addi r5 ,CURRENT_TASK, TOPHYS(0); /* get current task address */
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lwi r5, r5, TASK_THREAD + PGDIR
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_unaligned_ex4:
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tophys(r5,r5)
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BSRLI(r6,r4,20) /* Create L1 (pgdir/pmd) address */
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andi r6, r6, 0xffc
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/* Assume pgdir aligned on 4K boundary, no need for "andi r5,r5,0xfffff003" */
|
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or r5, r5, r6
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lwi r6, r5, 0 /* Get L1 entry */
|
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andi r5, r6, 0xfffff000 /* Extract L2 (pte) base address. */
|
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beqi r5, _unaligned_ex1 /* Bail if no table */
|
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|
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tophys(r5,r5)
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BSRLI(r6,r4,10) /* Compute PTE address */
|
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andi r6, r6, 0xffc
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andi r5, r5, 0xfffff003
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or r5, r5, r6
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lwi r5, r5, 0 /* Get Linux PTE */
|
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|
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andi r6, r5, _PAGE_PRESENT
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beqi r6, _unaligned_ex1 /* Bail if no page */
|
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|
||||
andi r5, r5, 0xfffff000 /* Extract RPN */
|
||||
andi r4, r4, 0x00000fff /* Extract offset */
|
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or r4, r4, r5 /* Create physical address */
|
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#endif /* CONFIG_MMU */
|
||||
|
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andi r6, r3, 0x400; /* Extract ESR[S] */
|
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bnei r6, ex_sw;
|
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|
@ -959,15 +911,15 @@ _unaligned_data_exception:
|
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andi r6, r3, 0x800; /* Extract ESR[W] - delay slot */
|
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ex_lw_vm:
|
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beqid r6, ex_lhw_vm;
|
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lbui r5, r4, 0; /* Exception address in r4 - delay slot */
|
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load1: lbui r5, r4, 0; /* Exception address in r4 - delay slot */
|
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/* Load a word, byte-by-byte from destination address and save it in tmp space*/
|
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la r6, r0, ex_tmp_data_loc_0;
|
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sbi r5, r6, 0;
|
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lbui r5, r4, 1;
|
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load2: lbui r5, r4, 1;
|
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sbi r5, r6, 1;
|
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lbui r5, r4, 2;
|
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load3: lbui r5, r4, 2;
|
||||
sbi r5, r6, 2;
|
||||
lbui r5, r4, 3;
|
||||
load4: lbui r5, r4, 3;
|
||||
sbi r5, r6, 3;
|
||||
brid ex_lw_tail_vm;
|
||||
/* Get the destination register value into r3 - delay slot */
|
||||
|
@ -977,7 +929,7 @@ ex_lhw_vm:
|
|||
* save it in tmp space */
|
||||
la r6, r0, ex_tmp_data_loc_0;
|
||||
sbi r5, r6, 0;
|
||||
lbui r5, r4, 1;
|
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load5: lbui r5, r4, 1;
|
||||
sbi r5, r6, 1;
|
||||
lhui r3, r6, 0; /* Get the destination register value into r3 */
|
||||
ex_lw_tail_vm:
|
||||
|
@ -996,22 +948,53 @@ ex_sw_tail_vm:
|
|||
swi r3, r5, 0; /* Get the word - delay slot */
|
||||
/* Store the word, byte-by-byte into destination address */
|
||||
lbui r3, r5, 0;
|
||||
sbi r3, r4, 0;
|
||||
store1: sbi r3, r4, 0;
|
||||
lbui r3, r5, 1;
|
||||
sbi r3, r4, 1;
|
||||
store2: sbi r3, r4, 1;
|
||||
lbui r3, r5, 2;
|
||||
sbi r3, r4, 2;
|
||||
store3: sbi r3, r4, 2;
|
||||
lbui r3, r5, 3;
|
||||
brid ret_from_exc;
|
||||
sbi r3, r4, 3; /* Delay slot */
|
||||
store4: sbi r3, r4, 3; /* Delay slot */
|
||||
ex_shw_vm:
|
||||
/* Store the lower half-word, byte-by-byte into destination address */
|
||||
lbui r3, r5, 2;
|
||||
sbi r3, r4, 0;
|
||||
store5: sbi r3, r4, 0;
|
||||
lbui r3, r5, 3;
|
||||
brid ret_from_exc;
|
||||
sbi r3, r4, 1; /* Delay slot */
|
||||
store6: sbi r3, r4, 1; /* Delay slot */
|
||||
ex_sw_end_vm: /* Exception handling of store word, ends. */
|
||||
|
||||
/* We have to prevent cases that get/put_user macros get unaligned pointer
|
||||
* to bad page area. We have to find out which origin instruction caused it
|
||||
* and called fixup for that origin instruction not instruction in unaligned
|
||||
* handler */
|
||||
ex_unaligned_fixup:
|
||||
ori r5, r7, 0 /* setup pointer to pt_regs */
|
||||
lwi r6, r7, PT_PC; /* faulting address is one instruction above */
|
||||
addik r6, r6, -4 /* for finding proper fixup */
|
||||
swi r6, r7, PT_PC; /* a save back it to PT_PC */
|
||||
addik r7, r0, SIGSEGV
|
||||
/* call bad_page_fault for finding aligned fixup, fixup address is saved
|
||||
* in PT_PC which is used as return address from exception */
|
||||
la r15, r0, ret_from_exc-8 /* setup return address */
|
||||
brid bad_page_fault
|
||||
nop
|
||||
|
||||
/* We prevent all load/store because it could failed any attempt to access */
|
||||
.section __ex_table,"a";
|
||||
.word load1,ex_unaligned_fixup;
|
||||
.word load2,ex_unaligned_fixup;
|
||||
.word load3,ex_unaligned_fixup;
|
||||
.word load4,ex_unaligned_fixup;
|
||||
.word load5,ex_unaligned_fixup;
|
||||
.word store1,ex_unaligned_fixup;
|
||||
.word store2,ex_unaligned_fixup;
|
||||
.word store3,ex_unaligned_fixup;
|
||||
.word store4,ex_unaligned_fixup;
|
||||
.word store5,ex_unaligned_fixup;
|
||||
.word store6,ex_unaligned_fixup;
|
||||
.previous;
|
||||
.end _unaligned_data_exception
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
|
|
|
@ -57,7 +57,6 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
|
|||
Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;
|
||||
Elf32_Sym *sym;
|
||||
unsigned long int *location;
|
||||
unsigned long int locoffs;
|
||||
unsigned long int value;
|
||||
#if __GNUC__ < 4
|
||||
unsigned long int old_value;
|
||||
|
@ -113,10 +112,12 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
|
|||
break;
|
||||
|
||||
case R_MICROBLAZE_64_PCREL:
|
||||
locoffs = (location[0] & 0xFFFF) << 16 |
|
||||
#if __GNUC__ < 4
|
||||
old_value = (location[0] & 0xFFFF) << 16 |
|
||||
(location[1] & 0xFFFF);
|
||||
value -= (unsigned long int)(location) + 4 +
|
||||
locoffs;
|
||||
value -= old_value;
|
||||
#endif
|
||||
value -= (unsigned long int)(location) + 4;
|
||||
location[0] = (location[0] & 0xFFFF0000) |
|
||||
(value >> 16);
|
||||
location[1] = (location[1] & 0xFFFF0000) |
|
||||
|
@ -125,6 +126,14 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
|
|||
value);
|
||||
break;
|
||||
|
||||
case R_MICROBLAZE_32_PCREL_LO:
|
||||
pr_debug("R_MICROBLAZE_32_PCREL_LO\n");
|
||||
break;
|
||||
|
||||
case R_MICROBLAZE_64_NONE:
|
||||
pr_debug("R_MICROBLAZE_NONE\n");
|
||||
break;
|
||||
|
||||
case R_MICROBLAZE_NONE:
|
||||
pr_debug("R_MICROBLAZE_NONE\n");
|
||||
break;
|
||||
|
@ -133,7 +142,7 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
|
|||
printk(KERN_ERR "module %s: "
|
||||
"Unknown relocation: %u\n",
|
||||
module->name,
|
||||
ELF32_R_TYPE(rela->r_info));
|
||||
ELF32_R_TYPE(rela[i].r_info));
|
||||
return -ENOEXEC;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -138,8 +138,12 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
|
|||
setup_early_printk(NULL);
|
||||
#endif
|
||||
|
||||
early_printk("Ramdisk addr 0x%08x, FDT 0x%08x\n", ram, fdt);
|
||||
printk(KERN_NOTICE "Found FDT at 0x%08x\n", fdt);
|
||||
early_printk("Ramdisk addr 0x%08x, ", ram);
|
||||
if (fdt)
|
||||
early_printk("FDT at 0x%08x\n", fdt);
|
||||
else
|
||||
early_printk("Compiled-in FDT at 0x%08x\n",
|
||||
(unsigned int)_fdt_start);
|
||||
|
||||
#ifdef CONFIG_MTD_UCLINUX
|
||||
early_printk("Found romfs @ 0x%08x (0x%08x)\n",
|
||||
|
|
|
@ -33,105 +33,6 @@
|
|||
#include <linux/unistd.h>
|
||||
|
||||
#include <asm/syscalls.h>
|
||||
/*
|
||||
* sys_ipc() is the de-multiplexer for the SysV IPC calls..
|
||||
*
|
||||
* This is really horribly ugly. This will be remove with new toolchain.
|
||||
*/
|
||||
asmlinkage long
|
||||
sys_ipc(uint call, int first, int second, int third, void *ptr, long fifth)
|
||||
{
|
||||
int version, ret;
|
||||
|
||||
version = call >> 16; /* hack for backward compatibility */
|
||||
call &= 0xffff;
|
||||
|
||||
ret = -EINVAL;
|
||||
switch (call) {
|
||||
case SEMOP:
|
||||
ret = sys_semop(first, (struct sembuf *)ptr, second);
|
||||
break;
|
||||
case SEMGET:
|
||||
ret = sys_semget(first, second, third);
|
||||
break;
|
||||
case SEMCTL:
|
||||
{
|
||||
union semun fourth;
|
||||
|
||||
if (!ptr)
|
||||
break;
|
||||
ret = (access_ok(VERIFY_READ, ptr, sizeof(long)) ? 0 : -EFAULT)
|
||||
|| (get_user(fourth.__pad, (void **)ptr)) ;
|
||||
if (ret)
|
||||
break;
|
||||
ret = sys_semctl(first, second, third, fourth);
|
||||
break;
|
||||
}
|
||||
case MSGSND:
|
||||
ret = sys_msgsnd(first, (struct msgbuf *) ptr, second, third);
|
||||
break;
|
||||
case MSGRCV:
|
||||
switch (version) {
|
||||
case 0: {
|
||||
struct ipc_kludge tmp;
|
||||
|
||||
if (!ptr)
|
||||
break;
|
||||
ret = (access_ok(VERIFY_READ, ptr, sizeof(tmp))
|
||||
? 0 : -EFAULT) || copy_from_user(&tmp,
|
||||
(struct ipc_kludge *) ptr, sizeof(tmp));
|
||||
if (ret)
|
||||
break;
|
||||
ret = sys_msgrcv(first, tmp.msgp, second, tmp.msgtyp,
|
||||
third);
|
||||
break;
|
||||
}
|
||||
default:
|
||||
ret = sys_msgrcv(first, (struct msgbuf *) ptr,
|
||||
second, fifth, third);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case MSGGET:
|
||||
ret = sys_msgget((key_t) first, second);
|
||||
break;
|
||||
case MSGCTL:
|
||||
ret = sys_msgctl(first, second, (struct msqid_ds *) ptr);
|
||||
break;
|
||||
case SHMAT:
|
||||
switch (version) {
|
||||
default: {
|
||||
ulong raddr;
|
||||
ret = access_ok(VERIFY_WRITE, (ulong *) third,
|
||||
sizeof(ulong)) ? 0 : -EFAULT;
|
||||
if (ret)
|
||||
break;
|
||||
ret = do_shmat(first, (char *) ptr, second, &raddr);
|
||||
if (ret)
|
||||
break;
|
||||
ret = put_user(raddr, (ulong *) third);
|
||||
break;
|
||||
}
|
||||
case 1: /* iBCS2 emulator entry point */
|
||||
if (!segment_eq(get_fs(), get_ds()))
|
||||
break;
|
||||
ret = do_shmat(first, (char *) ptr, second,
|
||||
(ulong *) third);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case SHMDT:
|
||||
ret = sys_shmdt((char *)ptr);
|
||||
break;
|
||||
case SHMGET:
|
||||
ret = sys_shmget(first, second, third);
|
||||
break;
|
||||
case SHMCTL:
|
||||
ret = sys_shmctl(first, second, (struct shmid_ds *) ptr);
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
asmlinkage long microblaze_vfork(struct pt_regs *regs)
|
||||
{
|
||||
|
|
|
@ -121,7 +121,7 @@ ENTRY(sys_call_table)
|
|||
.long sys_wait4
|
||||
.long sys_swapoff /* 115 */
|
||||
.long sys_sysinfo
|
||||
.long sys_ipc
|
||||
.long sys_ni_syscall /* old sys_ipc */
|
||||
.long sys_fsync
|
||||
.long sys_ni_syscall /* sys_sigreturn_wrapper */
|
||||
.long sys_clone /* 120 */
|
||||
|
|
|
@ -69,7 +69,7 @@ static int store_updates_sp(struct pt_regs *regs)
|
|||
* It is called from do_page_fault above and from some of the procedures
|
||||
* in traps.c.
|
||||
*/
|
||||
static void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
|
||||
void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
|
||||
{
|
||||
const struct exception_table_entry *fixup;
|
||||
/* MS: no context */
|
||||
|
@ -122,15 +122,10 @@ void do_page_fault(struct pt_regs *regs, unsigned long address,
|
|||
}
|
||||
#endif /* CONFIG_KGDB */
|
||||
|
||||
if (in_atomic() || mm == NULL) {
|
||||
/* FIXME */
|
||||
if (kernel_mode(regs)) {
|
||||
printk(KERN_EMERG
|
||||
"Page fault in kernel mode - Oooou!!! pid %d\n",
|
||||
current->pid);
|
||||
_exception(SIGSEGV, regs, code, address);
|
||||
return;
|
||||
}
|
||||
if (in_atomic() || !mm) {
|
||||
if (kernel_mode(regs))
|
||||
goto bad_area_nosemaphore;
|
||||
|
||||
/* in_atomic() in user mode is really bad,
|
||||
as is current->mm == NULL. */
|
||||
printk(KERN_EMERG "Page fault in user mode with "
|
||||
|
|
Loading…
Reference in a new issue