msm-geni-serial: Correct the interrupt polling logic in uart
Correct the interrupt polling logic in uart and depend on the interrupt routine instead of polling where ever possible. Change-Id: Ia01889549d7edbe380e2e58b92efb2a0b3b34e7b Signed-off-by: Prudhvi Yarlagadda <pyarlaga@codeaurora.org>
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2 changed files with 577 additions and 271 deletions
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@ -330,6 +330,7 @@ struct se_geni_rsc {
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#define TX_EOT (BIT(1))
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#define TX_SBE (BIT(2))
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#define TX_RESET_DONE (BIT(3))
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#define TX_GENI_CANCEL_IRQ (BIT(14))
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/* SE_DMA_RX_IRQ_STAT Register fields */
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#define RX_DMA_DONE (BIT(0))
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@ -338,9 +339,15 @@ struct se_geni_rsc {
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#define RX_RESET_DONE (BIT(3))
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#define RX_FLUSH_DONE (BIT(4))
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#define RX_GENI_GP_IRQ (GENMASK(10, 5))
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#define RX_GENI_CANCEL_IRQ (BIT(11))
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#define RX_GENI_CANCEL_IRQ (BIT(14))
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#define RX_GENI_GP_IRQ_EXT (GENMASK(13, 12))
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/* DMA DEBUG Register fields */
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#define DMA_TX_ACTIVE (BIT(0))
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#define DMA_RX_ACTIVE (BIT(1))
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#define DMA_TX_STATE (GENMASK(7, 4))
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#define DMA_RX_STATE (GENMASK(11, 8))
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#define DEFAULT_BUS_WIDTH (4)
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#define DEFAULT_SE_CLK (19200000)
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