drm/i915: Apply display workaround required according to the B-Spec.
Not known to fix any current bugs. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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2 changed files with 6 additions and 0 deletions
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@ -2609,6 +2609,8 @@
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#define GTIER 0x4401c
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#define ILK_DISPLAY_CHICKEN2 0x42004
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/* Required on all Ironlake and Sandybridge according to the B-Spec. */
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#define ILK_ELPIN_409_SELECT (1 << 25)
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#define ILK_DPARB_GATE (1<<22)
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#define ILK_VSDPFD_FULL (1<<21)
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#define ILK_DSPCLK_GATE 0x42020
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@ -5819,6 +5819,10 @@ void intel_init_clock_gating(struct drm_device *dev)
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ILK_CLK_FBC);
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}
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I915_WRITE(ILK_DISPLAY_CHICKEN2,
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I915_READ(ILK_DISPLAY_CHICKEN2) |
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ILK_ELPIN_409_SELECT);
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if (IS_GEN5(dev)) {
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I915_WRITE(_3D_CHICKEN2,
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_3D_CHICKEN2_WM_READ_PIPELINED << 16 |
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