dmaengine: shdma: add chcr_ie_bit
IE bit position on CHCR register is not same in all DMAC. This patch adds new "chcr_ie_bit" to decide it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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3 changed files with 11 additions and 2 deletions
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@ -181,17 +181,19 @@ static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw)
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static void dmae_start(struct sh_dmae_chan *sh_chan)
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{
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struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
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u32 chcr = chcr_read(sh_chan);
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chcr |= CHCR_DE | CHCR_IE;
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chcr |= CHCR_DE | shdev->chcr_ie_bit;
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chcr_write(sh_chan, chcr & ~CHCR_TE);
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}
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static void dmae_halt(struct sh_dmae_chan *sh_chan)
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{
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struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
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u32 chcr = chcr_read(sh_chan);
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chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
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chcr &= ~(CHCR_DE | CHCR_TE | shdev->chcr_ie_bit);
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chcr_write(sh_chan, chcr);
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}
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@ -1157,6 +1159,11 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
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else
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shdev->chcr_offset = CHCR;
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if (pdata->chcr_ie_bit)
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shdev->chcr_ie_bit = pdata->chcr_ie_bit;
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else
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shdev->chcr_ie_bit = CHCR_IE;
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platform_set_drvdata(pdev, shdev);
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pm_runtime_enable(&pdev->dev);
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@ -48,6 +48,7 @@ struct sh_dmae_device {
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u32 __iomem *chan_reg;
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u16 __iomem *dmars;
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unsigned int chcr_offset;
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u32 chcr_ie_bit;
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};
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#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common)
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@ -63,6 +63,7 @@ struct sh_dmae_pdata {
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int ts_shift_num;
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u16 dmaor_init;
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unsigned int chcr_offset;
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u32 chcr_ie_bit;
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};
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/* DMA register */
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