Fix FRV cmpxchg_local
Fix the FRV cmpxchg_local by breaking the following header dependency loop : linux/kernel.h -> linux/bitops.h -> asm-frv/bitops.h -> asm-frv/atomic.h -> asm-frv/system.h -> asm-generic/cmpxchg_local.h -> typecheck() defined in linux/kernel.h and linux/kernel.h -> linux/bitops.h -> asm-frv/bitops.h -> asm-frv/atomic.h -> asm-generic/cmpxchg_local.h -> typecheck() defined in linux/kernel.h In order to fix this : - Move the atomic_test_and_ *_mask inlines from asm-frv/atomic.h (why are they there at all anyway ? They are not touching atomic_t variables!) to asm-frv/bitops.h. Also fix a build issue with cmpxchg : it does not cast to (unsigned long *) like other architectures, to deal with it in the cmpxchg_local macro. FRV builds fine with this patch. Thanks to Adrian Bunk <bunk@kernel.org> for spotting this bug. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: Adrian Bunk <bunk@kernel.org> Cc: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Mathieu Desnoyers
Linus Torvalds
parent
b55fcb22d4
commit
6784fd5931
3 changed files with 83 additions and 84 deletions
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@ -125,87 +125,6 @@ static inline void atomic_dec(atomic_t *v)
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#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
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#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
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#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
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static inline
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unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v)
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{
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unsigned long old, tmp;
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asm volatile(
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"0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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" ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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" and%I3 %1,%3,%2 \n"
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" cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
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" beq icc3,#0,0b \n"
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: "+U"(*v), "=&r"(old), "=r"(tmp)
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: "NPr"(~mask)
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: "memory", "cc7", "cc3", "icc3"
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);
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return old;
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}
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static inline
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unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v)
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{
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unsigned long old, tmp;
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asm volatile(
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"0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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" ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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" or%I3 %1,%3,%2 \n"
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" cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
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" beq icc3,#0,0b \n"
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: "+U"(*v), "=&r"(old), "=r"(tmp)
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: "NPr"(mask)
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: "memory", "cc7", "cc3", "icc3"
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);
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return old;
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}
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static inline
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unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v)
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{
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unsigned long old, tmp;
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asm volatile(
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"0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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" ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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" xor%I3 %1,%3,%2 \n"
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" cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
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" beq icc3,#0,0b \n"
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: "+U"(*v), "=&r"(old), "=r"(tmp)
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: "NPr"(mask)
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: "memory", "cc7", "cc3", "icc3"
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);
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return old;
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}
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#else
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extern unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v);
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extern unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v);
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extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v);
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#endif
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#define atomic_clear_mask(mask, v) atomic_test_and_ANDNOT_mask((mask), (v))
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#define atomic_set_mask(mask, v) atomic_test_and_OR_mask((mask), (v))
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/*****************************************************************************/
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/*
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* exchange value with memory
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@ -16,8 +16,6 @@
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#include <linux/compiler.h>
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#include <asm/byteorder.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#ifdef __KERNEL__
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@ -33,6 +31,87 @@
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#define smp_mb__before_clear_bit() barrier()
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#define smp_mb__after_clear_bit() barrier()
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#ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
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static inline
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unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v)
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{
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unsigned long old, tmp;
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asm volatile(
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"0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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" ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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" and%I3 %1,%3,%2 \n"
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" cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
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" beq icc3,#0,0b \n"
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: "+U"(*v), "=&r"(old), "=r"(tmp)
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: "NPr"(~mask)
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: "memory", "cc7", "cc3", "icc3"
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);
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return old;
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}
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static inline
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unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v)
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{
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unsigned long old, tmp;
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asm volatile(
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"0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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" ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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" or%I3 %1,%3,%2 \n"
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" cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
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" beq icc3,#0,0b \n"
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: "+U"(*v), "=&r"(old), "=r"(tmp)
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: "NPr"(mask)
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: "memory", "cc7", "cc3", "icc3"
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);
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return old;
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}
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static inline
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unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v)
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{
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unsigned long old, tmp;
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asm volatile(
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"0: \n"
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" orcc gr0,gr0,gr0,icc3 \n" /* set ICC3.Z */
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" ckeq icc3,cc7 \n"
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" ld.p %M0,%1 \n" /* LD.P/ORCR are atomic */
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" orcr cc7,cc7,cc3 \n" /* set CC3 to true */
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" xor%I3 %1,%3,%2 \n"
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" cst.p %2,%M0 ,cc3,#1 \n" /* if store happens... */
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" corcc gr29,gr29,gr0 ,cc3,#1 \n" /* ... clear ICC3.Z */
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" beq icc3,#0,0b \n"
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: "+U"(*v), "=&r"(old), "=r"(tmp)
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: "NPr"(mask)
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: "memory", "cc7", "cc3", "icc3"
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);
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return old;
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}
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#else
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extern unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v);
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extern unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v);
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extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v);
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#endif
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#define atomic_clear_mask(mask, v) atomic_test_and_ANDNOT_mask((mask), (v))
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#define atomic_set_mask(mask, v) atomic_test_and_OR_mask((mask), (v))
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static inline int test_and_clear_bit(int nr, volatile void *addr)
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{
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volatile unsigned long *ptr = addr;
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@ -14,6 +14,7 @@
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#include <linux/types.h>
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#include <linux/linkage.h>
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#include <linux/kernel.h>
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struct thread_struct;
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@ -276,7 +277,7 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,
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{
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switch (size) {
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case 4:
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return cmpxchg(ptr, old, new);
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return cmpxchg((unsigned long *)ptr, old, new);
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default:
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return __cmpxchg_local_generic(ptr, old, new, size);
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}
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