m68knommu: clean up ColdFire 532x interrupt setup
With the common intc-simr interrupt controller code in place the ColdFire 532x family startup code can be greatly simplified. Remove all the interrupt masking code, and the per-device interrupt config here. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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1 changed files with 0 additions and 18 deletions
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@ -20,7 +20,6 @@
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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@ -98,18 +97,11 @@ static struct platform_device *m532x_devices[] __initdata = {
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static void __init m532x_uart_init_line(int line, int irq)
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{
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if (line == 0) {
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MCF_INTC0_ICR26 = 0x3;
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MCF_INTC0_CIMR = 26;
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/* GPIO initialization */
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MCF_GPIO_PAR_UART |= 0x000F;
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} else if (line == 1) {
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MCF_INTC0_ICR27 = 0x3;
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MCF_INTC0_CIMR = 27;
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/* GPIO initialization */
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MCF_GPIO_PAR_UART |= 0x0FF0;
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} else if (line == 2) {
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MCF_INTC0_ICR28 = 0x3;
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MCF_INTC0_CIMR = 28;
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}
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}
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@ -125,14 +117,6 @@ static void __init m532x_uarts_init(void)
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static void __init m532x_fec_init(void)
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{
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/* Unmask FEC interrupts at ColdFire interrupt controller */
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MCF_INTC0_ICR36 = 0x2;
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MCF_INTC0_ICR40 = 0x2;
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MCF_INTC0_ICR42 = 0x2;
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MCF_INTC0_IMRH &= ~(MCF_INTC_IMRH_INT_MASK36 |
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MCF_INTC_IMRH_INT_MASK40 | MCF_INTC_IMRH_INT_MASK42);
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/* Set multi-function pins to ethernet mode for fec0 */
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MCF_GPIO_PAR_FECI2C |= (MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC |
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MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO);
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@ -172,8 +156,6 @@ static void m532x_cpu_reset(void)
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void __init config_BSP(char *commandp, int size)
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{
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mcf_setimr(MCFSIM_IMR_MASKALL);
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#if !defined(CONFIG_BOOTPARAM)
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/* Copy command line from FLASH to local buffer... */
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memcpy(commandp, (char *) 0x4000, 4);
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