Staging: et1310: Fix the coding style
UTF-8 for copyright symbols etc included. Typedefs and anything else which would cause actual code changes skipped. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Alan Cox
Greg Kroah-Hartman
parent
297f06cea6
commit
64f930361b
27 changed files with 2172 additions and 2230 deletions
File diff suppressed because it is too large
Load diff
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@ -2,7 +2,7 @@
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* Agere Systems Inc.
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* Agere Systems Inc.
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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*
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*
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* Copyright © 2005 Agere Systems Inc.
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
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* All rights reserved.
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* http://www.agere.com
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* http://www.agere.com
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*
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*
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@ -19,7 +19,7 @@
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* software indicates your acceptance of these terms and conditions. If you do
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* software indicates your acceptance of these terms and conditions. If you do
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* not agree with these terms and conditions, do not use the software.
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* not agree with these terms and conditions, do not use the software.
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*
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*
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* Copyright © 2005 Agere Systems Inc.
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
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* All rights reserved.
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*
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*
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* Redistribution and use in source or binary forms, with or without
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* Redistribution and use in source or binary forms, with or without
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@ -40,7 +40,7 @@
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*
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*
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* Disclaimer
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* Disclaimer
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*
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*
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* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
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* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
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||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
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||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
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* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
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@ -74,9 +74,9 @@
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/in.h>
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#include <linux/in.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <asm/system.h>
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#include <asm/system.h>
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#include <asm/bitops.h>
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#include <linux/netdevice.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/etherdevice.h>
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@ -226,23 +226,20 @@ int32_t EepromWriteByte(struct et131x_adapter *pAdapter, uint32_t unAddress,
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bStatus = EXTRACT_STATUS_REGISTER(unDword1);
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bStatus = EXTRACT_STATUS_REGISTER(unDword1);
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if (bStatus & LBCIF_STATUS_PHY_QUEUE_AVAIL &&
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if (bStatus & LBCIF_STATUS_PHY_QUEUE_AVAIL &&
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bStatus & LBCIF_STATUS_I2C_IDLE) {
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bStatus & LBCIF_STATUS_I2C_IDLE)
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/* bits 1:0 are equal to 1 */
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/* bits 1:0 are equal to 1 */
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break;
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break;
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}
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}
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}
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if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS)) {
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if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS))
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return FAILURE;
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return FAILURE;
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}
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/* Step 2: */
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/* Step 2: */
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bControl = 0;
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bControl = 0;
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bControl |= LBCIF_CONTROL_LBCIF_ENABLE | LBCIF_CONTROL_I2C_WRITE;
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bControl |= LBCIF_CONTROL_LBCIF_ENABLE | LBCIF_CONTROL_I2C_WRITE;
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if (unAddressingMode == DUAL_BYTE) {
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if (unAddressingMode == DUAL_BYTE)
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bControl |= LBCIF_CONTROL_TWO_BYTE_ADDR;
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bControl |= LBCIF_CONTROL_TWO_BYTE_ADDR;
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}
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if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER_OFFSET,
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if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER_OFFSET,
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bControl)) {
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bControl)) {
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@ -287,9 +284,8 @@ int32_t EepromWriteByte(struct et131x_adapter *pAdapter, uint32_t unAddress,
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}
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}
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}
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}
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if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS)) {
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if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS))
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break;
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break;
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}
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/*
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/*
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* Step 6: Don't break here if we are revision 1, this is
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* Step 6: Don't break here if we are revision 1, this is
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@ -342,9 +338,8 @@ int32_t EepromWriteByte(struct et131x_adapter *pAdapter, uint32_t unAddress,
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bControl = EXTRACT_CONTROL_REG(unData);
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bControl = EXTRACT_CONTROL_REG(unData);
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if (bControl != 0xC0 || nIndex == 10000) {
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if (bControl != 0xC0 || nIndex == 10000)
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break;
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break;
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}
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nIndex++;
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nIndex++;
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}
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}
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@ -425,17 +420,15 @@ int32_t EepromReadByte(struct et131x_adapter *pAdapter, uint32_t unAddress,
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}
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}
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}
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}
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if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS)) {
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if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS))
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return FAILURE;
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return FAILURE;
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}
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/* Step 2: */
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/* Step 2: */
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bControl = 0;
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bControl = 0;
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bControl |= LBCIF_CONTROL_LBCIF_ENABLE;
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bControl |= LBCIF_CONTROL_LBCIF_ENABLE;
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if (unAddressingMode == DUAL_BYTE) {
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if (unAddressingMode == DUAL_BYTE)
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bControl |= LBCIF_CONTROL_TWO_BYTE_ADDR;
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bControl |= LBCIF_CONTROL_TWO_BYTE_ADDR;
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}
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if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER_OFFSET,
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if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER_OFFSET,
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bControl)) {
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bControl)) {
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@ -469,9 +462,8 @@ int32_t EepromReadByte(struct et131x_adapter *pAdapter, uint32_t unAddress,
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}
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}
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}
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}
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if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS)) {
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if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS))
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return FAILURE;
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return FAILURE;
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}
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/* Step 6: */
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/* Step 6: */
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*pbData = EXTRACT_DATA_REGISTER(unDword1);
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*pbData = EXTRACT_DATA_REGISTER(unDword1);
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@ -2,7 +2,7 @@
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* Agere Systems Inc.
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* Agere Systems Inc.
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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*
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*
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* Copyright © 2005 Agere Systems Inc.
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
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* All rights reserved.
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* http://www.agere.com
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* http://www.agere.com
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*
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*
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@ -20,7 +20,7 @@
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* software indicates your acceptance of these terms and conditions. If you do
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* software indicates your acceptance of these terms and conditions. If you do
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* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
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*
|
*
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* Copyright © 2005 Agere Systems Inc.
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
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* All rights reserved.
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*
|
*
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* Redistribution and use in source or binary forms, with or without
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* Redistribution and use in source or binary forms, with or without
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@ -41,7 +41,7 @@
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*
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*
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* Disclaimer
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* Disclaimer
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*
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*
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* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
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* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
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||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
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||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
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* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
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@ -2,7 +2,7 @@
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* Agere Systems Inc.
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* Agere Systems Inc.
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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*
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*
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* Copyright © 2005 Agere Systems Inc.
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
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* All rights reserved.
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* http://www.agere.com
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* http://www.agere.com
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*
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*
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@ -19,7 +19,7 @@
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* software indicates your acceptance of these terms and conditions. If you do
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* software indicates your acceptance of these terms and conditions. If you do
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||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
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*
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*
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* Copyright © 2005 Agere Systems Inc.
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
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* All rights reserved.
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*
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*
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* Redistribution and use in source or binary forms, with or without
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* Redistribution and use in source or binary forms, with or without
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@ -40,7 +40,7 @@
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*
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*
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* Disclaimer
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* Disclaimer
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*
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*
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* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
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* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
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* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
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* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
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@ -73,9 +73,9 @@
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/in.h>
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#include <linux/in.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <linux/io.h>
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#include <linux/bitops.h>
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#include <asm/system.h>
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#include <asm/system.h>
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#include <asm/bitops.h>
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#include <linux/netdevice.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/etherdevice.h>
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@ -198,21 +198,19 @@ void et131x_enable_interrupts(struct et131x_adapter *adapter)
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uint32_t MaskValue;
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uint32_t MaskValue;
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/* Enable all global interrupts */
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/* Enable all global interrupts */
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if ((adapter->FlowControl == TxOnly) || (adapter->FlowControl == Both)) {
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if (adapter->FlowControl == TxOnly || adapter->FlowControl == Both)
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MaskValue = INT_MASK_ENABLE;
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MaskValue = INT_MASK_ENABLE;
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} else {
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else
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MaskValue = INT_MASK_ENABLE_NO_FLOW;
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MaskValue = INT_MASK_ENABLE_NO_FLOW;
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}
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if (adapter->DriverNoPhyAccess) {
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if (adapter->DriverNoPhyAccess)
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MaskValue |= 0x10000;
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MaskValue |= 0x10000;
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}
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adapter->CachedMaskValue.value = MaskValue;
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adapter->CachedMaskValue.value = MaskValue;
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writel(MaskValue, &adapter->CSRAddress->global.int_mask.value);
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writel(MaskValue, &adapter->CSRAddress->global.int_mask.value);
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}
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}
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void et131x_disable_interrupts(struct et131x_adapter * adapter)
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void et131x_disable_interrupts(struct et131x_adapter *adapter)
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{
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{
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/* Disable all global interrupts */
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/* Disable all global interrupts */
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adapter->CachedMaskValue.value = INT_MASK_DISABLE;
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adapter->CachedMaskValue.value = INT_MASK_DISABLE;
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@ -2,7 +2,7 @@
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* Agere Systems Inc.
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* Agere Systems Inc.
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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*
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*
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* Copyright © 2005 Agere Systems Inc.
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
|
* All rights reserved.
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||||||
* http://www.agere.com
|
* http://www.agere.com
|
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*
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*
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|
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@ -20,7 +20,7 @@
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* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
|
* All rights reserved.
|
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*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
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*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
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@ -62,8 +62,8 @@
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#include "et1310_address_map.h"
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#include "et1310_address_map.h"
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#define INTERNAL_MEM_SIZE 0x400 //1024 of internal memory
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#define INTERNAL_MEM_SIZE 0x400 /* 1024 of internal memory */
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#define INTERNAL_MEM_RX_OFFSET 0x1FF //50% Tx, 50% Rx
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#define INTERNAL_MEM_RX_OFFSET 0x1FF /* 50% Tx, 50% Rx */
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#define REGS_MAX_ARRAY 4096
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#define REGS_MAX_ARRAY 4096
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@ -78,9 +78,10 @@
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*/
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*/
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#define INT_MASK_DISABLE 0xffffffff
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#define INT_MASK_DISABLE 0xffffffff
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// NOTE: Masking out MAC_STAT Interrupt for now...
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/* NOTE: Masking out MAC_STAT Interrupt for now...
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//#define INT_MASK_ENABLE 0xfff6bf17
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* #define INT_MASK_ENABLE 0xfff6bf17
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//#define INT_MASK_ENABLE_NO_FLOW 0xfff6bfd7
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* #define INT_MASK_ENABLE_NO_FLOW 0xfff6bfd7
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*/
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#define INT_MASK_ENABLE 0xfffebf17
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#define INT_MASK_ENABLE 0xfffebf17
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#define INT_MASK_ENABLE_NO_FLOW 0xfffebfd7
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#define INT_MASK_ENABLE_NO_FLOW 0xfffebfd7
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@ -2,7 +2,7 @@
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* Agere Systems Inc.
|
* Agere Systems Inc.
|
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -19,7 +19,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -40,7 +40,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
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@ -73,9 +73,9 @@
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/in.h>
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#include <linux/in.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <linux/io.h>
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#include <linux/bitops.h>
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#include <asm/system.h>
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#include <asm/system.h>
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#include <asm/bitops.h>
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||||||
|
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
#include <linux/etherdevice.h>
|
#include <linux/etherdevice.h>
|
||||||
|
|
@ -118,10 +118,10 @@ void ConfigMACRegs1(struct et131x_adapter *pAdapter)
|
||||||
writel(0xC00F0000, &pMac->cfg1.value);
|
writel(0xC00F0000, &pMac->cfg1.value);
|
||||||
|
|
||||||
/* Next lets configure the MAC Inter-packet gap register */
|
/* Next lets configure the MAC Inter-packet gap register */
|
||||||
ipg.bits.non_B2B_ipg_1 = 0x38; // 58d
|
ipg.bits.non_B2B_ipg_1 = 0x38; /* 58d */
|
||||||
ipg.bits.non_B2B_ipg_2 = 0x58; // 88d
|
ipg.bits.non_B2B_ipg_2 = 0x58; /* 88d */
|
||||||
ipg.bits.min_ifg_enforce = 0x50; // 80d
|
ipg.bits.min_ifg_enforce = 0x50; /* 80d */
|
||||||
ipg.bits.B2B_ipg = 0x60; // 96d
|
ipg.bits.B2B_ipg = 0x60; /* 96d */
|
||||||
writel(ipg.value, &pMac->ipg.value);
|
writel(ipg.value, &pMac->ipg.value);
|
||||||
|
|
||||||
/* Next lets configure the MAC Half Duplex register */
|
/* Next lets configure the MAC Half Duplex register */
|
||||||
|
|
@ -131,7 +131,7 @@ void ConfigMACRegs1(struct et131x_adapter *pAdapter)
|
||||||
hfdp.bits.no_backoff = 0x0;
|
hfdp.bits.no_backoff = 0x0;
|
||||||
hfdp.bits.excess_defer = 0x1;
|
hfdp.bits.excess_defer = 0x1;
|
||||||
hfdp.bits.rexmit_max = 0xF;
|
hfdp.bits.rexmit_max = 0xF;
|
||||||
hfdp.bits.coll_window = 0x37; // 55d
|
hfdp.bits.coll_window = 0x37; /* 55d */
|
||||||
writel(hfdp.value, &pMac->hfdp.value);
|
writel(hfdp.value, &pMac->hfdp.value);
|
||||||
|
|
||||||
/* Next lets configure the MAC Interface Control register */
|
/* Next lets configure the MAC Interface Control register */
|
||||||
|
|
@ -251,8 +251,7 @@ void ConfigMACRegs2(struct et131x_adapter *pAdapter)
|
||||||
udelay(10);
|
udelay(10);
|
||||||
delay++;
|
delay++;
|
||||||
cfg1.value = readl(&pMac->cfg1.value);
|
cfg1.value = readl(&pMac->cfg1.value);
|
||||||
} while ((!cfg1.bits.syncd_rx_en ||
|
} while ((!cfg1.bits.syncd_rx_en || !cfg1.bits.syncd_tx_en) &&
|
||||||
!cfg1.bits.syncd_tx_en) &&
|
|
||||||
delay < 100);
|
delay < 100);
|
||||||
|
|
||||||
if (delay == 100) {
|
if (delay == 100) {
|
||||||
|
|
@ -409,11 +408,10 @@ void ConfigRxMacRegs(struct et131x_adapter *pAdapter)
|
||||||
* bit 16: Receive frame truncated.
|
* bit 16: Receive frame truncated.
|
||||||
* bit 17: Drop packet enable
|
* bit 17: Drop packet enable
|
||||||
*/
|
*/
|
||||||
if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_100MBPS) {
|
if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_100MBPS)
|
||||||
writel(0x30038, &pRxMac->mif_ctrl.value);
|
writel(0x30038, &pRxMac->mif_ctrl.value);
|
||||||
} else {
|
else
|
||||||
writel(0x30030, &pRxMac->mif_ctrl.value);
|
writel(0x30030, &pRxMac->mif_ctrl.value);
|
||||||
}
|
|
||||||
|
|
||||||
/* Finally we initialize RxMac to be enabled & WOL disabled. Packet
|
/* Finally we initialize RxMac to be enabled & WOL disabled. Packet
|
||||||
* filter is always enabled since it is where the runt packets are
|
* filter is always enabled since it is where the runt packets are
|
||||||
|
|
@ -540,7 +538,7 @@ void ConfigMacStatRegs(struct et131x_adapter *pAdapter)
|
||||||
DBG_LEAVE(et131x_dbginfo);
|
DBG_LEAVE(et131x_dbginfo);
|
||||||
}
|
}
|
||||||
|
|
||||||
void ConfigFlowControl(struct et131x_adapter * pAdapter)
|
void ConfigFlowControl(struct et131x_adapter *pAdapter)
|
||||||
{
|
{
|
||||||
if (pAdapter->uiDuplexMode == 0) {
|
if (pAdapter->uiDuplexMode == 0) {
|
||||||
pAdapter->FlowControl = None;
|
pAdapter->FlowControl = None;
|
||||||
|
|
@ -558,23 +556,21 @@ void ConfigFlowControl(struct et131x_adapter * pAdapter)
|
||||||
pAdapter->FlowControl = pAdapter->RegistryFlowControl;
|
pAdapter->FlowControl = pAdapter->RegistryFlowControl;
|
||||||
} else if ((RemotePause == TRUEPHY_BIT_SET) &&
|
} else if ((RemotePause == TRUEPHY_BIT_SET) &&
|
||||||
(RemoteAsyncPause == TRUEPHY_BIT_CLEAR)) {
|
(RemoteAsyncPause == TRUEPHY_BIT_CLEAR)) {
|
||||||
if (pAdapter->RegistryFlowControl == Both) {
|
if (pAdapter->RegistryFlowControl == Both)
|
||||||
pAdapter->FlowControl = Both;
|
pAdapter->FlowControl = Both;
|
||||||
} else {
|
else
|
||||||
pAdapter->FlowControl = None;
|
pAdapter->FlowControl = None;
|
||||||
}
|
|
||||||
} else if ((RemotePause == TRUEPHY_BIT_CLEAR) &&
|
} else if ((RemotePause == TRUEPHY_BIT_CLEAR) &&
|
||||||
(RemoteAsyncPause == TRUEPHY_BIT_CLEAR)) {
|
(RemoteAsyncPause == TRUEPHY_BIT_CLEAR)) {
|
||||||
pAdapter->FlowControl = None;
|
pAdapter->FlowControl = None;
|
||||||
} else {/* if (RemotePause == TRUEPHY_CLEAR_BIT &&
|
} else {/* if (RemotePause == TRUEPHY_CLEAR_BIT &&
|
||||||
RemoteAsyncPause == TRUEPHY_SET_BIT) */
|
RemoteAsyncPause == TRUEPHY_SET_BIT) */
|
||||||
if (pAdapter->RegistryFlowControl == Both) {
|
if (pAdapter->RegistryFlowControl == Both)
|
||||||
pAdapter->FlowControl = RxOnly;
|
pAdapter->FlowControl = RxOnly;
|
||||||
} else {
|
else
|
||||||
pAdapter->FlowControl = None;
|
pAdapter->FlowControl = None;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -635,48 +631,34 @@ void HandleMacStatInterrupt(struct et131x_adapter *pAdapter)
|
||||||
* revolution of the counter. This routine is called when the counter
|
* revolution of the counter. This routine is called when the counter
|
||||||
* block indicates that one of the counters has wrapped.
|
* block indicates that one of the counters has wrapped.
|
||||||
*/
|
*/
|
||||||
if (Carry1.bits.rfcs) {
|
if (Carry1.bits.rfcs)
|
||||||
pAdapter->Stats.code_violations += COUNTER_WRAP_16_BIT;
|
pAdapter->Stats.code_violations += COUNTER_WRAP_16_BIT;
|
||||||
}
|
if (Carry1.bits.raln)
|
||||||
if (Carry1.bits.raln) {
|
|
||||||
pAdapter->Stats.alignment_err += COUNTER_WRAP_12_BIT;
|
pAdapter->Stats.alignment_err += COUNTER_WRAP_12_BIT;
|
||||||
}
|
if (Carry1.bits.rflr)
|
||||||
if (Carry1.bits.rflr) {
|
|
||||||
pAdapter->Stats.length_err += COUNTER_WRAP_16_BIT;
|
pAdapter->Stats.length_err += COUNTER_WRAP_16_BIT;
|
||||||
}
|
if (Carry1.bits.rfrg)
|
||||||
if (Carry1.bits.rfrg) {
|
|
||||||
pAdapter->Stats.other_errors += COUNTER_WRAP_16_BIT;
|
pAdapter->Stats.other_errors += COUNTER_WRAP_16_BIT;
|
||||||
}
|
if (Carry1.bits.rcde)
|
||||||
if (Carry1.bits.rcde) {
|
|
||||||
pAdapter->Stats.crc_err += COUNTER_WRAP_16_BIT;
|
pAdapter->Stats.crc_err += COUNTER_WRAP_16_BIT;
|
||||||
}
|
if (Carry1.bits.rovr)
|
||||||
if (Carry1.bits.rovr) {
|
|
||||||
pAdapter->Stats.rx_ov_flow += COUNTER_WRAP_16_BIT;
|
pAdapter->Stats.rx_ov_flow += COUNTER_WRAP_16_BIT;
|
||||||
}
|
if (Carry1.bits.rdrp)
|
||||||
if (Carry1.bits.rdrp) {
|
|
||||||
pAdapter->Stats.norcvbuf += COUNTER_WRAP_16_BIT;
|
pAdapter->Stats.norcvbuf += COUNTER_WRAP_16_BIT;
|
||||||
}
|
if (Carry2.bits.tovr)
|
||||||
if (Carry2.bits.tovr) {
|
|
||||||
pAdapter->Stats.max_pkt_error += COUNTER_WRAP_12_BIT;
|
pAdapter->Stats.max_pkt_error += COUNTER_WRAP_12_BIT;
|
||||||
}
|
if (Carry2.bits.tund)
|
||||||
if (Carry2.bits.tund) {
|
|
||||||
pAdapter->Stats.tx_uflo += COUNTER_WRAP_12_BIT;
|
pAdapter->Stats.tx_uflo += COUNTER_WRAP_12_BIT;
|
||||||
}
|
if (Carry2.bits.tscl)
|
||||||
if (Carry2.bits.tscl) {
|
|
||||||
pAdapter->Stats.first_collision += COUNTER_WRAP_12_BIT;
|
pAdapter->Stats.first_collision += COUNTER_WRAP_12_BIT;
|
||||||
}
|
if (Carry2.bits.tdfr)
|
||||||
if (Carry2.bits.tdfr) {
|
|
||||||
pAdapter->Stats.tx_deferred += COUNTER_WRAP_12_BIT;
|
pAdapter->Stats.tx_deferred += COUNTER_WRAP_12_BIT;
|
||||||
}
|
if (Carry2.bits.tmcl)
|
||||||
if (Carry2.bits.tmcl) {
|
|
||||||
pAdapter->Stats.excessive_collisions += COUNTER_WRAP_12_BIT;
|
pAdapter->Stats.excessive_collisions += COUNTER_WRAP_12_BIT;
|
||||||
}
|
if (Carry2.bits.tlcl)
|
||||||
if (Carry2.bits.tlcl) {
|
|
||||||
pAdapter->Stats.late_collisions += COUNTER_WRAP_12_BIT;
|
pAdapter->Stats.late_collisions += COUNTER_WRAP_12_BIT;
|
||||||
}
|
if (Carry2.bits.tncl)
|
||||||
if (Carry2.bits.tncl) {
|
|
||||||
pAdapter->Stats.collisions += COUNTER_WRAP_12_BIT;
|
pAdapter->Stats.collisions += COUNTER_WRAP_12_BIT;
|
||||||
}
|
|
||||||
|
|
||||||
DBG_LEAVE(et131x_dbginfo);
|
DBG_LEAVE(et131x_dbginfo);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -73,7 +73,7 @@
|
||||||
#define COUNTER_MASK_16_BIT (COUNTER_WRAP_16_BIT - 1)
|
#define COUNTER_MASK_16_BIT (COUNTER_WRAP_16_BIT - 1)
|
||||||
#define COUNTER_MASK_12_BIT (COUNTER_WRAP_12_BIT - 1)
|
#define COUNTER_MASK_12_BIT (COUNTER_WRAP_12_BIT - 1)
|
||||||
|
|
||||||
#define UPDATE_COUNTER(HostCnt,DevCnt) \
|
#define UPDATE_COUNTER(HostCnt, DevCnt) \
|
||||||
HostCnt = HostCnt + DevCnt;
|
HostCnt = HostCnt + DevCnt;
|
||||||
|
|
||||||
/* Forward declaration of the private adapter structure */
|
/* Forward declaration of the private adapter structure */
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright * 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -19,7 +19,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright * 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -40,7 +40,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -74,9 +74,9 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/in.h>
|
#include <linux/in.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <asm/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
#include <linux/etherdevice.h>
|
#include <linux/etherdevice.h>
|
||||||
|
|
@ -449,22 +449,20 @@ static int et131x_xcvr_init(struct et131x_adapter *adapter)
|
||||||
|
|
||||||
switch (adapter->AiForceSpeed) {
|
switch (adapter->AiForceSpeed) {
|
||||||
case 10:
|
case 10:
|
||||||
if (adapter->AiForceDpx == 1) {
|
if (adapter->AiForceDpx == 1)
|
||||||
TPAL_SetPhy10HalfDuplex(adapter);
|
TPAL_SetPhy10HalfDuplex(adapter);
|
||||||
} else if (adapter->AiForceDpx == 2) {
|
else if (adapter->AiForceDpx == 2)
|
||||||
TPAL_SetPhy10FullDuplex(adapter);
|
TPAL_SetPhy10FullDuplex(adapter);
|
||||||
} else {
|
else
|
||||||
TPAL_SetPhy10Force(adapter);
|
TPAL_SetPhy10Force(adapter);
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
case 100:
|
case 100:
|
||||||
if (adapter->AiForceDpx == 1) {
|
if (adapter->AiForceDpx == 1)
|
||||||
TPAL_SetPhy100HalfDuplex(adapter);
|
TPAL_SetPhy100HalfDuplex(adapter);
|
||||||
} else if (adapter->AiForceDpx == 2) {
|
else if (adapter->AiForceDpx == 2)
|
||||||
TPAL_SetPhy100FullDuplex(adapter);
|
TPAL_SetPhy100FullDuplex(adapter);
|
||||||
} else {
|
else
|
||||||
TPAL_SetPhy100Force(adapter);
|
TPAL_SetPhy100Force(adapter);
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
case 1000:
|
case 1000:
|
||||||
TPAL_SetPhy1000FullDuplex(adapter);
|
TPAL_SetPhy1000FullDuplex(adapter);
|
||||||
|
|
@ -505,16 +503,17 @@ void et131x_Mii_check(struct et131x_adapter *pAdapter,
|
||||||
spin_unlock_irqrestore(&pAdapter->Lock, lockflags);
|
spin_unlock_irqrestore(&pAdapter->Lock, lockflags);
|
||||||
|
|
||||||
/* Don't indicate state if we're in loopback mode */
|
/* Don't indicate state if we're in loopback mode */
|
||||||
if (pAdapter->RegistryPhyLoopbk == false) {
|
if (pAdapter->RegistryPhyLoopbk == false)
|
||||||
netif_carrier_on(pAdapter->netdev);
|
netif_carrier_on(pAdapter->netdev);
|
||||||
}
|
|
||||||
} else {
|
} else {
|
||||||
DBG_WARNING(et131x_dbginfo,
|
DBG_WARNING(et131x_dbginfo,
|
||||||
"Link down cable problem\n");
|
"Link down cable problem\n");
|
||||||
|
|
||||||
if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_10MBPS) {
|
if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_10MBPS) {
|
||||||
// NOTE - Is there a way to query this without TruePHY?
|
/* NOTE - Is there a way to query this without
|
||||||
// && TRU_QueryCoreType(pAdapter->hTruePhy, 0) == EMI_TRUEPHY_A13O) {
|
* TruePHY?
|
||||||
|
* && TRU_QueryCoreType(pAdapter->hTruePhy, 0) == EMI_TRUEPHY_A13O) {
|
||||||
|
*/
|
||||||
uint16_t Register18;
|
uint16_t Register18;
|
||||||
|
|
||||||
MiRead(pAdapter, 0x12, &Register18);
|
MiRead(pAdapter, 0x12, &Register18);
|
||||||
|
|
@ -543,10 +542,9 @@ void et131x_Mii_check(struct et131x_adapter *pAdapter,
|
||||||
/* Only indicate state if we're in loopback
|
/* Only indicate state if we're in loopback
|
||||||
* mode
|
* mode
|
||||||
*/
|
*/
|
||||||
if (pAdapter->RegistryPhyLoopbk == false) {
|
if (pAdapter->RegistryPhyLoopbk == false)
|
||||||
netif_carrier_off(pAdapter->netdev);
|
netif_carrier_off(pAdapter->netdev);
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
pAdapter->uiLinkSpeed = 0;
|
pAdapter->uiLinkSpeed = 0;
|
||||||
pAdapter->uiDuplexMode = 0;
|
pAdapter->uiDuplexMode = 0;
|
||||||
|
|
@ -574,15 +572,14 @@ void et131x_Mii_check(struct et131x_adapter *pAdapter,
|
||||||
/* Setup the PHY into coma mode until the cable is
|
/* Setup the PHY into coma mode until the cable is
|
||||||
* plugged back in
|
* plugged back in
|
||||||
*/
|
*/
|
||||||
if (pAdapter->RegistryPhyComa == 1) {
|
if (pAdapter->RegistryPhyComa == 1)
|
||||||
EnablePhyComa(pAdapter);
|
EnablePhyComa(pAdapter);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
if (bmsr_ints.bits.auto_neg_complete ||
|
if (bmsr_ints.bits.auto_neg_complete ||
|
||||||
((pAdapter->AiForceDpx == 3) && (bmsr_ints.bits.link_status))) {
|
(pAdapter->AiForceDpx == 3 && bmsr_ints.bits.link_status)) {
|
||||||
if (bmsr.bits.auto_neg_complete || (pAdapter->AiForceDpx == 3)) {
|
if (bmsr.bits.auto_neg_complete || pAdapter->AiForceDpx == 3) {
|
||||||
ET1310_PhyLinkStatus(pAdapter,
|
ET1310_PhyLinkStatus(pAdapter,
|
||||||
&ucLinkStatus, &uiAutoNegStatus,
|
&ucLinkStatus, &uiAutoNegStatus,
|
||||||
&uiSpeed, &uiDuplex, &uiMdiMdix,
|
&uiSpeed, &uiDuplex, &uiMdiMdix,
|
||||||
|
|
@ -599,8 +596,11 @@ void et131x_Mii_check(struct et131x_adapter *pAdapter,
|
||||||
pAdapter->PoMgmt.TransPhyComaModeOnBoot = 20;
|
pAdapter->PoMgmt.TransPhyComaModeOnBoot = 20;
|
||||||
|
|
||||||
if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_10MBPS) {
|
if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_10MBPS) {
|
||||||
// NOTE - Is there a way to query this without TruePHY?
|
/*
|
||||||
// && TRU_QueryCoreType(pAdapter->hTruePhy, 0) == EMI_TRUEPHY_A13O) {
|
* NOTE - Is there a way to query this without
|
||||||
|
* TruePHY?
|
||||||
|
* && TRU_QueryCoreType(pAdapter->hTruePhy, 0)== EMI_TRUEPHY_A13O) {
|
||||||
|
*/
|
||||||
uint16_t Register18;
|
uint16_t Register18;
|
||||||
|
|
||||||
MiRead(pAdapter, 0x12, &Register18);
|
MiRead(pAdapter, 0x12, &Register18);
|
||||||
|
|
@ -612,12 +612,10 @@ void et131x_Mii_check(struct et131x_adapter *pAdapter,
|
||||||
|
|
||||||
ConfigFlowControl(pAdapter);
|
ConfigFlowControl(pAdapter);
|
||||||
|
|
||||||
if ((pAdapter->uiLinkSpeed == TRUEPHY_SPEED_1000MBPS) &&
|
if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_1000MBPS &&
|
||||||
(pAdapter->RegistryJumboPacket > 2048))
|
pAdapter->RegistryJumboPacket > 2048)
|
||||||
{
|
|
||||||
ET1310_PhyAndOrReg(pAdapter, 0x16, 0xcfff,
|
ET1310_PhyAndOrReg(pAdapter, 0x16, 0xcfff,
|
||||||
0x2000);
|
0x2000);
|
||||||
}
|
|
||||||
|
|
||||||
SetRxDmaTimer(pAdapter);
|
SetRxDmaTimer(pAdapter);
|
||||||
ConfigMACRegs2(pAdapter);
|
ConfigMACRegs2(pAdapter);
|
||||||
|
|
@ -843,11 +841,10 @@ void TPAL_SetPhyAutoNeg(struct et131x_adapter *pAdapter)
|
||||||
|
|
||||||
ET1310_PhyAdvertise100BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_BOTH);
|
ET1310_PhyAdvertise100BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_BOTH);
|
||||||
|
|
||||||
if (pAdapter->DeviceID != ET131X_PCI_DEVICE_ID_FAST) {
|
if (pAdapter->DeviceID != ET131X_PCI_DEVICE_ID_FAST)
|
||||||
ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL);
|
ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL);
|
||||||
} else {
|
else
|
||||||
ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE);
|
ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE);
|
||||||
}
|
|
||||||
|
|
||||||
/* Make sure auto-neg is ON (it is disabled in FORCE modes) */
|
/* Make sure auto-neg is ON (it is disabled in FORCE modes) */
|
||||||
ET1310_PhyAutoNeg(pAdapter, true);
|
ET1310_PhyAutoNeg(pAdapter, true);
|
||||||
|
|
@ -910,64 +907,65 @@ void ET1310_PhyInit(struct et131x_adapter *pAdapter)
|
||||||
{
|
{
|
||||||
uint16_t usData, usIndex;
|
uint16_t usData, usIndex;
|
||||||
|
|
||||||
if (pAdapter == NULL) {
|
if (pAdapter == NULL)
|
||||||
return;
|
return;
|
||||||
}
|
|
||||||
|
|
||||||
// get the identity (again ?)
|
/* get the identity (again ?) */
|
||||||
MiRead(pAdapter, PHY_ID_1, &usData);
|
MiRead(pAdapter, PHY_ID_1, &usData);
|
||||||
MiRead(pAdapter, PHY_ID_2, &usData);
|
MiRead(pAdapter, PHY_ID_2, &usData);
|
||||||
|
|
||||||
// what does this do/achieve ?
|
/* what does this do/achieve ? */
|
||||||
MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); // should read 0002
|
MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); /* should read 0002 */
|
||||||
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0006);
|
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0006);
|
||||||
|
|
||||||
// read modem register 0402, should I do something with the return data ?
|
/* read modem register 0402, should I do something with the return
|
||||||
|
data ? */
|
||||||
MiWrite(pAdapter, PHY_INDEX_REG, 0x0402);
|
MiWrite(pAdapter, PHY_INDEX_REG, 0x0402);
|
||||||
MiRead(pAdapter, PHY_DATA_REG, &usData);
|
MiRead(pAdapter, PHY_DATA_REG, &usData);
|
||||||
|
|
||||||
// what does this do/achieve ?
|
/* what does this do/achieve ? */
|
||||||
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0002);
|
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0002);
|
||||||
|
|
||||||
// get the identity (again ?)
|
/* get the identity (again ?) */
|
||||||
MiRead(pAdapter, PHY_ID_1, &usData);
|
MiRead(pAdapter, PHY_ID_1, &usData);
|
||||||
MiRead(pAdapter, PHY_ID_2, &usData);
|
MiRead(pAdapter, PHY_ID_2, &usData);
|
||||||
|
|
||||||
// what does this achieve ?
|
/* what does this achieve ? */
|
||||||
MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); // should read 0002
|
MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); /* should read 0002 */
|
||||||
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0006);
|
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0006);
|
||||||
|
|
||||||
// read modem register 0402, should I do something with the return data?
|
/* read modem register 0402, should I do something with
|
||||||
|
the return data? */
|
||||||
MiWrite(pAdapter, PHY_INDEX_REG, 0x0402);
|
MiWrite(pAdapter, PHY_INDEX_REG, 0x0402);
|
||||||
MiRead(pAdapter, PHY_DATA_REG, &usData);
|
MiRead(pAdapter, PHY_DATA_REG, &usData);
|
||||||
|
|
||||||
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0002);
|
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0002);
|
||||||
|
|
||||||
// what does this achieve (should return 0x1040)
|
/* what does this achieve (should return 0x1040) */
|
||||||
MiRead(pAdapter, PHY_CONTROL, &usData);
|
MiRead(pAdapter, PHY_CONTROL, &usData);
|
||||||
MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); // should read 0002
|
MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); /* should read 0002 */
|
||||||
MiWrite(pAdapter, PHY_CONTROL, 0x1840);
|
MiWrite(pAdapter, PHY_CONTROL, 0x1840);
|
||||||
|
|
||||||
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0007);
|
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0007);
|
||||||
|
|
||||||
// here the writing of the array starts....
|
/* here the writing of the array starts.... */
|
||||||
usIndex = 0;
|
usIndex = 0;
|
||||||
while (ConfigPhy[usIndex][0] != 0x0000) {
|
while (ConfigPhy[usIndex][0] != 0x0000) {
|
||||||
// write value
|
/* write value */
|
||||||
MiWrite(pAdapter, PHY_INDEX_REG, ConfigPhy[usIndex][0]);
|
MiWrite(pAdapter, PHY_INDEX_REG, ConfigPhy[usIndex][0]);
|
||||||
MiWrite(pAdapter, PHY_DATA_REG, ConfigPhy[usIndex][1]);
|
MiWrite(pAdapter, PHY_DATA_REG, ConfigPhy[usIndex][1]);
|
||||||
|
|
||||||
// read it back
|
/* read it back */
|
||||||
MiWrite(pAdapter, PHY_INDEX_REG, ConfigPhy[usIndex][0]);
|
MiWrite(pAdapter, PHY_INDEX_REG, ConfigPhy[usIndex][0]);
|
||||||
MiRead(pAdapter, PHY_DATA_REG, &usData);
|
MiRead(pAdapter, PHY_DATA_REG, &usData);
|
||||||
|
|
||||||
// do a check on the value read back ?
|
/* do a check on the value read back ? */
|
||||||
usIndex++;
|
usIndex++;
|
||||||
}
|
}
|
||||||
// here the writing of the array ends...
|
/* here the writing of the array ends... */
|
||||||
|
|
||||||
MiRead(pAdapter, PHY_CONTROL, &usData); // 0x1840
|
MiRead(pAdapter, PHY_CONTROL, &usData); /* 0x1840 */
|
||||||
MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); // should read 0007
|
MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData);/* should read 0007 */
|
||||||
MiWrite(pAdapter, PHY_CONTROL, 0x1040);
|
MiWrite(pAdapter, PHY_CONTROL, 0x1040);
|
||||||
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0002);
|
MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0002);
|
||||||
}
|
}
|
||||||
|
|
@ -984,11 +982,11 @@ void ET1310_PhyPowerDown(struct et131x_adapter *pAdapter, bool down)
|
||||||
MiRead(pAdapter, PHY_CONTROL, &usData);
|
MiRead(pAdapter, PHY_CONTROL, &usData);
|
||||||
|
|
||||||
if (down == false) {
|
if (down == false) {
|
||||||
// Power UP
|
/* Power UP */
|
||||||
usData &= ~0x0800;
|
usData &= ~0x0800;
|
||||||
MiWrite(pAdapter, PHY_CONTROL, usData);
|
MiWrite(pAdapter, PHY_CONTROL, usData);
|
||||||
} else {
|
} else {
|
||||||
// Power DOWN
|
/* Power DOWN */
|
||||||
usData |= 0x0800;
|
usData |= 0x0800;
|
||||||
MiWrite(pAdapter, PHY_CONTROL, usData);
|
MiWrite(pAdapter, PHY_CONTROL, usData);
|
||||||
}
|
}
|
||||||
|
|
@ -1001,11 +999,11 @@ void ET1310_PhyAutoNeg(struct et131x_adapter *pAdapter, bool enable)
|
||||||
MiRead(pAdapter, PHY_CONTROL, &usData);
|
MiRead(pAdapter, PHY_CONTROL, &usData);
|
||||||
|
|
||||||
if (enable == true) {
|
if (enable == true) {
|
||||||
// Autonegotiation ON
|
/* Autonegotiation ON */
|
||||||
usData |= 0x1000;
|
usData |= 0x1000;
|
||||||
MiWrite(pAdapter, PHY_CONTROL, usData);
|
MiWrite(pAdapter, PHY_CONTROL, usData);
|
||||||
} else {
|
} else {
|
||||||
// Autonegotiation OFF
|
/* Autonegotiation OFF */
|
||||||
usData &= ~0x1000;
|
usData &= ~0x1000;
|
||||||
MiWrite(pAdapter, PHY_CONTROL, usData);
|
MiWrite(pAdapter, PHY_CONTROL, usData);
|
||||||
}
|
}
|
||||||
|
|
@ -1018,11 +1016,11 @@ void ET1310_PhyDuplexMode(struct et131x_adapter *pAdapter, uint16_t duplex)
|
||||||
MiRead(pAdapter, PHY_CONTROL, &usData);
|
MiRead(pAdapter, PHY_CONTROL, &usData);
|
||||||
|
|
||||||
if (duplex == TRUEPHY_DUPLEX_FULL) {
|
if (duplex == TRUEPHY_DUPLEX_FULL) {
|
||||||
// Set Full Duplex
|
/* Set Full Duplex */
|
||||||
usData |= 0x100;
|
usData |= 0x100;
|
||||||
MiWrite(pAdapter, PHY_CONTROL, usData);
|
MiWrite(pAdapter, PHY_CONTROL, usData);
|
||||||
} else {
|
} else {
|
||||||
// Set Half Duplex
|
/* Set Half Duplex */
|
||||||
usData &= ~0x100;
|
usData &= ~0x100;
|
||||||
MiWrite(pAdapter, PHY_CONTROL, usData);
|
MiWrite(pAdapter, PHY_CONTROL, usData);
|
||||||
}
|
}
|
||||||
|
|
@ -1032,20 +1030,20 @@ void ET1310_PhySpeedSelect(struct et131x_adapter *pAdapter, uint16_t speed)
|
||||||
{
|
{
|
||||||
uint16_t usData;
|
uint16_t usData;
|
||||||
|
|
||||||
// Read the PHY control register
|
/* Read the PHY control register */
|
||||||
MiRead(pAdapter, PHY_CONTROL, &usData);
|
MiRead(pAdapter, PHY_CONTROL, &usData);
|
||||||
|
|
||||||
// Clear all Speed settings (Bits 6, 13)
|
/* Clear all Speed settings (Bits 6, 13) */
|
||||||
usData &= ~0x2040;
|
usData &= ~0x2040;
|
||||||
|
|
||||||
// Reset the speed bits based on user selection
|
/* Reset the speed bits based on user selection */
|
||||||
switch (speed) {
|
switch (speed) {
|
||||||
case TRUEPHY_SPEED_10MBPS:
|
case TRUEPHY_SPEED_10MBPS:
|
||||||
// Bits already cleared above, do nothing
|
/* Bits already cleared above, do nothing */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUEPHY_SPEED_100MBPS:
|
case TRUEPHY_SPEED_100MBPS:
|
||||||
// 100M == Set bit 13
|
/* 100M == Set bit 13 */
|
||||||
usData |= 0x2000;
|
usData |= 0x2000;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
|
@ -1055,7 +1053,7 @@ void ET1310_PhySpeedSelect(struct et131x_adapter *pAdapter, uint16_t speed)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Write back the new speed
|
/* Write back the new speed */
|
||||||
MiWrite(pAdapter, PHY_CONTROL, usData);
|
MiWrite(pAdapter, PHY_CONTROL, usData);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -1064,24 +1062,24 @@ void ET1310_PhyAdvertise1000BaseT(struct et131x_adapter *pAdapter,
|
||||||
{
|
{
|
||||||
uint16_t usData;
|
uint16_t usData;
|
||||||
|
|
||||||
// Read the PHY 1000 Base-T Control Register
|
/* Read the PHY 1000 Base-T Control Register */
|
||||||
MiRead(pAdapter, PHY_1000_CONTROL, &usData);
|
MiRead(pAdapter, PHY_1000_CONTROL, &usData);
|
||||||
|
|
||||||
// Clear Bits 8,9
|
/* Clear Bits 8,9 */
|
||||||
usData &= ~0x0300;
|
usData &= ~0x0300;
|
||||||
|
|
||||||
switch (duplex) {
|
switch (duplex) {
|
||||||
case TRUEPHY_ADV_DUPLEX_NONE:
|
case TRUEPHY_ADV_DUPLEX_NONE:
|
||||||
// Duplex already cleared, do nothing
|
/* Duplex already cleared, do nothing */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUEPHY_ADV_DUPLEX_FULL:
|
case TRUEPHY_ADV_DUPLEX_FULL:
|
||||||
// Set Bit 9
|
/* Set Bit 9 */
|
||||||
usData |= 0x0200;
|
usData |= 0x0200;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUEPHY_ADV_DUPLEX_HALF:
|
case TRUEPHY_ADV_DUPLEX_HALF:
|
||||||
// Set Bit 8
|
/* Set Bit 8 */
|
||||||
usData |= 0x0100;
|
usData |= 0x0100;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
|
@ -1091,7 +1089,7 @@ void ET1310_PhyAdvertise1000BaseT(struct et131x_adapter *pAdapter,
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Write back advertisement
|
/* Write back advertisement */
|
||||||
MiWrite(pAdapter, PHY_1000_CONTROL, usData);
|
MiWrite(pAdapter, PHY_1000_CONTROL, usData);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -1100,35 +1098,35 @@ void ET1310_PhyAdvertise100BaseT(struct et131x_adapter *pAdapter,
|
||||||
{
|
{
|
||||||
uint16_t usData;
|
uint16_t usData;
|
||||||
|
|
||||||
// Read the Autonegotiation Register (10/100)
|
/* Read the Autonegotiation Register (10/100) */
|
||||||
MiRead(pAdapter, PHY_AUTO_ADVERTISEMENT, &usData);
|
MiRead(pAdapter, PHY_AUTO_ADVERTISEMENT, &usData);
|
||||||
|
|
||||||
// Clear bits 7,8
|
/* Clear bits 7,8 */
|
||||||
usData &= ~0x0180;
|
usData &= ~0x0180;
|
||||||
|
|
||||||
switch (duplex) {
|
switch (duplex) {
|
||||||
case TRUEPHY_ADV_DUPLEX_NONE:
|
case TRUEPHY_ADV_DUPLEX_NONE:
|
||||||
// Duplex already cleared, do nothing
|
/* Duplex already cleared, do nothing */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUEPHY_ADV_DUPLEX_FULL:
|
case TRUEPHY_ADV_DUPLEX_FULL:
|
||||||
// Set Bit 8
|
/* Set Bit 8 */
|
||||||
usData |= 0x0100;
|
usData |= 0x0100;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUEPHY_ADV_DUPLEX_HALF:
|
case TRUEPHY_ADV_DUPLEX_HALF:
|
||||||
// Set Bit 7
|
/* Set Bit 7 */
|
||||||
usData |= 0x0080;
|
usData |= 0x0080;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUEPHY_ADV_DUPLEX_BOTH:
|
case TRUEPHY_ADV_DUPLEX_BOTH:
|
||||||
default:
|
default:
|
||||||
// Set Bits 7,8
|
/* Set Bits 7,8 */
|
||||||
usData |= 0x0180;
|
usData |= 0x0180;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Write back advertisement
|
/* Write back advertisement */
|
||||||
MiWrite(pAdapter, PHY_AUTO_ADVERTISEMENT, usData);
|
MiWrite(pAdapter, PHY_AUTO_ADVERTISEMENT, usData);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -1137,35 +1135,35 @@ void ET1310_PhyAdvertise10BaseT(struct et131x_adapter *pAdapter,
|
||||||
{
|
{
|
||||||
uint16_t usData;
|
uint16_t usData;
|
||||||
|
|
||||||
// Read the Autonegotiation Register (10/100)
|
/* Read the Autonegotiation Register (10/100) */
|
||||||
MiRead(pAdapter, PHY_AUTO_ADVERTISEMENT, &usData);
|
MiRead(pAdapter, PHY_AUTO_ADVERTISEMENT, &usData);
|
||||||
|
|
||||||
// Clear bits 5,6
|
/* Clear bits 5,6 */
|
||||||
usData &= ~0x0060;
|
usData &= ~0x0060;
|
||||||
|
|
||||||
switch (duplex) {
|
switch (duplex) {
|
||||||
case TRUEPHY_ADV_DUPLEX_NONE:
|
case TRUEPHY_ADV_DUPLEX_NONE:
|
||||||
// Duplex already cleared, do nothing
|
/* Duplex already cleared, do nothing */
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUEPHY_ADV_DUPLEX_FULL:
|
case TRUEPHY_ADV_DUPLEX_FULL:
|
||||||
// Set Bit 6
|
/* Set Bit 6 */
|
||||||
usData |= 0x0040;
|
usData |= 0x0040;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUEPHY_ADV_DUPLEX_HALF:
|
case TRUEPHY_ADV_DUPLEX_HALF:
|
||||||
// Set Bit 5
|
/* Set Bit 5 */
|
||||||
usData |= 0x0020;
|
usData |= 0x0020;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUEPHY_ADV_DUPLEX_BOTH:
|
case TRUEPHY_ADV_DUPLEX_BOTH:
|
||||||
default:
|
default:
|
||||||
// Set Bits 5,6
|
/* Set Bits 5,6 */
|
||||||
usData |= 0x0060;
|
usData |= 0x0060;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Write back advertisement
|
/* Write back advertisement */
|
||||||
MiWrite(pAdapter, PHY_AUTO_ADVERTISEMENT, usData);
|
MiWrite(pAdapter, PHY_AUTO_ADVERTISEMENT, usData);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -1200,18 +1198,15 @@ void ET1310_PhyLinkStatus(struct et131x_adapter *pAdapter,
|
||||||
TRUEPHY_ANEG_DISABLED;
|
TRUEPHY_ANEG_DISABLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (uiLinkSpeed) {
|
if (uiLinkSpeed)
|
||||||
*uiLinkSpeed = (usVmiPhyStatus & 0x0300) >> 8;
|
*uiLinkSpeed = (usVmiPhyStatus & 0x0300) >> 8;
|
||||||
}
|
|
||||||
|
|
||||||
if (uiDuplexMode) {
|
if (uiDuplexMode)
|
||||||
*uiDuplexMode = (usVmiPhyStatus & 0x0080) >> 7;
|
*uiDuplexMode = (usVmiPhyStatus & 0x0080) >> 7;
|
||||||
}
|
|
||||||
|
|
||||||
if (uiMdiMdix) {
|
if (uiMdiMdix)
|
||||||
/* NOTE: Need to complete this */
|
/* NOTE: Need to complete this */
|
||||||
*uiMdiMdix = 0;
|
*uiMdiMdix = 0;
|
||||||
}
|
|
||||||
|
|
||||||
if (uiMasterSlave) {
|
if (uiMasterSlave) {
|
||||||
*uiMasterSlave =
|
*uiMasterSlave =
|
||||||
|
|
@ -1231,16 +1226,16 @@ void ET1310_PhyAndOrReg(struct et131x_adapter *pAdapter,
|
||||||
{
|
{
|
||||||
uint16_t reg;
|
uint16_t reg;
|
||||||
|
|
||||||
// Read the requested register
|
/* Read the requested register */
|
||||||
MiRead(pAdapter, regnum, ®);
|
MiRead(pAdapter, regnum, ®);
|
||||||
|
|
||||||
// Apply the AND mask
|
/* Apply the AND mask */
|
||||||
reg &= andMask;
|
reg &= andMask;
|
||||||
|
|
||||||
// Apply the OR mask
|
/* Apply the OR mask */
|
||||||
reg |= orMask;
|
reg |= orMask;
|
||||||
|
|
||||||
// Write the value back to the register
|
/* Write the value back to the register */
|
||||||
MiWrite(pAdapter, regnum, reg);
|
MiWrite(pAdapter, regnum, reg);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -1250,17 +1245,16 @@ void ET1310_PhyAccessMiBit(struct et131x_adapter *pAdapter, uint16_t action,
|
||||||
uint16_t reg;
|
uint16_t reg;
|
||||||
uint16_t mask = 0;
|
uint16_t mask = 0;
|
||||||
|
|
||||||
// Create a mask to isolate the requested bit
|
/* Create a mask to isolate the requested bit */
|
||||||
mask = 0x0001 << bitnum;
|
mask = 0x0001 << bitnum;
|
||||||
|
|
||||||
// Read the requested register
|
/* Read the requested register */
|
||||||
MiRead(pAdapter, regnum, ®);
|
MiRead(pAdapter, regnum, ®);
|
||||||
|
|
||||||
switch (action) {
|
switch (action) {
|
||||||
case TRUEPHY_BIT_READ:
|
case TRUEPHY_BIT_READ:
|
||||||
if (value != NULL) {
|
if (value != NULL)
|
||||||
*value = (reg & mask) >> bitnum;
|
*value = (reg & mask) >> bitnum;
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case TRUEPHY_BIT_SET:
|
case TRUEPHY_BIT_SET:
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -19,7 +19,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -40,7 +40,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -73,9 +73,9 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/in.h>
|
#include <linux/in.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <asm/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
#include <linux/etherdevice.h>
|
#include <linux/etherdevice.h>
|
||||||
|
|
@ -139,9 +139,8 @@ void EnablePhyComa(struct et131x_adapter *pAdapter)
|
||||||
spin_unlock_irqrestore(&pAdapter->SendHWLock, lockflags);
|
spin_unlock_irqrestore(&pAdapter->SendHWLock, lockflags);
|
||||||
|
|
||||||
/* Wait for outstanding Receive packets */
|
/* Wait for outstanding Receive packets */
|
||||||
while ((MP_GET_RCV_REF(pAdapter) != 0) && (LoopCounter-- > 0)) {
|
while ((MP_GET_RCV_REF(pAdapter) != 0) && (LoopCounter-- > 0))
|
||||||
mdelay(2);
|
mdelay(2);
|
||||||
}
|
|
||||||
|
|
||||||
/* Gate off JAGCore 3 clock domains */
|
/* Gate off JAGCore 3 clock domains */
|
||||||
GlobalPmCSR.bits.pm_sysclk_gate = 0;
|
GlobalPmCSR.bits.pm_sysclk_gate = 0;
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -62,7 +62,7 @@
|
||||||
#include "et1310_address_map.h"
|
#include "et1310_address_map.h"
|
||||||
|
|
||||||
#define MAX_WOL_PACKET_SIZE 0x80
|
#define MAX_WOL_PACKET_SIZE 0x80
|
||||||
#define MAX_WOL_MASK_SIZE ( MAX_WOL_PACKET_SIZE / 8 )
|
#define MAX_WOL_MASK_SIZE (MAX_WOL_PACKET_SIZE / 8)
|
||||||
#define NUM_WOL_PATTERNS 0x5
|
#define NUM_WOL_PATTERNS 0x5
|
||||||
#define CRC16_POLY 0x1021
|
#define CRC16_POLY 0x1021
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -19,7 +19,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -40,7 +40,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -74,9 +74,9 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/in.h>
|
#include <linux/in.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <asm/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
#include <linux/etherdevice.h>
|
#include <linux/etherdevice.h>
|
||||||
|
|
@ -120,7 +120,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
|
||||||
DBG_ENTER(et131x_dbginfo);
|
DBG_ENTER(et131x_dbginfo);
|
||||||
|
|
||||||
/* Setup some convenience pointers */
|
/* Setup some convenience pointers */
|
||||||
rx_ring = (RX_RING_t *) & adapter->RxRing;
|
rx_ring = (RX_RING_t *) &adapter->RxRing;
|
||||||
|
|
||||||
/* Alloc memory for the lookup table */
|
/* Alloc memory for the lookup table */
|
||||||
#ifdef USE_FBR0
|
#ifdef USE_FBR0
|
||||||
|
|
@ -250,11 +250,10 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
|
||||||
* the size of FBR0. By allocating N buffers at once, we
|
* the size of FBR0. By allocating N buffers at once, we
|
||||||
* reduce this overhead.
|
* reduce this overhead.
|
||||||
*/
|
*/
|
||||||
if (rx_ring->Fbr1BufferSize > 4096) {
|
if (rx_ring->Fbr1BufferSize > 4096)
|
||||||
Fbr1Align = 4096;
|
Fbr1Align = 4096;
|
||||||
} else {
|
else
|
||||||
Fbr1Align = rx_ring->Fbr1BufferSize;
|
Fbr1Align = rx_ring->Fbr1BufferSize;
|
||||||
}
|
|
||||||
|
|
||||||
FBRChunkSize =
|
FBRChunkSize =
|
||||||
(FBR_CHUNKS * rx_ring->Fbr1BufferSize) + Fbr1Align - 1;
|
(FBR_CHUNKS * rx_ring->Fbr1BufferSize) + Fbr1Align - 1;
|
||||||
|
|
@ -443,7 +442,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
|
||||||
DBG_ENTER(et131x_dbginfo);
|
DBG_ENTER(et131x_dbginfo);
|
||||||
|
|
||||||
/* Setup some convenience pointers */
|
/* Setup some convenience pointers */
|
||||||
rx_ring = (RX_RING_t *) & adapter->RxRing;
|
rx_ring = (RX_RING_t *) &adapter->RxRing;
|
||||||
|
|
||||||
/* Free RFDs and associated packet descriptors */
|
/* Free RFDs and associated packet descriptors */
|
||||||
DBG_ASSERT(rx_ring->nReadyRecv == rx_ring->NumRfd);
|
DBG_ASSERT(rx_ring->nReadyRecv == rx_ring->NumRfd);
|
||||||
|
|
@ -471,11 +470,10 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
|
||||||
if (rx_ring->Fbr1MemVa[index]) {
|
if (rx_ring->Fbr1MemVa[index]) {
|
||||||
uint32_t Fbr1Align;
|
uint32_t Fbr1Align;
|
||||||
|
|
||||||
if (rx_ring->Fbr1BufferSize > 4096) {
|
if (rx_ring->Fbr1BufferSize > 4096)
|
||||||
Fbr1Align = 4096;
|
Fbr1Align = 4096;
|
||||||
} else {
|
else
|
||||||
Fbr1Align = rx_ring->Fbr1BufferSize;
|
Fbr1Align = rx_ring->Fbr1BufferSize;
|
||||||
}
|
|
||||||
|
|
||||||
bufsize =
|
bufsize =
|
||||||
(rx_ring->Fbr1BufferSize * FBR_CHUNKS) +
|
(rx_ring->Fbr1BufferSize * FBR_CHUNKS) +
|
||||||
|
|
@ -491,8 +489,8 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Now the FIFO itself */
|
/* Now the FIFO itself */
|
||||||
rx_ring->pFbr1RingVa = (void *)((uint8_t *) rx_ring->pFbr1RingVa -
|
rx_ring->pFbr1RingVa = (void *)((uint8_t *)
|
||||||
rx_ring->Fbr1offset);
|
rx_ring->pFbr1RingVa - rx_ring->Fbr1offset);
|
||||||
|
|
||||||
bufsize =
|
bufsize =
|
||||||
(sizeof(FBR_DESC_t) * rx_ring->Fbr1NumEntries) + 0xfff;
|
(sizeof(FBR_DESC_t) * rx_ring->Fbr1NumEntries) + 0xfff;
|
||||||
|
|
@ -525,8 +523,8 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Now the FIFO itself */
|
/* Now the FIFO itself */
|
||||||
rx_ring->pFbr0RingVa = (void *)((uint8_t *) rx_ring->pFbr0RingVa -
|
rx_ring->pFbr0RingVa = (void *)((uint8_t *)
|
||||||
rx_ring->Fbr0offset);
|
rx_ring->pFbr0RingVa - rx_ring->Fbr0offset);
|
||||||
|
|
||||||
bufsize =
|
bufsize =
|
||||||
(sizeof(FBR_DESC_t) * rx_ring->Fbr0NumEntries) + 0xfff;
|
(sizeof(FBR_DESC_t) * rx_ring->Fbr0NumEntries) + 0xfff;
|
||||||
|
|
@ -556,8 +554,8 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
|
||||||
|
|
||||||
/* Free area of memory for the writeback of status information */
|
/* Free area of memory for the writeback of status information */
|
||||||
if (rx_ring->pRxStatusVa) {
|
if (rx_ring->pRxStatusVa) {
|
||||||
rx_ring->pRxStatusVa = (void *)((uint8_t *) rx_ring->pRxStatusVa -
|
rx_ring->pRxStatusVa = (void *)((uint8_t *)
|
||||||
rx_ring->RxStatusOffset);
|
rx_ring->pRxStatusVa - rx_ring->RxStatusOffset);
|
||||||
|
|
||||||
pci_free_consistent(adapter->pdev,
|
pci_free_consistent(adapter->pdev,
|
||||||
sizeof(RX_STATUS_BLOCK_t) + 0x7,
|
sizeof(RX_STATUS_BLOCK_t) + 0x7,
|
||||||
|
|
@ -606,7 +604,7 @@ int et131x_init_recv(struct et131x_adapter *adapter)
|
||||||
DBG_ENTER(et131x_dbginfo);
|
DBG_ENTER(et131x_dbginfo);
|
||||||
|
|
||||||
/* Setup some convenience pointers */
|
/* Setup some convenience pointers */
|
||||||
rx_ring = (RX_RING_t *) & adapter->RxRing;
|
rx_ring = (RX_RING_t *) &adapter->RxRing;
|
||||||
|
|
||||||
/* Setup each RFD */
|
/* Setup each RFD */
|
||||||
for (RfdCount = 0; RfdCount < rx_ring->NumRfd; RfdCount++) {
|
for (RfdCount = 0; RfdCount < rx_ring->NumRfd; RfdCount++) {
|
||||||
|
|
@ -636,9 +634,8 @@ int et131x_init_recv(struct et131x_adapter *adapter)
|
||||||
TotalNumRfd++;
|
TotalNumRfd++;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (TotalNumRfd > NIC_MIN_NUM_RFD) {
|
if (TotalNumRfd > NIC_MIN_NUM_RFD)
|
||||||
status = 0;
|
status = 0;
|
||||||
}
|
|
||||||
|
|
||||||
rx_ring->NumRfd = TotalNumRfd;
|
rx_ring->NumRfd = TotalNumRfd;
|
||||||
|
|
||||||
|
|
@ -841,12 +838,11 @@ void et131x_rx_dma_disable(struct et131x_adapter *pAdapter)
|
||||||
if (csr.bits.halt_status != 1) {
|
if (csr.bits.halt_status != 1) {
|
||||||
udelay(5);
|
udelay(5);
|
||||||
csr.value = readl(&pAdapter->CSRAddress->rxdma.csr.value);
|
csr.value = readl(&pAdapter->CSRAddress->rxdma.csr.value);
|
||||||
if (csr.bits.halt_status != 1) {
|
if (csr.bits.halt_status != 1)
|
||||||
DBG_ERROR(et131x_dbginfo,
|
DBG_ERROR(et131x_dbginfo,
|
||||||
"RX Dma failed to enter halt state. CSR 0x%08x\n",
|
"RX Dma failed to enter halt state. CSR 0x%08x\n",
|
||||||
csr.value);
|
csr.value);
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
DBG_LEAVE(et131x_dbginfo);
|
DBG_LEAVE(et131x_dbginfo);
|
||||||
}
|
}
|
||||||
|
|
@ -859,30 +855,28 @@ void et131x_rx_dma_enable(struct et131x_adapter *pAdapter)
|
||||||
{
|
{
|
||||||
DBG_RX_ENTER(et131x_dbginfo);
|
DBG_RX_ENTER(et131x_dbginfo);
|
||||||
|
|
||||||
if (pAdapter->RegistryPhyLoopbk) {
|
if (pAdapter->RegistryPhyLoopbk)
|
||||||
/* RxDMA is disabled for loopback operation. */
|
/* RxDMA is disabled for loopback operation. */
|
||||||
writel(0x1, &pAdapter->CSRAddress->rxdma.csr.value);
|
writel(0x1, &pAdapter->CSRAddress->rxdma.csr.value);
|
||||||
} else {
|
else {
|
||||||
/* Setup the receive dma configuration register for normal operation */
|
/* Setup the receive dma configuration register for normal operation */
|
||||||
RXDMA_CSR_t csr = { 0 };
|
RXDMA_CSR_t csr = { 0 };
|
||||||
|
|
||||||
csr.bits.fbr1_enable = 1;
|
csr.bits.fbr1_enable = 1;
|
||||||
if (pAdapter->RxRing.Fbr1BufferSize == 4096) {
|
if (pAdapter->RxRing.Fbr1BufferSize == 4096)
|
||||||
csr.bits.fbr1_size = 1;
|
csr.bits.fbr1_size = 1;
|
||||||
} else if (pAdapter->RxRing.Fbr1BufferSize == 8192) {
|
else if (pAdapter->RxRing.Fbr1BufferSize == 8192)
|
||||||
csr.bits.fbr1_size = 2;
|
csr.bits.fbr1_size = 2;
|
||||||
} else if (pAdapter->RxRing.Fbr1BufferSize == 16384) {
|
else if (pAdapter->RxRing.Fbr1BufferSize == 16384)
|
||||||
csr.bits.fbr1_size = 3;
|
csr.bits.fbr1_size = 3;
|
||||||
}
|
|
||||||
#ifdef USE_FBR0
|
#ifdef USE_FBR0
|
||||||
csr.bits.fbr0_enable = 1;
|
csr.bits.fbr0_enable = 1;
|
||||||
if (pAdapter->RxRing.Fbr0BufferSize == 256) {
|
if (pAdapter->RxRing.Fbr0BufferSize == 256)
|
||||||
csr.bits.fbr0_size = 1;
|
csr.bits.fbr0_size = 1;
|
||||||
} else if (pAdapter->RxRing.Fbr0BufferSize == 512) {
|
else if (pAdapter->RxRing.Fbr0BufferSize == 512)
|
||||||
csr.bits.fbr0_size = 2;
|
csr.bits.fbr0_size = 2;
|
||||||
} else if (pAdapter->RxRing.Fbr0BufferSize == 1024) {
|
else if (pAdapter->RxRing.Fbr0BufferSize == 1024)
|
||||||
csr.bits.fbr0_size = 3;
|
csr.bits.fbr0_size = 3;
|
||||||
}
|
|
||||||
#endif
|
#endif
|
||||||
writel(csr.value, &pAdapter->CSRAddress->rxdma.csr.value);
|
writel(csr.value, &pAdapter->CSRAddress->rxdma.csr.value);
|
||||||
|
|
||||||
|
|
@ -1124,17 +1118,15 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *pAdapter)
|
||||||
* so we free our RFD when we return
|
* so we free our RFD when we return
|
||||||
* from this function.
|
* from this function.
|
||||||
*/
|
*/
|
||||||
if (nIndex == pAdapter->MCAddressCount) {
|
if (nIndex == pAdapter->MCAddressCount)
|
||||||
localLen = 0;
|
localLen = 0;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
if (localLen > 0) {
|
if (localLen > 0)
|
||||||
pAdapter->Stats.multircv++;
|
pAdapter->Stats.multircv++;
|
||||||
}
|
} else if (Word0.value & ALCATEL_BROADCAST_PKT)
|
||||||
} else if (Word0.value & ALCATEL_BROADCAST_PKT) {
|
|
||||||
pAdapter->Stats.brdcstrcv++;
|
pAdapter->Stats.brdcstrcv++;
|
||||||
} else {
|
else
|
||||||
/* Not sure what this counter measures in
|
/* Not sure what this counter measures in
|
||||||
* promiscuous mode. Perhaps we should check
|
* promiscuous mode. Perhaps we should check
|
||||||
* the MAC address to see if it is directed
|
* the MAC address to see if it is directed
|
||||||
|
|
@ -1142,12 +1134,11 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *pAdapter)
|
||||||
*/
|
*/
|
||||||
pAdapter->Stats.unircv++;
|
pAdapter->Stats.unircv++;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
if (localLen > 0) {
|
if (localLen > 0) {
|
||||||
struct sk_buff *skb = NULL;
|
struct sk_buff *skb = NULL;
|
||||||
|
|
||||||
//pMpRfd->PacketSize = localLen - 4;
|
/* pMpRfd->PacketSize = localLen - 4; */
|
||||||
pMpRfd->PacketSize = localLen;
|
pMpRfd->PacketSize = localLen;
|
||||||
|
|
||||||
skb = dev_alloc_skb(pMpRfd->PacketSize + 2);
|
skb = dev_alloc_skb(pMpRfd->PacketSize + 2);
|
||||||
|
|
@ -1240,9 +1231,8 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *pAdapter)
|
||||||
|
|
||||||
pMpRfd = nic_rx_pkts(pAdapter);
|
pMpRfd = nic_rx_pkts(pAdapter);
|
||||||
|
|
||||||
if (pMpRfd == NULL) {
|
if (pMpRfd == NULL)
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
|
|
||||||
/* Do not receive any packets until a filter has been set.
|
/* Do not receive any packets until a filter has been set.
|
||||||
* Do not receive any packets until we are at D0.
|
* Do not receive any packets until we are at D0.
|
||||||
|
|
@ -1270,12 +1260,13 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *pAdapter)
|
||||||
* Besides, we don't really need (at this point) the
|
* Besides, we don't really need (at this point) the
|
||||||
* pending list anyway.
|
* pending list anyway.
|
||||||
*/
|
*/
|
||||||
//spin_lock_irqsave( &pAdapter->RcvPendLock, lockflags );
|
/* spin_lock_irqsave( &pAdapter->RcvPendLock, lockflags );
|
||||||
//list_add_tail( &pMpRfd->list_node, &pAdapter->RxRing.RecvPendingList );
|
* list_add_tail( &pMpRfd->list_node, &pAdapter->RxRing.RecvPendingList );
|
||||||
//spin_unlock_irqrestore( &pAdapter->RcvPendLock, lockflags );
|
* spin_unlock_irqrestore( &pAdapter->RcvPendLock, lockflags );
|
||||||
|
*/
|
||||||
|
|
||||||
/* Update the number of outstanding Recvs */
|
/* Update the number of outstanding Recvs */
|
||||||
//MP_INC_RCV_REF( pAdapter );
|
/* MP_INC_RCV_REF( pAdapter ); */
|
||||||
} else {
|
} else {
|
||||||
RFDFreeArray[PacketFreeCount] = pMpRfd;
|
RFDFreeArray[PacketFreeCount] = pMpRfd;
|
||||||
PacketFreeCount++;
|
PacketFreeCount++;
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -64,10 +64,10 @@
|
||||||
#define USE_FBR0 true
|
#define USE_FBR0 true
|
||||||
|
|
||||||
#ifdef USE_FBR0
|
#ifdef USE_FBR0
|
||||||
//#define FBR0_BUFFER_SIZE 256
|
/* #define FBR0_BUFFER_SIZE 256 */
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
//#define FBR1_BUFFER_SIZE 2048
|
/* #define FBR1_BUFFER_SIZE 2048 */
|
||||||
|
|
||||||
#define FBR_CHUNKS 32
|
#define FBR_CHUNKS 32
|
||||||
|
|
||||||
|
|
@ -95,11 +95,11 @@ typedef union _FBR_WORD2_t {
|
||||||
u32 value;
|
u32 value;
|
||||||
struct {
|
struct {
|
||||||
#ifdef _BIT_FIELDS_HTOL
|
#ifdef _BIT_FIELDS_HTOL
|
||||||
u32 reserved:22; // bits 10-31
|
u32 reserved:22; /* bits 10-31 */
|
||||||
u32 bi:10; // bits 0-9(Buffer Index)
|
u32 bi:10; /* bits 0-9(Buffer Index) */
|
||||||
#else
|
#else
|
||||||
u32 bi:10; // bits 0-9(Buffer Index)
|
u32 bi:10; /* bits 0-9(Buffer Index) */
|
||||||
u32 reserved:22; // bit 10-31
|
u32 reserved:22; /* bit 10-31 */
|
||||||
#endif
|
#endif
|
||||||
} bits;
|
} bits;
|
||||||
} FBR_WORD2_t, *PFBR_WORD2_t;
|
} FBR_WORD2_t, *PFBR_WORD2_t;
|
||||||
|
|
@ -115,70 +115,70 @@ typedef union _PKT_STAT_DESC_WORD0_t {
|
||||||
u32 value;
|
u32 value;
|
||||||
struct {
|
struct {
|
||||||
#ifdef _BIT_FIELDS_HTOL
|
#ifdef _BIT_FIELDS_HTOL
|
||||||
// top 16 bits are from the Alcatel Status Word as enumerated in
|
/* top 16 bits are from the Alcatel Status Word as enumerated in */
|
||||||
// PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2)
|
/* PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2) */
|
||||||
#if 0
|
#if 0
|
||||||
u32 asw_trunc:1; // bit 31(Rx frame truncated)
|
u32 asw_trunc:1; /* bit 31(Rx frame truncated) */
|
||||||
#endif
|
#endif
|
||||||
u32 asw_long_evt:1; // bit 31(Rx long event)
|
u32 asw_long_evt:1; /* bit 31(Rx long event) */
|
||||||
u32 asw_VLAN_tag:1; // bit 30(VLAN tag detected)
|
u32 asw_VLAN_tag:1; /* bit 30(VLAN tag detected) */
|
||||||
u32 asw_unsupported_op:1; // bit 29(unsupported OP code)
|
u32 asw_unsupported_op:1; /* bit 29(unsupported OP code) */
|
||||||
u32 asw_pause_frame:1; // bit 28(is a pause frame)
|
u32 asw_pause_frame:1; /* bit 28(is a pause frame) */
|
||||||
u32 asw_control_frame:1; // bit 27(is a control frame)
|
u32 asw_control_frame:1; /* bit 27(is a control frame) */
|
||||||
u32 asw_dribble_nibble:1; // bit 26(spurious bits after EOP)
|
u32 asw_dribble_nibble:1; /* bit 26(spurious bits after EOP) */
|
||||||
u32 asw_broadcast:1; // bit 25(has a broadcast address)
|
u32 asw_broadcast:1; /* bit 25(has a broadcast address) */
|
||||||
u32 asw_multicast:1; // bit 24(has a multicast address)
|
u32 asw_multicast:1; /* bit 24(has a multicast address) */
|
||||||
u32 asw_OK:1; // bit 23(valid CRC + no code error)
|
u32 asw_OK:1; /* bit 23(valid CRC + no code error) */
|
||||||
u32 asw_too_long:1; // bit 22(frame length > 1518 bytes)
|
u32 asw_too_long:1; /* bit 22(frame length > 1518 bytes) */
|
||||||
u32 asw_len_chk_err:1; // bit 21(frame length field incorrect)
|
u32 asw_len_chk_err:1; /* bit 21(frame length field incorrect) */
|
||||||
u32 asw_CRC_err:1; // bit 20(CRC error)
|
u32 asw_CRC_err:1; /* bit 20(CRC error) */
|
||||||
u32 asw_code_err:1; // bit 19(one or more nibbles signalled as errors)
|
u32 asw_code_err:1; /* bit 19(one or more nibbles signalled as errors) */
|
||||||
u32 asw_false_carrier_event:1; // bit 18(bad carrier since last good packet)
|
u32 asw_false_carrier_event:1; /* bit 18(bad carrier since last good packet) */
|
||||||
u32 asw_RX_DV_event:1; // bit 17(short receive event detected)
|
u32 asw_RX_DV_event:1; /* bit 17(short receive event detected) */
|
||||||
u32 asw_prev_pkt_dropped:1;// bit 16(e.g. IFG too small on previous)
|
u32 asw_prev_pkt_dropped:1;/* bit 16(e.g. IFG too small on previous) */
|
||||||
u32 unused:5; // bits 11-15
|
u32 unused:5; /* bits 11-15 */
|
||||||
u32 vp:1; // bit 10(VLAN Packet)
|
u32 vp:1; /* bit 10(VLAN Packet) */
|
||||||
u32 jp:1; // bit 9(Jumbo Packet)
|
u32 jp:1; /* bit 9(Jumbo Packet) */
|
||||||
u32 ft:1; // bit 8(Frame Truncated)
|
u32 ft:1; /* bit 8(Frame Truncated) */
|
||||||
u32 drop:1; // bit 7(Drop packet)
|
u32 drop:1; /* bit 7(Drop packet) */
|
||||||
u32 rxmac_error:1; // bit 6(RXMAC Error Indicator)
|
u32 rxmac_error:1; /* bit 6(RXMAC Error Indicator) */
|
||||||
u32 wol:1; // bit 5(WOL Event)
|
u32 wol:1; /* bit 5(WOL Event) */
|
||||||
u32 tcpp:1; // bit 4(TCP checksum pass)
|
u32 tcpp:1; /* bit 4(TCP checksum pass) */
|
||||||
u32 tcpa:1; // bit 3(TCP checksum assist)
|
u32 tcpa:1; /* bit 3(TCP checksum assist) */
|
||||||
u32 ipp:1; // bit 2(IP checksum pass)
|
u32 ipp:1; /* bit 2(IP checksum pass) */
|
||||||
u32 ipa:1; // bit 1(IP checksum assist)
|
u32 ipa:1; /* bit 1(IP checksum assist) */
|
||||||
u32 hp:1; // bit 0(hash pass)
|
u32 hp:1; /* bit 0(hash pass) */
|
||||||
#else
|
#else
|
||||||
u32 hp:1; // bit 0(hash pass)
|
u32 hp:1; /* bit 0(hash pass) */
|
||||||
u32 ipa:1; // bit 1(IP checksum assist)
|
u32 ipa:1; /* bit 1(IP checksum assist) */
|
||||||
u32 ipp:1; // bit 2(IP checksum pass)
|
u32 ipp:1; /* bit 2(IP checksum pass) */
|
||||||
u32 tcpa:1; // bit 3(TCP checksum assist)
|
u32 tcpa:1; /* bit 3(TCP checksum assist) */
|
||||||
u32 tcpp:1; // bit 4(TCP checksum pass)
|
u32 tcpp:1; /* bit 4(TCP checksum pass) */
|
||||||
u32 wol:1; // bit 5(WOL Event)
|
u32 wol:1; /* bit 5(WOL Event) */
|
||||||
u32 rxmac_error:1; // bit 6(RXMAC Error Indicator)
|
u32 rxmac_error:1; /* bit 6(RXMAC Error Indicator) */
|
||||||
u32 drop:1; // bit 7(Drop packet)
|
u32 drop:1; /* bit 7(Drop packet) */
|
||||||
u32 ft:1; // bit 8(Frame Truncated)
|
u32 ft:1; /* bit 8(Frame Truncated) */
|
||||||
u32 jp:1; // bit 9(Jumbo Packet)
|
u32 jp:1; /* bit 9(Jumbo Packet) */
|
||||||
u32 vp:1; // bit 10(VLAN Packet)
|
u32 vp:1; /* bit 10(VLAN Packet) */
|
||||||
u32 unused:5; // bits 11-15
|
u32 unused:5; /* bits 11-15 */
|
||||||
u32 asw_prev_pkt_dropped:1;// bit 16(e.g. IFG too small on previous)
|
u32 asw_prev_pkt_dropped:1;/* bit 16(e.g. IFG too small on previous) */
|
||||||
u32 asw_RX_DV_event:1; // bit 17(short receive event detected)
|
u32 asw_RX_DV_event:1; /* bit 17(short receive event detected) */
|
||||||
u32 asw_false_carrier_event:1; // bit 18(bad carrier since last good packet)
|
u32 asw_false_carrier_event:1; /* bit 18(bad carrier since last good packet) */
|
||||||
u32 asw_code_err:1; // bit 19(one or more nibbles signalled as errors)
|
u32 asw_code_err:1; /* bit 19(one or more nibbles signalled as errors) */
|
||||||
u32 asw_CRC_err:1; // bit 20(CRC error)
|
u32 asw_CRC_err:1; /* bit 20(CRC error) */
|
||||||
u32 asw_len_chk_err:1; // bit 21(frame length field incorrect)
|
u32 asw_len_chk_err:1; /* bit 21(frame length field incorrect) */
|
||||||
u32 asw_too_long:1; // bit 22(frame length > 1518 bytes)
|
u32 asw_too_long:1; /* bit 22(frame length > 1518 bytes) */
|
||||||
u32 asw_OK:1; // bit 23(valid CRC + no code error)
|
u32 asw_OK:1; /* bit 23(valid CRC + no code error) */
|
||||||
u32 asw_multicast:1; // bit 24(has a multicast address)
|
u32 asw_multicast:1; /* bit 24(has a multicast address) */
|
||||||
u32 asw_broadcast:1; // bit 25(has a broadcast address)
|
u32 asw_broadcast:1; /* bit 25(has a broadcast address) */
|
||||||
u32 asw_dribble_nibble:1; // bit 26(spurious bits after EOP)
|
u32 asw_dribble_nibble:1; /* bit 26(spurious bits after EOP) */
|
||||||
u32 asw_control_frame:1; // bit 27(is a control frame)
|
u32 asw_control_frame:1; /* bit 27(is a control frame) */
|
||||||
u32 asw_pause_frame:1; // bit 28(is a pause frame)
|
u32 asw_pause_frame:1; /* bit 28(is a pause frame) */
|
||||||
u32 asw_unsupported_op:1; // bit 29(unsupported OP code)
|
u32 asw_unsupported_op:1; /* bit 29(unsupported OP code) */
|
||||||
u32 asw_VLAN_tag:1; // bit 30(VLAN tag detected)
|
u32 asw_VLAN_tag:1; /* bit 30(VLAN tag detected) */
|
||||||
u32 asw_long_evt:1; // bit 31(Rx long event)
|
u32 asw_long_evt:1; /* bit 31(Rx long event) */
|
||||||
#if 0
|
#if 0
|
||||||
u32 asw_trunc:1; // bit 31(Rx frame truncated)
|
u32 asw_trunc:1; /* bit 31(Rx frame truncated) */
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
} bits;
|
} bits;
|
||||||
|
|
@ -188,15 +188,15 @@ typedef union _PKT_STAT_DESC_WORD1_t {
|
||||||
u32 value;
|
u32 value;
|
||||||
struct {
|
struct {
|
||||||
#ifdef _BIT_FIELDS_HTOL
|
#ifdef _BIT_FIELDS_HTOL
|
||||||
u32 unused:4; // bits 28-31
|
u32 unused:4; /* bits 28-31 */
|
||||||
u32 ri:2; // bits 26-27(Ring Index)
|
u32 ri:2; /* bits 26-27(Ring Index) */
|
||||||
u32 bi:10; // bits 16-25(Buffer Index)
|
u32 bi:10; /* bits 16-25(Buffer Index) */
|
||||||
u32 length:16; // bit 0-15(length in bytes)
|
u32 length:16; /* bit 0-15(length in bytes) */
|
||||||
#else
|
#else
|
||||||
u32 length:16; // bit 0-15(length in bytes)
|
u32 length:16; /* bit 0-15(length in bytes) */
|
||||||
u32 bi:10; // bits 16-25(Buffer Index)
|
u32 bi:10; /* bits 16-25(Buffer Index) */
|
||||||
u32 ri:2; // bits 26-27(Ring Index)
|
u32 ri:2; /* bits 26-27(Ring Index) */
|
||||||
u32 unused:4; // bits 28-31
|
u32 unused:4; /* bits 28-31 */
|
||||||
#endif
|
#endif
|
||||||
} bits;
|
} bits;
|
||||||
} PKT_STAT_DESC_WORD1_t, *PPKT_STAT_WORD1_t;
|
} PKT_STAT_DESC_WORD1_t, *PPKT_STAT_WORD1_t;
|
||||||
|
|
@ -217,19 +217,19 @@ typedef union _rxstat_word0_t {
|
||||||
u32 value;
|
u32 value;
|
||||||
struct {
|
struct {
|
||||||
#ifdef _BIT_FIELDS_HTOL
|
#ifdef _BIT_FIELDS_HTOL
|
||||||
u32 FBR1unused:5; // bits 27-31
|
u32 FBR1unused:5; /* bits 27-31 */
|
||||||
u32 FBR1wrap:1; // bit 26
|
u32 FBR1wrap:1; /* bit 26 */
|
||||||
u32 FBR1offset:10; // bits 16-25
|
u32 FBR1offset:10; /* bits 16-25 */
|
||||||
u32 FBR0unused:5; // bits 11-15
|
u32 FBR0unused:5; /* bits 11-15 */
|
||||||
u32 FBR0wrap:1; // bit 10
|
u32 FBR0wrap:1; /* bit 10 */
|
||||||
u32 FBR0offset:10; // bits 0-9
|
u32 FBR0offset:10; /* bits 0-9 */
|
||||||
#else
|
#else
|
||||||
u32 FBR0offset:10; // bits 0-9
|
u32 FBR0offset:10; /* bits 0-9 */
|
||||||
u32 FBR0wrap:1; // bit 10
|
u32 FBR0wrap:1; /* bit 10 */
|
||||||
u32 FBR0unused:5; // bits 11-15
|
u32 FBR0unused:5; /* bits 11-15 */
|
||||||
u32 FBR1offset:10; // bits 16-25
|
u32 FBR1offset:10; /* bits 16-25 */
|
||||||
u32 FBR1wrap:1; // bit 26
|
u32 FBR1wrap:1; /* bit 26 */
|
||||||
u32 FBR1unused:5; // bits 27-31
|
u32 FBR1unused:5; /* bits 27-31 */
|
||||||
#endif
|
#endif
|
||||||
} bits;
|
} bits;
|
||||||
} RXSTAT_WORD0_t, *PRXSTAT_WORD0_t;
|
} RXSTAT_WORD0_t, *PRXSTAT_WORD0_t;
|
||||||
|
|
@ -243,15 +243,15 @@ typedef union _rxstat_word1_t {
|
||||||
u32 value;
|
u32 value;
|
||||||
struct {
|
struct {
|
||||||
#ifdef _BIT_FIELDS_HTOL
|
#ifdef _BIT_FIELDS_HTOL
|
||||||
u32 PSRunused:3; // bits 29-31
|
u32 PSRunused:3; /* bits 29-31 */
|
||||||
u32 PSRwrap:1; // bit 28
|
u32 PSRwrap:1; /* bit 28 */
|
||||||
u32 PSRoffset:12; // bits 16-27
|
u32 PSRoffset:12; /* bits 16-27 */
|
||||||
u32 reserved:16; // bits 0-15
|
u32 reserved:16; /* bits 0-15 */
|
||||||
#else
|
#else
|
||||||
u32 reserved:16; // bits 0-15
|
u32 reserved:16; /* bits 0-15 */
|
||||||
u32 PSRoffset:12; // bits 16-27
|
u32 PSRoffset:12; /* bits 16-27 */
|
||||||
u32 PSRwrap:1; // bit 28
|
u32 PSRwrap:1; /* bit 28 */
|
||||||
u32 PSRunused:3; // bits 29-31
|
u32 PSRunused:3; /* bits 29-31 */
|
||||||
#endif
|
#endif
|
||||||
} bits;
|
} bits;
|
||||||
} RXSTAT_WORD1_t, *PRXSTAT_WORD1_t;
|
} RXSTAT_WORD1_t, *PRXSTAT_WORD1_t;
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -19,7 +19,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -40,7 +40,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -74,9 +74,9 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/in.h>
|
#include <linux/in.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <asm/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
#include <linux/etherdevice.h>
|
#include <linux/etherdevice.h>
|
||||||
|
|
@ -127,7 +127,7 @@ int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter)
|
||||||
DBG_ENTER(et131x_dbginfo);
|
DBG_ENTER(et131x_dbginfo);
|
||||||
|
|
||||||
/* Allocate memory for the TCB's (Transmit Control Block) */
|
/* Allocate memory for the TCB's (Transmit Control Block) */
|
||||||
adapter->TxRing.MpTcbMem = (MP_TCB *) kcalloc(NUM_TCB, sizeof(MP_TCB),
|
adapter->TxRing.MpTcbMem = (MP_TCB *)kcalloc(NUM_TCB, sizeof(MP_TCB),
|
||||||
GFP_ATOMIC | GFP_DMA);
|
GFP_ATOMIC | GFP_DMA);
|
||||||
if (!adapter->TxRing.MpTcbMem) {
|
if (!adapter->TxRing.MpTcbMem) {
|
||||||
DBG_ERROR(et131x_dbginfo, "Cannot alloc memory for TCBs\n");
|
DBG_ERROR(et131x_dbginfo, "Cannot alloc memory for TCBs\n");
|
||||||
|
|
@ -238,10 +238,7 @@ void et131x_tx_dma_memory_free(struct et131x_adapter *adapter)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Free the memory for MP_TCB structures */
|
/* Free the memory for MP_TCB structures */
|
||||||
if (adapter->TxRing.MpTcbMem) {
|
|
||||||
kfree(adapter->TxRing.MpTcbMem);
|
kfree(adapter->TxRing.MpTcbMem);
|
||||||
adapter->TxRing.MpTcbMem = NULL;
|
|
||||||
}
|
|
||||||
|
|
||||||
DBG_LEAVE(et131x_dbginfo);
|
DBG_LEAVE(et131x_dbginfo);
|
||||||
}
|
}
|
||||||
|
|
@ -405,7 +402,10 @@ int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev)
|
||||||
/* We need to see if the link is up; if it's not, make the
|
/* We need to see if the link is up; if it's not, make the
|
||||||
* netif layer think we're good and drop the packet
|
* netif layer think we're good and drop the packet
|
||||||
*/
|
*/
|
||||||
//if( MP_SHOULD_FAIL_SEND( pAdapter ) || pAdapter->DriverNoPhyAccess )
|
/*
|
||||||
|
* if( MP_SHOULD_FAIL_SEND( pAdapter ) ||
|
||||||
|
* pAdapter->DriverNoPhyAccess )
|
||||||
|
*/
|
||||||
if (MP_SHOULD_FAIL_SEND(pAdapter) || pAdapter->DriverNoPhyAccess
|
if (MP_SHOULD_FAIL_SEND(pAdapter) || pAdapter->DriverNoPhyAccess
|
||||||
|| !netif_carrier_ok(netdev)) {
|
|| !netif_carrier_ok(netdev)) {
|
||||||
DBG_VERBOSE(et131x_dbginfo,
|
DBG_VERBOSE(et131x_dbginfo,
|
||||||
|
|
@ -496,9 +496,8 @@ static int et131x_send_packet(struct sk_buff *skb,
|
||||||
|
|
||||||
pAdapter->TxRing.TCBReadyQueueHead = pMpTcb->Next;
|
pAdapter->TxRing.TCBReadyQueueHead = pMpTcb->Next;
|
||||||
|
|
||||||
if (pAdapter->TxRing.TCBReadyQueueHead == NULL) {
|
if (pAdapter->TxRing.TCBReadyQueueHead == NULL)
|
||||||
pAdapter->TxRing.TCBReadyQueueTail = NULL;
|
pAdapter->TxRing.TCBReadyQueueTail = NULL;
|
||||||
}
|
|
||||||
|
|
||||||
spin_unlock_irqrestore(&pAdapter->TCBReadyQLock, lockflags);
|
spin_unlock_irqrestore(&pAdapter->TCBReadyQLock, lockflags);
|
||||||
|
|
||||||
|
|
@ -519,9 +518,8 @@ static int et131x_send_packet(struct sk_buff *skb,
|
||||||
pMpTcb->Next = NULL;
|
pMpTcb->Next = NULL;
|
||||||
|
|
||||||
/* Call the NIC specific send handler. */
|
/* Call the NIC specific send handler. */
|
||||||
if (status == 0) {
|
if (status == 0)
|
||||||
status = nic_send_packet(pAdapter, pMpTcb);
|
status = nic_send_packet(pAdapter, pMpTcb);
|
||||||
}
|
|
||||||
|
|
||||||
if (status != 0) {
|
if (status != 0) {
|
||||||
spin_lock_irqsave(&pAdapter->TCBReadyQLock, lockflags);
|
spin_lock_irqsave(&pAdapter->TCBReadyQLock, lockflags);
|
||||||
|
|
@ -749,12 +747,11 @@ static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb)
|
||||||
if ((pAdapter->TxRing.txDmaReadyToSend.bits.val == 0) ||
|
if ((pAdapter->TxRing.txDmaReadyToSend.bits.val == 0) ||
|
||||||
(pAdapter->TxRing.txDmaReadyToSend.bits.val ==
|
(pAdapter->TxRing.txDmaReadyToSend.bits.val ==
|
||||||
NUM_DESC_PER_RING_TX)) {
|
NUM_DESC_PER_RING_TX)) {
|
||||||
if (pAdapter->TxRing.txDmaReadyToSend.bits.wrap) {
|
if (pAdapter->TxRing.txDmaReadyToSend.bits.wrap)
|
||||||
pAdapter->TxRing.txDmaReadyToSend.value = 0;
|
pAdapter->TxRing.txDmaReadyToSend.value = 0;
|
||||||
} else {
|
else
|
||||||
pAdapter->TxRing.txDmaReadyToSend.value = 0x400;
|
pAdapter->TxRing.txDmaReadyToSend.value = 0x400;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
if (iRemainder) {
|
if (iRemainder) {
|
||||||
memcpy(pAdapter->TxRing.pTxDescRingVa,
|
memcpy(pAdapter->TxRing.pTxDescRingVa,
|
||||||
|
|
@ -765,24 +762,21 @@ static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb)
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pAdapter->TxRing.txDmaReadyToSend.bits.val == 0) {
|
if (pAdapter->TxRing.txDmaReadyToSend.bits.val == 0) {
|
||||||
if (pAdapter->TxRing.txDmaReadyToSend.value) {
|
if (pAdapter->TxRing.txDmaReadyToSend.value)
|
||||||
pMpTcb->WrIndex.value = NUM_DESC_PER_RING_TX - 1;
|
pMpTcb->WrIndex.value = NUM_DESC_PER_RING_TX - 1;
|
||||||
} else {
|
else
|
||||||
pMpTcb->WrIndex.value =
|
pMpTcb->WrIndex.value =
|
||||||
0x400 | (NUM_DESC_PER_RING_TX - 1);
|
0x400 | (NUM_DESC_PER_RING_TX - 1);
|
||||||
}
|
} else
|
||||||
} else {
|
|
||||||
pMpTcb->WrIndex.value =
|
pMpTcb->WrIndex.value =
|
||||||
pAdapter->TxRing.txDmaReadyToSend.value - 1;
|
pAdapter->TxRing.txDmaReadyToSend.value - 1;
|
||||||
}
|
|
||||||
|
|
||||||
spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags2);
|
spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags2);
|
||||||
|
|
||||||
if (pAdapter->TxRing.CurrSendTail) {
|
if (pAdapter->TxRing.CurrSendTail)
|
||||||
pAdapter->TxRing.CurrSendTail->Next = pMpTcb;
|
pAdapter->TxRing.CurrSendTail->Next = pMpTcb;
|
||||||
} else {
|
else
|
||||||
pAdapter->TxRing.CurrSendHead = pMpTcb;
|
pAdapter->TxRing.CurrSendHead = pMpTcb;
|
||||||
}
|
|
||||||
|
|
||||||
pAdapter->TxRing.CurrSendTail = pMpTcb;
|
pAdapter->TxRing.CurrSendTail = pMpTcb;
|
||||||
|
|
||||||
|
|
@ -870,14 +864,14 @@ static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb)
|
||||||
DBG_TX(et131x_dbginfo,
|
DBG_TX(et131x_dbginfo,
|
||||||
"Even number of descs, split 1st elem\n");
|
"Even number of descs, split 1st elem\n");
|
||||||
iSplitFirstElement = 1;
|
iSplitFirstElement = 1;
|
||||||
//SegmentSize = pFragList[0].size / 2;
|
/* SegmentSize = pFragList[0].size / 2; */
|
||||||
SegmentSize = (pPacket->len - pPacket->data_len) / 2;
|
SegmentSize = (pPacket->len - pPacket->data_len) / 2;
|
||||||
}
|
}
|
||||||
} else if (FragListCount & 0x1) {
|
} else if (FragListCount & 0x1) {
|
||||||
DBG_TX(et131x_dbginfo, "Odd number of descs, split 1st elem\n");
|
DBG_TX(et131x_dbginfo, "Odd number of descs, split 1st elem\n");
|
||||||
|
|
||||||
iSplitFirstElement = 1;
|
iSplitFirstElement = 1;
|
||||||
//SegmentSize = pFragList[0].size / 2;
|
/* SegmentSize = pFragList[0].size / 2; */
|
||||||
SegmentSize = (pPacket->len - pPacket->data_len) / 2;
|
SegmentSize = (pPacket->len - pPacket->data_len) / 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -918,9 +912,8 @@ static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb)
|
||||||
FragListCount, iSplitFirstElement, loopEnd);
|
FragListCount, iSplitFirstElement, loopEnd);
|
||||||
|
|
||||||
for (loopIndex = 0; loopIndex < loopEnd; loopIndex++) {
|
for (loopIndex = 0; loopIndex < loopEnd; loopIndex++) {
|
||||||
if (loopIndex > iSplitFirstElement) {
|
if (loopIndex > iSplitFirstElement)
|
||||||
fragIndex++;
|
fragIndex++;
|
||||||
}
|
|
||||||
|
|
||||||
DBG_TX(et131x_dbginfo,
|
DBG_TX(et131x_dbginfo,
|
||||||
"In loop, loopIndex: %d\t fragIndex: %d\n", loopIndex,
|
"In loop, loopIndex: %d\t fragIndex: %d\n", loopIndex,
|
||||||
|
|
@ -935,13 +928,17 @@ static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb)
|
||||||
pPacket->len,
|
pPacket->len,
|
||||||
pAdapter->TxRing.txDmaReadyToSend.bits.serv_req);
|
pAdapter->TxRing.txDmaReadyToSend.bits.serv_req);
|
||||||
|
|
||||||
// NOTE - Should we do a paranoia check here to make sure the fragment
|
/*
|
||||||
// actually has a length? It's HIGHLY unlikely the fragment would
|
* NOTE - Should we do a paranoia check here to make sure the fragment
|
||||||
// contain no data...
|
* actually has a length? It's HIGHLY unlikely the fragment would
|
||||||
|
* contain no data...
|
||||||
|
*/
|
||||||
if (1) {
|
if (1) {
|
||||||
// NOTE - Currently always getting 32-bit addrs, and dma_addr_t is
|
/* NOTE - Currently always getting 32-bit addrs, and
|
||||||
// only 32-bit, so leave "high" ptr value out for now
|
* dma_addr_t is only 32-bit, so leave "high" ptr
|
||||||
CurDesc.DataBufferPtrHigh = 0;
|
* value out for now
|
||||||
|
* CurDesc.DataBufferPtrHigh = 0;
|
||||||
|
*/
|
||||||
|
|
||||||
CurDesc.word2.value = 0;
|
CurDesc.word2.value = 0;
|
||||||
CurDesc.word3.value = 0;
|
CurDesc.word3.value = 0;
|
||||||
|
|
@ -1128,7 +1125,7 @@ static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb)
|
||||||
|
|
||||||
if (pAdapter->uiDuplexMode == 0 &&
|
if (pAdapter->uiDuplexMode == 0 &&
|
||||||
pMpTcb->PacketLength < NIC_MIN_PACKET_SIZE) {
|
pMpTcb->PacketLength < NIC_MIN_PACKET_SIZE) {
|
||||||
// NOTE - Same 32/64-bit issue as above...
|
/* NOTE - Same 32/64-bit issue as above... */
|
||||||
CurDesc.DataBufferPtrHigh = 0x0;
|
CurDesc.DataBufferPtrHigh = 0x0;
|
||||||
CurDesc.DataBufferPtrLow = pAdapter->TxRing.pTxDummyBlkPa;
|
CurDesc.DataBufferPtrLow = pAdapter->TxRing.pTxDummyBlkPa;
|
||||||
CurDesc.word2.value = 0;
|
CurDesc.word2.value = 0;
|
||||||
|
|
@ -1183,18 +1180,17 @@ static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb)
|
||||||
}
|
}
|
||||||
|
|
||||||
DBG_TX(et131x_dbginfo, "Padding descriptor %d by %d bytes\n",
|
DBG_TX(et131x_dbginfo, "Padding descriptor %d by %d bytes\n",
|
||||||
//pAdapter->TxRing.txDmaReadyToSend.value,
|
/* pAdapter->TxRing.txDmaReadyToSend.value, */
|
||||||
pAdapter->TxRing.txDmaReadyToSend.bits.serv_req,
|
pAdapter->TxRing.txDmaReadyToSend.bits.serv_req,
|
||||||
NIC_MIN_PACKET_SIZE - pMpTcb->PacketLength);
|
NIC_MIN_PACKET_SIZE - pMpTcb->PacketLength);
|
||||||
}
|
}
|
||||||
|
|
||||||
spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags2);
|
spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags2);
|
||||||
|
|
||||||
if (pAdapter->TxRing.CurrSendTail) {
|
if (pAdapter->TxRing.CurrSendTail)
|
||||||
pAdapter->TxRing.CurrSendTail->Next = pMpTcb;
|
pAdapter->TxRing.CurrSendTail->Next = pMpTcb;
|
||||||
} else {
|
else
|
||||||
pAdapter->TxRing.CurrSendHead = pMpTcb;
|
pAdapter->TxRing.CurrSendHead = pMpTcb;
|
||||||
}
|
|
||||||
|
|
||||||
pAdapter->TxRing.CurrSendTail = pMpTcb;
|
pAdapter->TxRing.CurrSendTail = pMpTcb;
|
||||||
|
|
||||||
|
|
@ -1235,19 +1231,19 @@ static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb)
|
||||||
*
|
*
|
||||||
* Assumption - Send spinlock has been acquired
|
* Assumption - Send spinlock has been acquired
|
||||||
*/
|
*/
|
||||||
__inline void et131x_free_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb)
|
inline void et131x_free_send_packet(struct et131x_adapter *pAdapter,
|
||||||
|
PMP_TCB pMpTcb)
|
||||||
{
|
{
|
||||||
unsigned long lockflags;
|
unsigned long lockflags;
|
||||||
TX_DESC_ENTRY_t *desc = NULL;
|
TX_DESC_ENTRY_t *desc = NULL;
|
||||||
struct net_device_stats *stats = &pAdapter->net_stats;
|
struct net_device_stats *stats = &pAdapter->net_stats;
|
||||||
|
|
||||||
if (MP_TEST_FLAG(pMpTcb, fMP_DEST_BROAD)) {
|
if (MP_TEST_FLAG(pMpTcb, fMP_DEST_BROAD))
|
||||||
atomic_inc(&pAdapter->Stats.brdcstxmt);
|
atomic_inc(&pAdapter->Stats.brdcstxmt);
|
||||||
} else if (MP_TEST_FLAG(pMpTcb, fMP_DEST_MULTI)) {
|
else if (MP_TEST_FLAG(pMpTcb, fMP_DEST_MULTI))
|
||||||
atomic_inc(&pAdapter->Stats.multixmt);
|
atomic_inc(&pAdapter->Stats.multixmt);
|
||||||
} else {
|
else
|
||||||
atomic_inc(&pAdapter->Stats.unixmt);
|
atomic_inc(&pAdapter->Stats.unixmt);
|
||||||
}
|
|
||||||
|
|
||||||
if (pMpTcb->Packet) {
|
if (pMpTcb->Packet) {
|
||||||
stats->tx_bytes += pMpTcb->Packet->len;
|
stats->tx_bytes += pMpTcb->Packet->len;
|
||||||
|
|
@ -1298,14 +1294,12 @@ __inline void et131x_free_send_packet(struct et131x_adapter *pAdapter, PMP_TCB p
|
||||||
|
|
||||||
if (++pMpTcb->WrIndexStart.bits.val >=
|
if (++pMpTcb->WrIndexStart.bits.val >=
|
||||||
NUM_DESC_PER_RING_TX) {
|
NUM_DESC_PER_RING_TX) {
|
||||||
if (pMpTcb->WrIndexStart.bits.wrap) {
|
if (pMpTcb->WrIndexStart.bits.wrap)
|
||||||
pMpTcb->WrIndexStart.value = 0;
|
pMpTcb->WrIndexStart.value = 0;
|
||||||
} else {
|
else
|
||||||
pMpTcb->WrIndexStart.value = 0x400;
|
pMpTcb->WrIndexStart.value = 0x400;
|
||||||
}
|
}
|
||||||
}
|
} while (desc != (pAdapter->TxRing.pTxDescRingVa +
|
||||||
}
|
|
||||||
while (desc != (pAdapter->TxRing.pTxDescRingVa +
|
|
||||||
pMpTcb->WrIndex.bits.val));
|
pMpTcb->WrIndex.bits.val));
|
||||||
|
|
||||||
DBG_TX(et131x_dbginfo,
|
DBG_TX(et131x_dbginfo,
|
||||||
|
|
@ -1371,9 +1365,8 @@ void et131x_free_busy_send_packets(struct et131x_adapter *pAdapter)
|
||||||
|
|
||||||
pAdapter->TxRing.CurrSendHead = pNext;
|
pAdapter->TxRing.CurrSendHead = pNext;
|
||||||
|
|
||||||
if (pNext == NULL) {
|
if (pNext == NULL)
|
||||||
pAdapter->TxRing.CurrSendTail = NULL;
|
pAdapter->TxRing.CurrSendTail = NULL;
|
||||||
}
|
|
||||||
|
|
||||||
pAdapter->TxRing.nBusySend--;
|
pAdapter->TxRing.nBusySend--;
|
||||||
|
|
||||||
|
|
@ -1454,9 +1447,8 @@ static void et131x_update_tcb_list(struct et131x_adapter *pAdapter)
|
||||||
ServiceComplete.bits.val < pMpTcb->WrIndex.bits.val) {
|
ServiceComplete.bits.val < pMpTcb->WrIndex.bits.val) {
|
||||||
pAdapter->TxRing.nBusySend--;
|
pAdapter->TxRing.nBusySend--;
|
||||||
pAdapter->TxRing.CurrSendHead = pMpTcb->Next;
|
pAdapter->TxRing.CurrSendHead = pMpTcb->Next;
|
||||||
if (pMpTcb->Next == NULL) {
|
if (pMpTcb->Next == NULL)
|
||||||
pAdapter->TxRing.CurrSendTail = NULL;
|
pAdapter->TxRing.CurrSendTail = NULL;
|
||||||
}
|
|
||||||
|
|
||||||
spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags);
|
spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags);
|
||||||
MP_FREE_SEND_PACKET_FUN(pAdapter, pMpTcb);
|
MP_FREE_SEND_PACKET_FUN(pAdapter, pMpTcb);
|
||||||
|
|
@ -1470,9 +1462,8 @@ static void et131x_update_tcb_list(struct et131x_adapter *pAdapter)
|
||||||
ServiceComplete.bits.val > pMpTcb->WrIndex.bits.val) {
|
ServiceComplete.bits.val > pMpTcb->WrIndex.bits.val) {
|
||||||
pAdapter->TxRing.nBusySend--;
|
pAdapter->TxRing.nBusySend--;
|
||||||
pAdapter->TxRing.CurrSendHead = pMpTcb->Next;
|
pAdapter->TxRing.CurrSendHead = pMpTcb->Next;
|
||||||
if (pMpTcb->Next == NULL) {
|
if (pMpTcb->Next == NULL)
|
||||||
pAdapter->TxRing.CurrSendTail = NULL;
|
pAdapter->TxRing.CurrSendTail = NULL;
|
||||||
}
|
|
||||||
|
|
||||||
spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags);
|
spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags);
|
||||||
MP_FREE_SEND_PACKET_FUN(pAdapter, pMpTcb);
|
MP_FREE_SEND_PACKET_FUN(pAdapter, pMpTcb);
|
||||||
|
|
@ -1483,9 +1474,8 @@ static void et131x_update_tcb_list(struct et131x_adapter *pAdapter)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Wake up the queue when we hit a low-water mark */
|
/* Wake up the queue when we hit a low-water mark */
|
||||||
if (pAdapter->TxRing.nBusySend <= (NUM_TCB / 3)) {
|
if (pAdapter->TxRing.nBusySend <= (NUM_TCB / 3))
|
||||||
netif_wake_queue(pAdapter->netdev);
|
netif_wake_queue(pAdapter->netdev);
|
||||||
}
|
|
||||||
|
|
||||||
spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags);
|
spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -70,15 +70,15 @@ typedef union _txdesc_word2_t {
|
||||||
u32 value;
|
u32 value;
|
||||||
struct {
|
struct {
|
||||||
#ifdef _BIT_FIELDS_HTOL
|
#ifdef _BIT_FIELDS_HTOL
|
||||||
u32 vlan_prio:3; // bits 29-31(VLAN priority)
|
u32 vlan_prio:3; /* bits 29-31(VLAN priority) */
|
||||||
u32 vlan_cfi:1; // bit 28(cfi)
|
u32 vlan_cfi:1; /* bit 28(cfi) */
|
||||||
u32 vlan_tag:12; // bits 16-27(VLAN tag)
|
u32 vlan_tag:12; /* bits 16-27(VLAN tag) */
|
||||||
u32 length_in_bytes:16; // bits 0-15(packet length)
|
u32 length_in_bytes:16; /* bits 0-15(packet length) */
|
||||||
#else
|
#else
|
||||||
u32 length_in_bytes:16; // bits 0-15(packet length)
|
u32 length_in_bytes:16; /* bits 0-15(packet length) */
|
||||||
u32 vlan_tag:12; // bits 16-27(VLAN tag)
|
u32 vlan_tag:12; /* bits 16-27(VLAN tag) */
|
||||||
u32 vlan_cfi:1; // bit 28(cfi)
|
u32 vlan_cfi:1; /* bit 28(cfi) */
|
||||||
u32 vlan_prio:3; // bits 29-31(VLAN priority)
|
u32 vlan_prio:3; /* bits 29-31(VLAN priority) */
|
||||||
#endif /* _BIT_FIELDS_HTOL */
|
#endif /* _BIT_FIELDS_HTOL */
|
||||||
} bits;
|
} bits;
|
||||||
} TXDESC_WORD2_t, *PTXDESC_WORD2_t;
|
} TXDESC_WORD2_t, *PTXDESC_WORD2_t;
|
||||||
|
|
@ -91,39 +91,39 @@ typedef union _txdesc_word3_t {
|
||||||
u32 value;
|
u32 value;
|
||||||
struct {
|
struct {
|
||||||
#ifdef _BIT_FIELDS_HTOL
|
#ifdef _BIT_FIELDS_HTOL
|
||||||
u32 unused:17; // bits 15-31
|
u32 unused:17; /* bits 15-31 */
|
||||||
u32 udpa:1; // bit 14(UDP checksum assist)
|
u32 udpa:1; /* bit 14(UDP checksum assist) */
|
||||||
u32 tcpa:1; // bit 13(TCP checksum assist)
|
u32 tcpa:1; /* bit 13(TCP checksum assist) */
|
||||||
u32 ipa:1; // bit 12(IP checksum assist)
|
u32 ipa:1; /* bit 12(IP checksum assist) */
|
||||||
u32 vlan:1; // bit 11(append VLAN tag)
|
u32 vlan:1; /* bit 11(append VLAN tag) */
|
||||||
u32 hp:1; // bit 10(Packet is a Huge packet)
|
u32 hp:1; /* bit 10(Packet is a Huge packet) */
|
||||||
u32 pp:1; // bit 9(pad packet)
|
u32 pp:1; /* bit 9(pad packet) */
|
||||||
u32 mac:1; // bit 8(MAC override)
|
u32 mac:1; /* bit 8(MAC override) */
|
||||||
u32 crc:1; // bit 7(append CRC)
|
u32 crc:1; /* bit 7(append CRC) */
|
||||||
u32 e:1; // bit 6(Tx frame has error)
|
u32 e:1; /* bit 6(Tx frame has error) */
|
||||||
u32 pf:1; // bit 5(send pause frame)
|
u32 pf:1; /* bit 5(send pause frame) */
|
||||||
u32 bp:1; // bit 4(Issue half-duplex backpressure (XON/XOFF)
|
u32 bp:1; /* bit 4(Issue half-duplex backpressure (XON/XOFF) */
|
||||||
u32 cw:1; // bit 3(Control word - no packet data)
|
u32 cw:1; /* bit 3(Control word - no packet data) */
|
||||||
u32 ir:1; // bit 2(interrupt the processor when this pkt sent)
|
u32 ir:1; /* bit 2(interrupt the processor when this pkt sent) */
|
||||||
u32 f:1; // bit 1(first packet in the sequence)
|
u32 f:1; /* bit 1(first packet in the sequence) */
|
||||||
u32 l:1; // bit 0(last packet in the sequence)
|
u32 l:1; /* bit 0(last packet in the sequence) */
|
||||||
#else
|
#else
|
||||||
u32 l:1; // bit 0(last packet in the sequence)
|
u32 l:1; /* bit 0(last packet in the sequence) */
|
||||||
u32 f:1; // bit 1(first packet in the sequence)
|
u32 f:1; /* bit 1(first packet in the sequence) */
|
||||||
u32 ir:1; // bit 2(interrupt the processor when this pkt sent)
|
u32 ir:1; /* bit 2(interrupt the processor when this pkt sent) */
|
||||||
u32 cw:1; // bit 3(Control word - no packet data)
|
u32 cw:1; /* bit 3(Control word - no packet data) */
|
||||||
u32 bp:1; // bit 4(Issue half-duplex backpressure (XON/XOFF)
|
u32 bp:1; /* bit 4(Issue half-duplex backpressure (XON/XOFF) */
|
||||||
u32 pf:1; // bit 5(send pause frame)
|
u32 pf:1; /* bit 5(send pause frame) */
|
||||||
u32 e:1; // bit 6(Tx frame has error)
|
u32 e:1; /* bit 6(Tx frame has error) */
|
||||||
u32 crc:1; // bit 7(append CRC)
|
u32 crc:1; /* bit 7(append CRC) */
|
||||||
u32 mac:1; // bit 8(MAC override)
|
u32 mac:1; /* bit 8(MAC override) */
|
||||||
u32 pp:1; // bit 9(pad packet)
|
u32 pp:1; /* bit 9(pad packet) */
|
||||||
u32 hp:1; // bit 10(Packet is a Huge packet)
|
u32 hp:1; /* bit 10(Packet is a Huge packet) */
|
||||||
u32 vlan:1; // bit 11(append VLAN tag)
|
u32 vlan:1; /* bit 11(append VLAN tag) */
|
||||||
u32 ipa:1; // bit 12(IP checksum assist)
|
u32 ipa:1; /* bit 12(IP checksum assist) */
|
||||||
u32 tcpa:1; // bit 13(TCP checksum assist)
|
u32 tcpa:1; /* bit 13(TCP checksum assist) */
|
||||||
u32 udpa:1; // bit 14(UDP checksum assist)
|
u32 udpa:1; /* bit 14(UDP checksum assist) */
|
||||||
u32 unused:17; // bits 15-31
|
u32 unused:17; /* bits 15-31 */
|
||||||
#endif /* _BIT_FIELDS_HTOL */
|
#endif /* _BIT_FIELDS_HTOL */
|
||||||
} bits;
|
} bits;
|
||||||
} TXDESC_WORD3_t, *PTXDESC_WORD3_t;
|
} TXDESC_WORD3_t, *PTXDESC_WORD3_t;
|
||||||
|
|
@ -132,8 +132,8 @@ typedef union _txdesc_word3_t {
|
||||||
typedef struct _tx_desc_entry_t {
|
typedef struct _tx_desc_entry_t {
|
||||||
u32 DataBufferPtrHigh;
|
u32 DataBufferPtrHigh;
|
||||||
u32 DataBufferPtrLow;
|
u32 DataBufferPtrLow;
|
||||||
TXDESC_WORD2_t word2; // control words how to xmit the
|
TXDESC_WORD2_t word2; /* control words how to xmit the */
|
||||||
TXDESC_WORD3_t word3; // data (detailed above)
|
TXDESC_WORD3_t word3; /* data (detailed above) */
|
||||||
} TX_DESC_ENTRY_t, *PTX_DESC_ENTRY_t;
|
} TX_DESC_ENTRY_t, *PTX_DESC_ENTRY_t;
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -147,13 +147,13 @@ typedef union _tx_status_block_t {
|
||||||
u32 value;
|
u32 value;
|
||||||
struct {
|
struct {
|
||||||
#ifdef _BIT_FIELDS_HTOL
|
#ifdef _BIT_FIELDS_HTOL
|
||||||
u32 unused:21; // bits 11-31
|
u32 unused:21; /* bits 11-31 */
|
||||||
u32 serv_cpl_wrap:1; // bit 10
|
u32 serv_cpl_wrap:1; /* bit 10 */
|
||||||
u32 serv_cpl:10; // bits 0-9
|
u32 serv_cpl:10; /* bits 0-9 */
|
||||||
#else
|
#else
|
||||||
u32 serv_cpl:10; // bits 0-9
|
u32 serv_cpl:10; /* bits 0-9 */
|
||||||
u32 serv_cpl_wrap:1; // bit 10
|
u32 serv_cpl_wrap:1; /* bit 10 */
|
||||||
u32 unused:21; // bits 11-31
|
u32 unused:21; /* bits 11-31 */
|
||||||
#endif
|
#endif
|
||||||
} bits;
|
} bits;
|
||||||
} TX_STATUS_BLOCK_t, *PTX_STATUS_BLOCK_t;
|
} TX_STATUS_BLOCK_t, *PTX_STATUS_BLOCK_t;
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -67,7 +67,7 @@
|
||||||
* Do not change these values: if changed, then change also in respective
|
* Do not change these values: if changed, then change also in respective
|
||||||
* TXdma and Rxdma engines
|
* TXdma and Rxdma engines
|
||||||
*/
|
*/
|
||||||
#define NUM_DESC_PER_RING_TX 512 // TX Do not change these values
|
#define NUM_DESC_PER_RING_TX 512 /* TX Do not change these values */
|
||||||
#define NUM_TCB 64
|
#define NUM_TCB 64
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
@ -118,10 +118,10 @@
|
||||||
|
|
||||||
#define MP_SHOULD_FAIL_SEND(_M) ((_M)->Flags & fMP_ADAPTER_FAIL_SEND_MASK)
|
#define MP_SHOULD_FAIL_SEND(_M) ((_M)->Flags & fMP_ADAPTER_FAIL_SEND_MASK)
|
||||||
#define MP_IS_NOT_READY(_M) ((_M)->Flags & fMP_ADAPTER_NOT_READY_MASK)
|
#define MP_IS_NOT_READY(_M) ((_M)->Flags & fMP_ADAPTER_NOT_READY_MASK)
|
||||||
#define MP_IS_READY(_M) !((_M)->Flags & fMP_ADAPTER_NOT_READY_MASK)
|
#define MP_IS_READY(_M) (!((_M)->Flags & fMP_ADAPTER_NOT_READY_MASK))
|
||||||
|
|
||||||
#define MP_HAS_CABLE(_M) !((_M)->Flags & fMP_ADAPTER_NO_CABLE)
|
#define MP_HAS_CABLE(_M) (!((_M)->Flags & fMP_ADAPTER_NO_CABLE))
|
||||||
#define MP_LINK_DETECTED(_M) !((_M)->Flags & fMP_ADAPTER_LINK_DETECTION)
|
#define MP_LINK_DETECTED(_M) (!((_M)->Flags & fMP_ADAPTER_LINK_DETECTION))
|
||||||
|
|
||||||
/* Counters for error rate monitoring */
|
/* Counters for error rate monitoring */
|
||||||
typedef struct _MP_ERR_COUNTERS {
|
typedef struct _MP_ERR_COUNTERS {
|
||||||
|
|
@ -136,7 +136,7 @@ typedef struct _MP_ERR_COUNTERS {
|
||||||
typedef struct _MP_RFD {
|
typedef struct _MP_RFD {
|
||||||
struct list_head list_node;
|
struct list_head list_node;
|
||||||
struct sk_buff *Packet;
|
struct sk_buff *Packet;
|
||||||
u32 PacketSize; // total size of receive frame
|
u32 PacketSize; /* total size of receive frame */
|
||||||
u16 iBufferIndex;
|
u16 iBufferIndex;
|
||||||
u8 iRingIndex;
|
u8 iRingIndex;
|
||||||
} MP_RFD, *PMP_RFD;
|
} MP_RFD, *PMP_RFD;
|
||||||
|
|
@ -152,8 +152,8 @@ typedef enum _eflow_control_t {
|
||||||
/* Struct to define some device statistics */
|
/* Struct to define some device statistics */
|
||||||
typedef struct _ce_stats_t {
|
typedef struct _ce_stats_t {
|
||||||
/* Link Input/Output stats */
|
/* Link Input/Output stats */
|
||||||
uint64_t ipackets; // # of in packets
|
uint64_t ipackets; /* # of in packets */
|
||||||
uint64_t opackets; // # of out packets
|
uint64_t opackets; /* # of out packets */
|
||||||
|
|
||||||
/* MIB II variables
|
/* MIB II variables
|
||||||
*
|
*
|
||||||
|
|
@ -161,21 +161,21 @@ typedef struct _ce_stats_t {
|
||||||
* MUST have 32, then we'll need another way to perform atomic
|
* MUST have 32, then we'll need another way to perform atomic
|
||||||
* operations
|
* operations
|
||||||
*/
|
*/
|
||||||
u32 unircv; // # multicast packets received
|
u32 unircv; /* # multicast packets received */
|
||||||
atomic_t unixmt; // # multicast packets for Tx
|
atomic_t unixmt; /* # multicast packets for Tx */
|
||||||
u32 multircv; // # multicast packets received
|
u32 multircv; /* # multicast packets received */
|
||||||
atomic_t multixmt; // # multicast packets for Tx
|
atomic_t multixmt; /* # multicast packets for Tx */
|
||||||
u32 brdcstrcv; // # broadcast packets received
|
u32 brdcstrcv; /* # broadcast packets received */
|
||||||
atomic_t brdcstxmt; // # broadcast packets for Tx
|
atomic_t brdcstxmt; /* # broadcast packets for Tx */
|
||||||
u32 norcvbuf; // # Rx packets discarded
|
u32 norcvbuf; /* # Rx packets discarded */
|
||||||
u32 noxmtbuf; // # Tx packets discarded
|
u32 noxmtbuf; /* # Tx packets discarded */
|
||||||
|
|
||||||
/* Transciever state informations. */
|
/* Transciever state informations. */
|
||||||
u8 xcvr_addr;
|
u8 xcvr_addr;
|
||||||
u32 xcvr_id;
|
u32 xcvr_id;
|
||||||
|
|
||||||
/* Tx Statistics. */
|
/* Tx Statistics. */
|
||||||
u32 tx_uflo; // Tx Underruns
|
u32 tx_uflo; /* Tx Underruns */
|
||||||
|
|
||||||
u32 collisions;
|
u32 collisions;
|
||||||
u32 excessive_collisions;
|
u32 excessive_collisions;
|
||||||
|
|
@ -185,7 +185,7 @@ typedef struct _ce_stats_t {
|
||||||
u32 tx_deferred;
|
u32 tx_deferred;
|
||||||
|
|
||||||
/* Rx Statistics. */
|
/* Rx Statistics. */
|
||||||
u32 rx_ov_flow; // Rx Over Flow
|
u32 rx_ov_flow; /* Rx Over Flow */
|
||||||
|
|
||||||
u32 length_err;
|
u32 length_err;
|
||||||
u32 alignment_err;
|
u32 alignment_err;
|
||||||
|
|
@ -268,16 +268,16 @@ struct et131x_adapter {
|
||||||
u32 pci_cfg_state[64 / sizeof(u32)];
|
u32 pci_cfg_state[64 / sizeof(u32)];
|
||||||
|
|
||||||
/* Registry parameters */
|
/* Registry parameters */
|
||||||
u8 SpeedDuplex; // speed/duplex
|
u8 SpeedDuplex; /* speed/duplex */
|
||||||
eFLOW_CONTROL_t RegistryFlowControl; // for 802.3x flow control
|
eFLOW_CONTROL_t RegistryFlowControl; /* for 802.3x flow control */
|
||||||
u8 RegistryWOLMatch; // Enable WOL pattern-matching
|
u8 RegistryWOLMatch; /* Enable WOL pattern-matching */
|
||||||
u8 RegistryWOLLink; // Link state change is independant
|
u8 RegistryWOLLink; /* Link state change is independant */
|
||||||
u8 RegistryPhyComa; // Phy Coma mode enable/disable
|
u8 RegistryPhyComa; /* Phy Coma mode enable/disable */
|
||||||
|
|
||||||
u32 RegistryRxMemEnd; // Size of internal rx memory
|
u32 RegistryRxMemEnd; /* Size of internal rx memory */
|
||||||
u8 RegistryMACStat; // If set, read MACSTAT, else don't
|
u8 RegistryMACStat; /* If set, read MACSTAT, else don't */
|
||||||
u32 RegistryVlanTag; // 802.1q Vlan TAG
|
u32 RegistryVlanTag; /* 802.1q Vlan TAG */
|
||||||
u32 RegistryJumboPacket; // Max supported ethernet packet size
|
u32 RegistryJumboPacket; /* Max supported ethernet packet size */
|
||||||
|
|
||||||
u32 RegistryTxNumBuffers;
|
u32 RegistryTxNumBuffers;
|
||||||
u32 RegistryTxTimeInterval;
|
u32 RegistryTxTimeInterval;
|
||||||
|
|
@ -290,12 +290,12 @@ struct et131x_adapter {
|
||||||
u8 RegistryNMIDisable;
|
u8 RegistryNMIDisable;
|
||||||
u32 RegistryDMACache;
|
u32 RegistryDMACache;
|
||||||
u32 RegistrySCGain;
|
u32 RegistrySCGain;
|
||||||
u8 RegistryPhyLoopbk; // Enable Phy loopback
|
u8 RegistryPhyLoopbk; /* Enable Phy loopback */
|
||||||
|
|
||||||
/* Derived from the registry: */
|
/* Derived from the registry: */
|
||||||
u8 AiForceDpx; // duplex setting
|
u8 AiForceDpx; /* duplex setting */
|
||||||
u16 AiForceSpeed; // 'Speed', user over-ride of line speed
|
u16 AiForceSpeed; /* 'Speed', user over-ride of line speed */
|
||||||
eFLOW_CONTROL_t FlowControl; // flow control validated by the far-end
|
eFLOW_CONTROL_t FlowControl; /* flow control validated by the far-end */
|
||||||
enum {
|
enum {
|
||||||
NETIF_STATUS_INVALID = 0,
|
NETIF_STATUS_INVALID = 0,
|
||||||
NETIF_STATUS_MEDIA_CONNECT,
|
NETIF_STATUS_MEDIA_CONNECT,
|
||||||
|
|
@ -313,7 +313,7 @@ struct et131x_adapter {
|
||||||
MP_POWER_MGMT PoMgmt;
|
MP_POWER_MGMT PoMgmt;
|
||||||
INTERRUPT_t CachedMaskValue;
|
INTERRUPT_t CachedMaskValue;
|
||||||
|
|
||||||
atomic_t RcvRefCount; // Num packets not yet returned
|
atomic_t RcvRefCount; /* Num packets not yet returned */
|
||||||
|
|
||||||
/* Xcvr status at last poll */
|
/* Xcvr status at last poll */
|
||||||
MI_BMSR_t Bmsr;
|
MI_BMSR_t Bmsr;
|
||||||
|
|
@ -329,8 +329,8 @@ struct et131x_adapter {
|
||||||
PCI_CFG_SPACE_REGS PciCfgRegs;
|
PCI_CFG_SPACE_REGS PciCfgRegs;
|
||||||
|
|
||||||
/* Loopback specifics */
|
/* Loopback specifics */
|
||||||
u8 ReplicaPhyLoopbk; // Replica Enable
|
u8 ReplicaPhyLoopbk; /* Replica Enable */
|
||||||
u8 ReplicaPhyLoopbkPF; // Replica Enable Pass/Fail
|
u8 ReplicaPhyLoopbkPF; /* Replica Enable Pass/Fail */
|
||||||
|
|
||||||
/* Stats */
|
/* Stats */
|
||||||
CE_STATS_t Stats;
|
CE_STATS_t Stats;
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -74,9 +74,9 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/in.h>
|
#include <linux/in.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <asm/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
#include <linux/etherdevice.h>
|
#include <linux/etherdevice.h>
|
||||||
|
|
@ -242,7 +242,7 @@ void et131x_config_parse(struct et131x_adapter *pAdapter)
|
||||||
pAdapter->SpeedDuplex = PARM_SPEED_DUPLEX_DEF;
|
pAdapter->SpeedDuplex = PARM_SPEED_DUPLEX_DEF;
|
||||||
}
|
}
|
||||||
|
|
||||||
// pAdapter->SpeedDuplex = PARM_SPEED_DUPLEX_DEF;
|
/* pAdapter->SpeedDuplex = PARM_SPEED_DUPLEX_DEF; */
|
||||||
|
|
||||||
pAdapter->RegistryVlanTag = PARM_VLAN_TAG_DEF;
|
pAdapter->RegistryVlanTag = PARM_VLAN_TAG_DEF;
|
||||||
pAdapter->RegistryFlowControl = PARM_FLOW_CTL_DEF;
|
pAdapter->RegistryFlowControl = PARM_FLOW_CTL_DEF;
|
||||||
|
|
@ -259,11 +259,10 @@ void et131x_config_parse(struct et131x_adapter *pAdapter)
|
||||||
pAdapter->RegistrySCGain = PARM_SC_GAIN_DEF;
|
pAdapter->RegistrySCGain = PARM_SC_GAIN_DEF;
|
||||||
pAdapter->RegistryPMWOL = PARM_PM_WOL_DEF;
|
pAdapter->RegistryPMWOL = PARM_PM_WOL_DEF;
|
||||||
|
|
||||||
if (et131x_nmi_disable != PARM_NMI_DISABLE_DEF) {
|
if (et131x_nmi_disable != PARM_NMI_DISABLE_DEF)
|
||||||
pAdapter->RegistryNMIDisable = et131x_nmi_disable;
|
pAdapter->RegistryNMIDisable = et131x_nmi_disable;
|
||||||
} else {
|
else
|
||||||
pAdapter->RegistryNMIDisable = PARM_NMI_DISABLE_DEF;
|
pAdapter->RegistryNMIDisable = PARM_NMI_DISABLE_DEF;
|
||||||
}
|
|
||||||
|
|
||||||
pAdapter->RegistryDMACache = PARM_DMA_CACHE_DEF;
|
pAdapter->RegistryDMACache = PARM_DMA_CACHE_DEF;
|
||||||
pAdapter->RegistryPhyLoopbk = PARM_PHY_LOOPBK_DEF;
|
pAdapter->RegistryPhyLoopbk = PARM_PHY_LOOPBK_DEF;
|
||||||
|
|
@ -283,39 +282,38 @@ void et131x_config_parse(struct et131x_adapter *pAdapter)
|
||||||
* Set up as if we are auto negotiating always and then change if we
|
* Set up as if we are auto negotiating always and then change if we
|
||||||
* go into force mode
|
* go into force mode
|
||||||
*/
|
*/
|
||||||
pAdapter->AiForceSpeed = 0; // Auto speed
|
pAdapter->AiForceSpeed = 0; /* Auto speed */
|
||||||
pAdapter->AiForceDpx = 0; // Auto FDX
|
pAdapter->AiForceDpx = 0; /* Auto FDX */
|
||||||
|
|
||||||
/* If we are the 10/100 device, and gigabit is somehow requested then
|
/* If we are the 10/100 device, and gigabit is somehow requested then
|
||||||
* knock it down to 100 full.
|
* knock it down to 100 full.
|
||||||
*/
|
*/
|
||||||
if ((pAdapter->DeviceID == ET131X_PCI_DEVICE_ID_FAST) &&
|
if (pAdapter->DeviceID == ET131X_PCI_DEVICE_ID_FAST &&
|
||||||
(pAdapter->SpeedDuplex == 5)) {
|
pAdapter->SpeedDuplex == 5)
|
||||||
pAdapter->SpeedDuplex = 4;
|
pAdapter->SpeedDuplex = 4;
|
||||||
}
|
|
||||||
|
|
||||||
switch (pAdapter->SpeedDuplex) {
|
switch (pAdapter->SpeedDuplex) {
|
||||||
case 1: // 10Mb Half-Duplex
|
case 1: /* 10Mb Half-Duplex */
|
||||||
pAdapter->AiForceSpeed = 10;
|
pAdapter->AiForceSpeed = 10;
|
||||||
pAdapter->AiForceDpx = 1;
|
pAdapter->AiForceDpx = 1;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 2: // 10Mb Full-Duplex
|
case 2: /* 10Mb Full-Duplex */
|
||||||
pAdapter->AiForceSpeed = 10;
|
pAdapter->AiForceSpeed = 10;
|
||||||
pAdapter->AiForceDpx = 2;
|
pAdapter->AiForceDpx = 2;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 3: // 100Mb Half-Duplex
|
case 3: /* 100Mb Half-Duplex */
|
||||||
pAdapter->AiForceSpeed = 100;
|
pAdapter->AiForceSpeed = 100;
|
||||||
pAdapter->AiForceDpx = 1;
|
pAdapter->AiForceDpx = 1;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 4: // 100Mb Full-Duplex
|
case 4: /* 100Mb Full-Duplex */
|
||||||
pAdapter->AiForceSpeed = 100;
|
pAdapter->AiForceSpeed = 100;
|
||||||
pAdapter->AiForceDpx = 2;
|
pAdapter->AiForceDpx = 2;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 5: // 1000Mb Full-Duplex
|
case 5: /* 1000Mb Full-Duplex */
|
||||||
pAdapter->AiForceSpeed = 1000;
|
pAdapter->AiForceSpeed = 1000;
|
||||||
pAdapter->AiForceDpx = 2;
|
pAdapter->AiForceDpx = 2;
|
||||||
break;
|
break;
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -19,7 +19,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -40,7 +40,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -76,9 +76,9 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/in.h>
|
#include <linux/in.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <asm/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
#include <linux/etherdevice.h>
|
#include <linux/etherdevice.h>
|
||||||
|
|
@ -214,4 +214,4 @@ void DumpDeviceReg(int dbgLvl, struct et131x_adapter *pAdapter)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif // CONFIG_ET131X_DEBUG
|
#endif /* CONFIG_ET131X_DEBUG */
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -21,7 +21,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -42,7 +42,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -97,7 +97,7 @@
|
||||||
#endif /* DBG_PRINTC */
|
#endif /* DBG_PRINTC */
|
||||||
|
|
||||||
#ifndef DBG_TRAP
|
#ifndef DBG_TRAP
|
||||||
#define DBG_TRAP {} /* BUG() */
|
#define DBG_TRAP do {} while (0) /* BUG() */
|
||||||
#endif /* DBG_TRAP */
|
#endif /* DBG_TRAP */
|
||||||
|
|
||||||
#define _ENTER_STR ">>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>"
|
#define _ENTER_STR ">>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>"
|
||||||
|
|
@ -227,16 +227,16 @@ typedef struct {
|
||||||
#define DBG_PRINT(S...)
|
#define DBG_PRINT(S...)
|
||||||
#define DBG_ENTER(A)
|
#define DBG_ENTER(A)
|
||||||
#define DBG_LEAVE(A)
|
#define DBG_LEAVE(A)
|
||||||
#define DBG_PARAM(A,N,F,S...)
|
#define DBG_PARAM(A, N, F, S...)
|
||||||
#define DBG_ERROR(A,S...)
|
#define DBG_ERROR(A, S...)
|
||||||
#define DBG_WARNING(A,S...)
|
#define DBG_WARNING(A, S...)
|
||||||
#define DBG_NOTICE(A,S...)
|
#define DBG_NOTICE(A, S...)
|
||||||
#define DBG_TRACE(A,S...)
|
#define DBG_TRACE(A, S...)
|
||||||
#define DBG_VERBOSE(A,S...)
|
#define DBG_VERBOSE(A, S...)
|
||||||
#define DBG_RX(A,S...)
|
#define DBG_RX(A, S...)
|
||||||
#define DBG_RX_ENTER(A)
|
#define DBG_RX_ENTER(A)
|
||||||
#define DBG_RX_LEAVE(A)
|
#define DBG_RX_LEAVE(A)
|
||||||
#define DBG_TX(A,S...)
|
#define DBG_TX(A, S...)
|
||||||
#define DBG_TX_ENTER(A)
|
#define DBG_TX_ENTER(A)
|
||||||
#define DBG_TX_LEAVE(A)
|
#define DBG_TX_LEAVE(A)
|
||||||
#define DBG_ASSERT(C)
|
#define DBG_ASSERT(C)
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -118,9 +118,9 @@
|
||||||
#define ET1310_PCI_ADVANCED_ERR 0x100
|
#define ET1310_PCI_ADVANCED_ERR 0x100
|
||||||
|
|
||||||
/* PCI Vendor/Product IDs */
|
/* PCI Vendor/Product IDs */
|
||||||
#define ET131X_PCI_VENDOR_ID 0x11C1 // Agere Systems
|
#define ET131X_PCI_VENDOR_ID 0x11C1 /* Agere Systems */
|
||||||
#define ET131X_PCI_DEVICE_ID_GIG 0xED00 // ET1310 1000 Base-T
|
#define ET131X_PCI_DEVICE_ID_GIG 0xED00 /* ET1310 1000 Base-T 8 */
|
||||||
#define ET131X_PCI_DEVICE_ID_FAST 0xED01 // ET1310 100 Base-T
|
#define ET131X_PCI_DEVICE_ID_FAST 0xED01 /* ET1310 100 Base-T */
|
||||||
|
|
||||||
/* Define order of magnitude converter */
|
/* Define order of magnitude converter */
|
||||||
#define NANO_IN_A_MICRO 1000
|
#define NANO_IN_A_MICRO 1000
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -21,7 +21,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -42,7 +42,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -76,9 +76,9 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/in.h>
|
#include <linux/in.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <asm/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
#include <linux/etherdevice.h>
|
#include <linux/etherdevice.h>
|
||||||
|
|
@ -155,8 +155,8 @@ static struct pci_driver et131x_driver = {
|
||||||
.id_table = et131x_pci_table,
|
.id_table = et131x_pci_table,
|
||||||
.probe = et131x_pci_setup,
|
.probe = et131x_pci_setup,
|
||||||
.remove = __devexit_p(et131x_pci_remove),
|
.remove = __devexit_p(et131x_pci_remove),
|
||||||
.suspend = NULL, //et131x_pci_suspend,
|
.suspend = NULL, /* et131x_pci_suspend */
|
||||||
.resume = NULL, //et131x_pci_resume,
|
.resume = NULL, /* et131x_pci_resume */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -252,9 +252,8 @@ int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
|
||||||
RegisterVal = inb(ET1310_NMI_DISABLE);
|
RegisterVal = inb(ET1310_NMI_DISABLE);
|
||||||
RegisterVal &= 0xf3;
|
RegisterVal &= 0xf3;
|
||||||
|
|
||||||
if (adapter->RegistryNMIDisable == 2) {
|
if (adapter->RegistryNMIDisable == 2)
|
||||||
RegisterVal |= 0xc;
|
RegisterVal |= 0xc;
|
||||||
}
|
|
||||||
|
|
||||||
outb(ET1310_NMI_DISABLE, RegisterVal);
|
outb(ET1310_NMI_DISABLE, RegisterVal);
|
||||||
}
|
}
|
||||||
|
|
@ -331,9 +330,9 @@ int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
|
||||||
EepromReadByte(adapter, 0x70, &adapter->eepromData[0], 0, SINGLE_BYTE);
|
EepromReadByte(adapter, 0x70, &adapter->eepromData[0], 0, SINGLE_BYTE);
|
||||||
EepromReadByte(adapter, 0x71, &adapter->eepromData[1], 0, SINGLE_BYTE);
|
EepromReadByte(adapter, 0x71, &adapter->eepromData[1], 0, SINGLE_BYTE);
|
||||||
|
|
||||||
if (adapter->eepromData[0] != 0xcd) {
|
if (adapter->eepromData[0] != 0xcd)
|
||||||
adapter->eepromData[1] = 0x00; // Disable all optional features
|
/* Disable all optional features */
|
||||||
}
|
adapter->eepromData[1] = 0x00;
|
||||||
|
|
||||||
/* Let's set up the PORT LOGIC Register. First we need to know what
|
/* Let's set up the PORT LOGIC Register. First we need to know what
|
||||||
* the max_payload_size is
|
* the max_payload_size is
|
||||||
|
|
@ -347,7 +346,7 @@ int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Program the Ack/Nak latency and replay timers */
|
/* Program the Ack/Nak latency and replay timers */
|
||||||
maxPayload &= 0x07; // Only the lower 3 bits are valid
|
maxPayload &= 0x07; /* Only the lower 3 bits are valid */
|
||||||
|
|
||||||
if (maxPayload < 2) {
|
if (maxPayload < 2) {
|
||||||
const uint16_t AckNak[2] = { 0x76, 0xD0 };
|
const uint16_t AckNak[2] = { 0x76, 0xD0 };
|
||||||
|
|
@ -454,14 +453,12 @@ void et131x_error_timer_handler(unsigned long data)
|
||||||
pm_csr.value = readl(&pAdapter->CSRAddress->global.pm_csr.value);
|
pm_csr.value = readl(&pAdapter->CSRAddress->global.pm_csr.value);
|
||||||
|
|
||||||
if (pm_csr.bits.pm_phy_sw_coma == 0) {
|
if (pm_csr.bits.pm_phy_sw_coma == 0) {
|
||||||
if (pAdapter->RegistryMACStat) {
|
if (pAdapter->RegistryMACStat)
|
||||||
UpdateMacStatHostCounters(pAdapter);
|
UpdateMacStatHostCounters(pAdapter);
|
||||||
}
|
} else
|
||||||
} else {
|
|
||||||
DBG_VERBOSE(et131x_dbginfo,
|
DBG_VERBOSE(et131x_dbginfo,
|
||||||
"No interrupts, in PHY coma, pm_csr = 0x%x\n",
|
"No interrupts, in PHY coma, pm_csr = 0x%x\n",
|
||||||
pm_csr.value);
|
pm_csr.value);
|
||||||
}
|
|
||||||
|
|
||||||
if (!pAdapter->Bmsr.bits.link_status &&
|
if (!pAdapter->Bmsr.bits.link_status &&
|
||||||
pAdapter->RegistryPhyComa &&
|
pAdapter->RegistryPhyComa &&
|
||||||
|
|
@ -473,8 +470,9 @@ void et131x_error_timer_handler(unsigned long data)
|
||||||
if (!pAdapter->Bmsr.bits.link_status
|
if (!pAdapter->Bmsr.bits.link_status
|
||||||
&& pAdapter->RegistryPhyComa) {
|
&& pAdapter->RegistryPhyComa) {
|
||||||
if (pm_csr.bits.pm_phy_sw_coma == 0) {
|
if (pm_csr.bits.pm_phy_sw_coma == 0) {
|
||||||
// NOTE - This was originally a 'sync with interrupt'. How
|
/* NOTE - This was originally a 'sync with
|
||||||
// to do that under Linux?
|
* interrupt'. How to do that under Linux?
|
||||||
|
*/
|
||||||
et131x_enable_interrupts(pAdapter);
|
et131x_enable_interrupts(pAdapter);
|
||||||
EnablePhyComa(pAdapter);
|
EnablePhyComa(pAdapter);
|
||||||
}
|
}
|
||||||
|
|
@ -542,9 +540,8 @@ int et131x_adapter_setup(struct et131x_adapter *pAdapter)
|
||||||
/* Move the following code to Timer function?? */
|
/* Move the following code to Timer function?? */
|
||||||
status = et131x_xcvr_find(pAdapter);
|
status = et131x_xcvr_find(pAdapter);
|
||||||
|
|
||||||
if (status != 0) {
|
if (status != 0)
|
||||||
DBG_WARNING(et131x_dbginfo, "Could not find the xcvr\n");
|
DBG_WARNING(et131x_dbginfo, "Could not find the xcvr\n");
|
||||||
}
|
|
||||||
|
|
||||||
/* Prepare the TRUEPHY library. */
|
/* Prepare the TRUEPHY library. */
|
||||||
ET1310_PhyInit(pAdapter);
|
ET1310_PhyInit(pAdapter);
|
||||||
|
|
@ -559,11 +556,10 @@ int et131x_adapter_setup(struct et131x_adapter *pAdapter)
|
||||||
* We need to turn off 1000 base half dulplex, the mac does not
|
* We need to turn off 1000 base half dulplex, the mac does not
|
||||||
* support it. For the 10/100 part, turn off all gig advertisement
|
* support it. For the 10/100 part, turn off all gig advertisement
|
||||||
*/
|
*/
|
||||||
if (pAdapter->DeviceID != ET131X_PCI_DEVICE_ID_FAST) {
|
if (pAdapter->DeviceID != ET131X_PCI_DEVICE_ID_FAST)
|
||||||
ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL);
|
ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL);
|
||||||
} else {
|
else
|
||||||
ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE);
|
ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE);
|
||||||
}
|
|
||||||
|
|
||||||
/* Power up PHY */
|
/* Power up PHY */
|
||||||
ET1310_PhyPowerDown(pAdapter, 0);
|
ET1310_PhyPowerDown(pAdapter, 0);
|
||||||
|
|
@ -861,9 +857,11 @@ int __devinit et131x_pci_setup(struct pci_dev *pdev,
|
||||||
/* Setup the fundamental net_device and private adapter structure elements */
|
/* Setup the fundamental net_device and private adapter structure elements */
|
||||||
DBG_TRACE(et131x_dbginfo, "Setting fundamental net_device info...\n");
|
DBG_TRACE(et131x_dbginfo, "Setting fundamental net_device info...\n");
|
||||||
SET_NETDEV_DEV(netdev, &pdev->dev);
|
SET_NETDEV_DEV(netdev, &pdev->dev);
|
||||||
|
/*
|
||||||
if (pci_using_dac) {
|
if (pci_using_dac) {
|
||||||
//netdev->features |= NETIF_F_HIGHDMA;
|
netdev->features |= NETIF_F_HIGHDMA;
|
||||||
}
|
}
|
||||||
|
*/
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* NOTE - Turn this on when we're ready to deal with SG-DMA
|
* NOTE - Turn this on when we're ready to deal with SG-DMA
|
||||||
|
|
@ -884,9 +882,9 @@ int __devinit et131x_pci_setup(struct pci_dev *pdev,
|
||||||
* receiving a scattered buffer from the network stack, so leave it
|
* receiving a scattered buffer from the network stack, so leave it
|
||||||
* off until checksums are calculated in HW.
|
* off until checksums are calculated in HW.
|
||||||
*/
|
*/
|
||||||
//netdev->features |= NETIF_F_SG;
|
/* netdev->features |= NETIF_F_SG; */
|
||||||
//netdev->features |= NETIF_F_NO_CSUM;
|
/* netdev->features |= NETIF_F_NO_CSUM; */
|
||||||
//netdev->features |= NETIF_F_LLTX;
|
/* netdev->features |= NETIF_F_LLTX; */
|
||||||
|
|
||||||
/* Allocate private adapter struct and copy in relevant information */
|
/* Allocate private adapter struct and copy in relevant information */
|
||||||
adapter = netdev_priv(netdev);
|
adapter = netdev_priv(netdev);
|
||||||
|
|
@ -921,7 +919,7 @@ int __devinit et131x_pci_setup(struct pci_dev *pdev,
|
||||||
* lump it's init with the device specific init below into a
|
* lump it's init with the device specific init below into a
|
||||||
* single init function?
|
* single init function?
|
||||||
*/
|
*/
|
||||||
//while (et131x_find_adapter(adapter, pdev) != 0);
|
/* while (et131x_find_adapter(adapter, pdev) != 0); */
|
||||||
et131x_find_adapter(adapter, pdev);
|
et131x_find_adapter(adapter, pdev);
|
||||||
|
|
||||||
/* Map the bus-relative registers to system virtual memory */
|
/* Map the bus-relative registers to system virtual memory */
|
||||||
|
|
@ -1002,7 +1000,8 @@ int __devinit et131x_pci_setup(struct pci_dev *pdev,
|
||||||
/* Initialize link state */
|
/* Initialize link state */
|
||||||
et131x_link_detection_handler((unsigned long)adapter);
|
et131x_link_detection_handler((unsigned long)adapter);
|
||||||
|
|
||||||
/* Intialize variable for counting how long we do not have link status */
|
/* Intialize variable for counting how long we do not have
|
||||||
|
link status */
|
||||||
adapter->PoMgmt.TransPhyComaModeOnBoot = 0;
|
adapter->PoMgmt.TransPhyComaModeOnBoot = 0;
|
||||||
|
|
||||||
/* We can enable interrupts now
|
/* We can enable interrupts now
|
||||||
|
|
@ -1014,7 +1013,8 @@ int __devinit et131x_pci_setup(struct pci_dev *pdev,
|
||||||
|
|
||||||
/* Register the net_device struct with the Linux network layer */
|
/* Register the net_device struct with the Linux network layer */
|
||||||
DBG_TRACE(et131x_dbginfo, "Registering net_device...\n");
|
DBG_TRACE(et131x_dbginfo, "Registering net_device...\n");
|
||||||
if ((result = register_netdev(netdev)) != 0) {
|
result = register_netdev(netdev);
|
||||||
|
if (result != 0) {
|
||||||
DBG_ERROR(et131x_dbginfo, "register_netdev() failed\n");
|
DBG_ERROR(et131x_dbginfo, "register_netdev() failed\n");
|
||||||
goto err_mem_free;
|
goto err_mem_free;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -74,9 +74,9 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/in.h>
|
#include <linux/in.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <asm/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
#include <linux/etherdevice.h>
|
#include <linux/etherdevice.h>
|
||||||
|
|
@ -151,29 +151,24 @@ irqreturn_t et131x_isr(int irq, void *dev_id)
|
||||||
|
|
||||||
/* This is our interrupt, so process accordingly */
|
/* This is our interrupt, so process accordingly */
|
||||||
#ifdef CONFIG_ET131X_DEBUG
|
#ifdef CONFIG_ET131X_DEBUG
|
||||||
if (status.bits.rxdma_xfr_done) {
|
if (status.bits.rxdma_xfr_done)
|
||||||
adapter->Stats.RxDmaInterruptsPerSec++;
|
adapter->Stats.RxDmaInterruptsPerSec++;
|
||||||
}
|
|
||||||
|
|
||||||
if (status.bits.txdma_isr) {
|
if (status.bits.txdma_isr)
|
||||||
adapter->Stats.TxDmaInterruptsPerSec++;
|
adapter->Stats.TxDmaInterruptsPerSec++;
|
||||||
}
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if (status.bits.watchdog_interrupt) {
|
if (status.bits.watchdog_interrupt) {
|
||||||
PMP_TCB pMpTcb = adapter->TxRing.CurrSendHead;
|
PMP_TCB pMpTcb = adapter->TxRing.CurrSendHead;
|
||||||
|
|
||||||
if (pMpTcb) {
|
if (pMpTcb)
|
||||||
if (++pMpTcb->PacketStaleCount > 1) {
|
if (++pMpTcb->PacketStaleCount > 1)
|
||||||
status.bits.txdma_isr = 1;
|
status.bits.txdma_isr = 1;
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (adapter->RxRing.UnfinishedReceives) {
|
if (adapter->RxRing.UnfinishedReceives)
|
||||||
status.bits.rxdma_xfr_done = 1;
|
status.bits.rxdma_xfr_done = 1;
|
||||||
} else if (pMpTcb == NULL) {
|
else if (pMpTcb == NULL)
|
||||||
writel(0, &adapter->CSRAddress->global.watchdog_timer);
|
writel(0, &adapter->CSRAddress->global.watchdog_timer);
|
||||||
}
|
|
||||||
|
|
||||||
status.bits.watchdog_interrupt = 0;
|
status.bits.watchdog_interrupt = 0;
|
||||||
#ifdef CONFIG_ET131X_DEBUG
|
#ifdef CONFIG_ET131X_DEBUG
|
||||||
|
|
@ -284,7 +279,8 @@ void et131x_isr_handler(struct work_struct *work)
|
||||||
/* Tell the device to send a pause packet via
|
/* Tell the device to send a pause packet via
|
||||||
* the back pressure register
|
* the back pressure register
|
||||||
*/
|
*/
|
||||||
pm_csr.value = readl(&iomem->global.pm_csr.value);
|
pm_csr.value =
|
||||||
|
readl(&iomem->global.pm_csr.value);
|
||||||
if (pm_csr.bits.pm_phy_sw_coma == 0) {
|
if (pm_csr.bits.pm_phy_sw_coma == 0) {
|
||||||
TXMAC_BP_CTRL_t bp_ctrl = { 0 };
|
TXMAC_BP_CTRL_t bp_ctrl = { 0 };
|
||||||
|
|
||||||
|
|
@ -332,7 +328,7 @@ void et131x_isr_handler(struct work_struct *work)
|
||||||
* something bad has occurred. A reset might be the
|
* something bad has occurred. A reset might be the
|
||||||
* thing to do.
|
* thing to do.
|
||||||
*/
|
*/
|
||||||
// TRAP();
|
/* TRAP();*/
|
||||||
|
|
||||||
pAdapter->TxMacTest.value =
|
pAdapter->TxMacTest.value =
|
||||||
readl(&iomem->txmac.tx_test.value);
|
readl(&iomem->txmac.tx_test.value);
|
||||||
|
|
@ -425,7 +421,7 @@ void et131x_isr_handler(struct work_struct *work)
|
||||||
* otherwise we just want the device to be reset and
|
* otherwise we just want the device to be reset and
|
||||||
* continue
|
* continue
|
||||||
*/
|
*/
|
||||||
//DBG_TRAP();
|
/* DBG_TRAP(); */
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Handle RXMAC Interrupt */
|
/* Handle RXMAC Interrupt */
|
||||||
|
|
@ -436,7 +432,8 @@ void et131x_isr_handler(struct work_struct *work)
|
||||||
* set the flag to cause us to reset so we can solve
|
* set the flag to cause us to reset so we can solve
|
||||||
* this issue.
|
* this issue.
|
||||||
*/
|
*/
|
||||||
// MP_SET_FLAG( pAdapter, fMP_ADAPTER_HARDWARE_ERROR );
|
/* MP_SET_FLAG( pAdapter,
|
||||||
|
fMP_ADAPTER_HARDWARE_ERROR); */
|
||||||
|
|
||||||
DBG_WARNING(et131x_dbginfo,
|
DBG_WARNING(et131x_dbginfo,
|
||||||
"RXMAC interrupt, error 0x%08x. Requesting reset\n",
|
"RXMAC interrupt, error 0x%08x. Requesting reset\n",
|
||||||
|
|
@ -452,7 +449,7 @@ void et131x_isr_handler(struct work_struct *work)
|
||||||
* otherwise we just want the device to be reset and
|
* otherwise we just want the device to be reset and
|
||||||
* continue
|
* continue
|
||||||
*/
|
*/
|
||||||
// TRAP();
|
/* TRAP(); */
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Handle MAC_STAT Interrupt */
|
/* Handle MAC_STAT Interrupt */
|
||||||
|
|
@ -482,7 +479,6 @@ void et131x_isr_handler(struct work_struct *work)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pAdapter->PoMgmt.PowerState == NdisDeviceStateD0) {
|
if (pAdapter->PoMgmt.PowerState == NdisDeviceStateD0)
|
||||||
et131x_enable_interrupts(pAdapter);
|
et131x_enable_interrupts(pAdapter);
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -19,7 +19,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -40,7 +40,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
@ -73,9 +73,9 @@
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/in.h>
|
#include <linux/in.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <asm/io.h>
|
#include <linux/io.h>
|
||||||
|
#include <linux/bitops.h>
|
||||||
#include <asm/system.h>
|
#include <asm/system.h>
|
||||||
#include <asm/bitops.h>
|
|
||||||
|
|
||||||
#include <linux/mii.h>
|
#include <linux/mii.h>
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
|
|
@ -153,16 +153,16 @@ struct net_device *et131x_device_alloc(void)
|
||||||
/* Setup the function registration table (and other data) for a
|
/* Setup the function registration table (and other data) for a
|
||||||
* net_device
|
* net_device
|
||||||
*/
|
*/
|
||||||
//netdev->init = &et131x_init;
|
/* netdev->init = &et131x_init; */
|
||||||
//netdev->set_config = &et131x_config;
|
/* netdev->set_config = &et131x_config; */
|
||||||
netdev->watchdog_timeo = ET131X_TX_TIMEOUT;
|
netdev->watchdog_timeo = ET131X_TX_TIMEOUT;
|
||||||
netdev->netdev_ops = &et131x_netdev_ops;
|
netdev->netdev_ops = &et131x_netdev_ops;
|
||||||
|
|
||||||
//netdev->ethtool_ops = &et131x_ethtool_ops;
|
/* netdev->ethtool_ops = &et131x_ethtool_ops; */
|
||||||
|
|
||||||
// Poll?
|
/* Poll? */
|
||||||
//netdev->poll = &et131x_poll;
|
/* netdev->poll = &et131x_poll; */
|
||||||
//netdev->poll_controller = &et131x_poll_controller;
|
/* netdev->poll_controller = &et131x_poll_controller; */
|
||||||
|
|
||||||
DBG_LEAVE(et131x_dbginfo);
|
DBG_LEAVE(et131x_dbginfo);
|
||||||
return netdev;
|
return netdev;
|
||||||
|
|
@ -194,23 +194,25 @@ struct net_device_stats *et131x_stats(struct net_device *netdev)
|
||||||
stats->rx_over_errors = devstat->rx_ov_flow;
|
stats->rx_over_errors = devstat->rx_ov_flow;
|
||||||
stats->rx_crc_errors = devstat->crc_err;
|
stats->rx_crc_errors = devstat->crc_err;
|
||||||
|
|
||||||
// NOTE: These stats don't have corresponding values in CE_STATS, so we're
|
/* NOTE: These stats don't have corresponding values in CE_STATS,
|
||||||
// going to have to update these directly from within the TX/RX code
|
* so we're going to have to update these directly from within the
|
||||||
//stats->rx_bytes = 20; //devstat->;
|
* TX/RX code
|
||||||
//stats->tx_bytes = 20; //devstat->;
|
*/
|
||||||
//stats->rx_dropped = devstat->;
|
/* stats->rx_bytes = 20; devstat->; */
|
||||||
//stats->tx_dropped = devstat->;
|
/* stats->tx_bytes = 20; devstat->; */
|
||||||
|
/* stats->rx_dropped = devstat->; */
|
||||||
|
/* stats->tx_dropped = devstat->; */
|
||||||
|
|
||||||
// NOTE: Not used, can't find analogous statistics
|
/* NOTE: Not used, can't find analogous statistics */
|
||||||
//stats->rx_frame_errors = devstat->;
|
/* stats->rx_frame_errors = devstat->; */
|
||||||
//stats->rx_fifo_errors = devstat->;
|
/* stats->rx_fifo_errors = devstat->; */
|
||||||
//stats->rx_missed_errors = devstat->;
|
/* stats->rx_missed_errors = devstat->; */
|
||||||
|
|
||||||
//stats->tx_aborted_errors = devstat->;
|
/* stats->tx_aborted_errors = devstat->; */
|
||||||
//stats->tx_carrier_errors = devstat->;
|
/* stats->tx_carrier_errors = devstat->; */
|
||||||
//stats->tx_fifo_errors = devstat->;
|
/* stats->tx_fifo_errors = devstat->; */
|
||||||
//stats->tx_heartbeat_errors = devstat->;
|
/* stats->tx_heartbeat_errors = devstat->; */
|
||||||
//stats->tx_window_errors = devstat->;
|
/* stats->tx_window_errors = devstat->; */
|
||||||
|
|
||||||
DBG_LEAVE(et131x_dbginfo);
|
DBG_LEAVE(et131x_dbginfo);
|
||||||
return stats;
|
return stats;
|
||||||
|
|
@ -417,7 +419,8 @@ int et131x_set_packet_filter(struct et131x_adapter *adapter)
|
||||||
"Multicast filtering OFF (Rx ALL MULTICAST)\n");
|
"Multicast filtering OFF (Rx ALL MULTICAST)\n");
|
||||||
pf_ctrl.bits.filter_multi_en = 0;
|
pf_ctrl.bits.filter_multi_en = 0;
|
||||||
} else {
|
} else {
|
||||||
DBG_VERBOSE(et131x_dbginfo, "Multicast filtering ON\n");
|
DBG_VERBOSE(et131x_dbginfo,
|
||||||
|
"Multicast filtering ON\n");
|
||||||
SetupDeviceForMulticast(adapter);
|
SetupDeviceForMulticast(adapter);
|
||||||
pf_ctrl.bits.filter_multi_en = 1;
|
pf_ctrl.bits.filter_multi_en = 1;
|
||||||
ctrl.bits.pkt_filter_disable = 0;
|
ctrl.bits.pkt_filter_disable = 0;
|
||||||
|
|
@ -505,9 +508,7 @@ void et131x_multicast(struct net_device *netdev)
|
||||||
|
|
||||||
if (netdev->mc_count > NIC_MAX_MCAST_LIST) {
|
if (netdev->mc_count > NIC_MAX_MCAST_LIST) {
|
||||||
DBG_WARNING(et131x_dbginfo,
|
DBG_WARNING(et131x_dbginfo,
|
||||||
"ACCEPT ALL MULTICAST for now, as there's more Multicast "
|
"ACCEPT ALL MULTICAST for now, as there's more Multicast addresses than the HW supports\n");
|
||||||
"addresses than the HW supports\n");
|
|
||||||
|
|
||||||
adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST;
|
adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -525,10 +526,10 @@ void et131x_multicast(struct net_device *netdev)
|
||||||
adapter->MCAddressCount = netdev->mc_count;
|
adapter->MCAddressCount = netdev->mc_count;
|
||||||
|
|
||||||
if (netdev->mc_count) {
|
if (netdev->mc_count) {
|
||||||
if (mclist->dmi_addrlen != ETH_ALEN) {
|
if (mclist->dmi_addrlen != ETH_ALEN)
|
||||||
DBG_WARNING(et131x_dbginfo,
|
DBG_WARNING(et131x_dbginfo,
|
||||||
"Multicast addrs are not ETH_ALEN in size\n");
|
"Multicast addrs are not ETH_ALEN in size\n");
|
||||||
} else {
|
else {
|
||||||
count = netdev->mc_count - 1;
|
count = netdev->mc_count - 1;
|
||||||
memcpy(adapter->MCList[count], mclist->dmi_addr,
|
memcpy(adapter->MCList[count], mclist->dmi_addr,
|
||||||
ETH_ALEN);
|
ETH_ALEN);
|
||||||
|
|
@ -750,9 +751,8 @@ int et131x_change_mtu(struct net_device *netdev, int new_mtu)
|
||||||
et131x_adapter_setup(adapter);
|
et131x_adapter_setup(adapter);
|
||||||
|
|
||||||
/* Enable interrupts */
|
/* Enable interrupts */
|
||||||
if (MP_TEST_FLAG(adapter, fMP_ADAPTER_INTERRUPT_IN_USE)) {
|
if (MP_TEST_FLAG(adapter, fMP_ADAPTER_INTERRUPT_IN_USE))
|
||||||
et131x_enable_interrupts(adapter);
|
et131x_enable_interrupts(adapter);
|
||||||
}
|
|
||||||
|
|
||||||
/* Restart the Tx and Rx DMA engines */
|
/* Restart the Tx and Rx DMA engines */
|
||||||
et131x_rx_dma_enable(adapter);
|
et131x_rx_dma_enable(adapter);
|
||||||
|
|
@ -781,8 +781,8 @@ int et131x_set_mac_addr(struct net_device *netdev, void *new_mac)
|
||||||
struct sockaddr *address = new_mac;
|
struct sockaddr *address = new_mac;
|
||||||
|
|
||||||
DBG_ENTER(et131x_dbginfo);
|
DBG_ENTER(et131x_dbginfo);
|
||||||
// begin blux
|
/* begin blux */
|
||||||
// DBG_VERBOSE( et131x_dbginfo, "Function not implemented!!\n" );
|
/* DBG_VERBOSE( et131x_dbginfo, "Function not implemented!!\n" ); */
|
||||||
|
|
||||||
if (adapter == NULL) {
|
if (adapter == NULL) {
|
||||||
DBG_LEAVE(et131x_dbginfo);
|
DBG_LEAVE(et131x_dbginfo);
|
||||||
|
|
@ -808,22 +808,24 @@ int et131x_set_mac_addr(struct net_device *netdev, void *new_mac)
|
||||||
et131x_handle_recv_interrupt(adapter);
|
et131x_handle_recv_interrupt(adapter);
|
||||||
|
|
||||||
/* Set the new MAC */
|
/* Set the new MAC */
|
||||||
// netdev->set_mac_address = &new_mac;
|
/* netdev->set_mac_address = &new_mac; */
|
||||||
// netdev->mtu = new_mtu;
|
/* netdev->mtu = new_mtu; */
|
||||||
|
|
||||||
memcpy(netdev->dev_addr, address->sa_data, netdev->addr_len);
|
memcpy(netdev->dev_addr, address->sa_data, netdev->addr_len);
|
||||||
|
|
||||||
printk("%s: Setting MAC address to %02x:%02x:%02x:%02x:%02x:%02x\n",
|
printk(KERN_INFO
|
||||||
netdev->name, netdev->dev_addr[0], netdev->dev_addr[1],
|
"%s: Setting MAC address to %02x:%02x:%02x:%02x:%02x:%02x\n",
|
||||||
netdev->dev_addr[2], netdev->dev_addr[3], netdev->dev_addr[4],
|
netdev->name,
|
||||||
netdev->dev_addr[5]);
|
netdev->dev_addr[0], netdev->dev_addr[1],
|
||||||
|
netdev->dev_addr[2], netdev->dev_addr[3],
|
||||||
|
netdev->dev_addr[4], netdev->dev_addr[5]);
|
||||||
|
|
||||||
/* Free Rx DMA memory */
|
/* Free Rx DMA memory */
|
||||||
et131x_adapter_memory_free(adapter);
|
et131x_adapter_memory_free(adapter);
|
||||||
|
|
||||||
/* Set the config parameter for Jumbo Packet support */
|
/* Set the config parameter for Jumbo Packet support */
|
||||||
// adapter->RegistryJumboPacket = new_mtu + 14;
|
/* adapter->RegistryJumboPacket = new_mtu + 14; */
|
||||||
// blux: not needet here, w'll change the MAC
|
/* blux: not needet here, we'll change the MAC */
|
||||||
|
|
||||||
et131x_soft_reset(adapter);
|
et131x_soft_reset(adapter);
|
||||||
|
|
||||||
|
|
@ -838,16 +840,15 @@ int et131x_set_mac_addr(struct net_device *netdev, void *new_mac)
|
||||||
et131x_init_send(adapter);
|
et131x_init_send(adapter);
|
||||||
|
|
||||||
et131x_setup_hardware_properties(adapter);
|
et131x_setup_hardware_properties(adapter);
|
||||||
// memcpy( netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN );
|
/* memcpy( netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN ); */
|
||||||
// blux: no, do not override our nice address
|
/* blux: no, do not override our nice address */
|
||||||
|
|
||||||
/* Init the device with the new settings */
|
/* Init the device with the new settings */
|
||||||
et131x_adapter_setup(adapter);
|
et131x_adapter_setup(adapter);
|
||||||
|
|
||||||
/* Enable interrupts */
|
/* Enable interrupts */
|
||||||
if (MP_TEST_FLAG(adapter, fMP_ADAPTER_INTERRUPT_IN_USE)) {
|
if (MP_TEST_FLAG(adapter, fMP_ADAPTER_INTERRUPT_IN_USE))
|
||||||
et131x_enable_interrupts(adapter);
|
et131x_enable_interrupts(adapter);
|
||||||
}
|
|
||||||
|
|
||||||
/* Restart the Tx and Rx DMA engines */
|
/* Restart the Tx and Rx DMA engines */
|
||||||
et131x_rx_dma_enable(adapter);
|
et131x_rx_dma_enable(adapter);
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -20,7 +20,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
|
||||||
|
|
@ -2,7 +2,7 @@
|
||||||
* Agere Systems Inc.
|
* Agere Systems Inc.
|
||||||
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
* http://www.agere.com
|
* http://www.agere.com
|
||||||
*
|
*
|
||||||
|
|
@ -19,7 +19,7 @@
|
||||||
* software indicates your acceptance of these terms and conditions. If you do
|
* software indicates your acceptance of these terms and conditions. If you do
|
||||||
* not agree with these terms and conditions, do not use the software.
|
* not agree with these terms and conditions, do not use the software.
|
||||||
*
|
*
|
||||||
* Copyright © 2005 Agere Systems Inc.
|
* Copyright © 2005 Agere Systems Inc.
|
||||||
* All rights reserved.
|
* All rights reserved.
|
||||||
*
|
*
|
||||||
* Redistribution and use in source or binary forms, with or without
|
* Redistribution and use in source or binary forms, with or without
|
||||||
|
|
@ -40,7 +40,7 @@
|
||||||
*
|
*
|
||||||
* Disclaimer
|
* Disclaimer
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||||
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
|
||||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
|
||||||
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue