hpet: /dev/hpet - fixes and cleanup
Minor /dev/hpet updates and bugfixes: * Remove dead code, mostly remnants of an incomplete/unusable kernel interface ... noted when addressing "sparse" warnings: + hpet_unregister() and a routine it calls + hpet_task and all references, including hpet_task_lock + hpet_data.hd_flags (and HPET_DATA_PLATFORM) * Correct and improve boot message: + displays *counter* (shared between comparators) bit width, not *timer* bit widths (which are often mixed) + relabel "timers" as "comparators"; this is less confusing, they are not independent like normal timers are (sigh) + display MHz not Hz; it's never less than 10 MHz. * Tighten and correct the userspace interface code + don't accidentally program comparators in 64-bit mode using 32-bit values ... always force comparators into 32-bit mode + provide the correct bit definition flagging comparators with periodic capability ... the ABI is unchanged * Update Documentation/hpet.txt + be more correct and current + expand description a bit + don't mention that now-gone kernel interface Plus, add a FIXME comment for something that could cause big trouble on systems with more capable HPETs than at least Intel seems to ship. It seems that few folk use this userspace interface; it's not very usable given the general lack of HPET IRQ routing. I'm told that the only real point of it any more is to mmap for fast timestamps; IMO that's handled better through the gettimeofday() vsyscall. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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4 changed files with 51 additions and 99 deletions
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@ -1,21 +1,32 @@
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High Precision Event Timer Driver for Linux
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The High Precision Event Timer (HPET) hardware is the future replacement
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for the 8254 and Real Time Clock (RTC) periodic timer functionality.
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Each HPET can have up to 32 timers. It is possible to configure the
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first two timers as legacy replacements for 8254 and RTC periodic timers.
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A specification done by Intel and Microsoft can be found at
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<http://www.intel.com/technology/architecture/hpetspec.htm>.
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The High Precision Event Timer (HPET) hardware follows a specification
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by Intel and Microsoft which can be found at
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http://www.intel.com/technology/architecture/hpetspec.htm
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Each HPET has one fixed-rate counter (at 10+ MHz, hence "High Precision")
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and up to 32 comparators. Normally three or more comparators are provided,
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each of which can generate oneshot interupts and at least one of which has
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additional hardware to support periodic interrupts. The comparators are
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also called "timers", which can be misleading since usually timers are
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independent of each other ... these share a counter, complicating resets.
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HPET devices can support two interrupt routing modes. In one mode, the
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comparators are additional interrupt sources with no particular system
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role. Many x86 BIOS writers don't route HPET interrupts at all, which
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prevents use of that mode. They support the other "legacy replacement"
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mode where the first two comparators block interrupts from 8254 timers
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and from the RTC.
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The driver supports detection of HPET driver allocation and initialization
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of the HPET before the driver module_init routine is called. This enables
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platform code which uses timer 0 or 1 as the main timer to intercept HPET
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initialization. An example of this initialization can be found in
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arch/i386/kernel/time_hpet.c.
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arch/x86/kernel/hpet.c.
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The driver provides two APIs which are very similar to the API found in
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the rtc.c driver. There is a user space API and a kernel space API.
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An example user space program is provided below.
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The driver provides a userspace API which resembles the API found in the
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RTC driver framework. An example user space program is provided below.
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#include <stdio.h>
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#include <stdlib.h>
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@ -286,15 +297,3 @@ out:
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return;
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}
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The kernel API has three interfaces exported from the driver:
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hpet_register(struct hpet_task *tp, int periodic)
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hpet_unregister(struct hpet_task *tp)
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hpet_control(struct hpet_task *tp, unsigned int cmd, unsigned long arg)
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The kernel module using this interface fills in the ht_func and ht_data
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members of the hpet_task structure before calling hpet_register.
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hpet_control simply vectors to the hpet_ioctl routine and has the same
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commands and respective arguments as the user API. hpet_unregister
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is used to terminate usage of the HPET timer reserved by hpet_register.
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@ -115,13 +115,17 @@ static void hpet_reserve_platform_timers(unsigned long id)
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hd.hd_phys_address = hpet_address;
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hd.hd_address = hpet;
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hd.hd_nirqs = nrtimers;
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hd.hd_flags = HPET_DATA_PLATFORM;
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hpet_reserve_timer(&hd, 0);
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#ifdef CONFIG_HPET_EMULATE_RTC
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hpet_reserve_timer(&hd, 1);
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#endif
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/*
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* NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254
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* is wrong for i8259!) not the output IRQ. Many BIOS writers
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* don't bother configuring *any* comparator interrupts.
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*/
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hd.hd_irq[0] = HPET_LEGACY_8254;
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hd.hd_irq[1] = HPET_LEGACY_RTC;
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@ -53,6 +53,11 @@
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#define HPET_RANGE_SIZE 1024 /* from HPET spec */
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/* WARNING -- don't get confused. These macros are never used
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* to write the (single) counter, and rarely to read it.
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* They're badly named; to fix, someday.
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*/
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#if BITS_PER_LONG == 64
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#define write_counter(V, MC) writeq(V, MC)
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#define read_counter(MC) readq(MC)
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@ -77,7 +82,7 @@ static struct clocksource clocksource_hpet = {
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.rating = 250,
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.read = read_hpet,
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.mask = CLOCKSOURCE_MASK(64),
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.mult = 0, /*to be caluclated*/
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.mult = 0, /* to be calculated */
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.shift = 10,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/* A lock for concurrent access by app and isr hpet activity. */
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static DEFINE_SPINLOCK(hpet_lock);
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/* A lock for concurrent intermodule access to hpet and isr hpet activity. */
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static DEFINE_SPINLOCK(hpet_task_lock);
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#define HPET_DEV_NAME (7)
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@ -99,7 +102,6 @@ struct hpet_dev {
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unsigned long hd_irqdata;
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wait_queue_head_t hd_waitqueue;
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struct fasync_struct *hd_async_queue;
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struct hpet_task *hd_task;
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unsigned int hd_flags;
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unsigned int hd_irq;
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unsigned int hd_hdwirq;
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@ -173,11 +175,6 @@ static irqreturn_t hpet_interrupt(int irq, void *data)
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writel(isr, &devp->hd_hpet->hpet_isr);
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spin_unlock(&hpet_lock);
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spin_lock(&hpet_task_lock);
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if (devp->hd_task)
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devp->hd_task->ht_func(devp->hd_task->ht_data);
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spin_unlock(&hpet_task_lock);
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wake_up_interruptible(&devp->hd_waitqueue);
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kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
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@ -260,8 +257,7 @@ static int hpet_open(struct inode *inode, struct file *file)
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for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
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for (i = 0; i < hpetp->hp_ntimer; i++)
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if (hpetp->hp_dev[i].hd_flags & HPET_OPEN
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|| hpetp->hp_dev[i].hd_task)
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if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
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continue;
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else {
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devp = &hpetp->hp_dev[i];
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devp->hd_irq = irq;
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t = devp->hd_ireqfreq;
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v = readq(&timer->hpet_config);
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g = v | Tn_INT_ENB_CNF_MASK;
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/* 64-bit comparators are not yet supported through the ioctls,
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* so force this into 32-bit mode if it supports both modes
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*/
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g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
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if (devp->hd_flags & HPET_PERIODIC) {
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write_counter(t, &timer->hpet_compare);
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v |= Tn_VAL_SET_CNF_MASK;
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writeq(v, &timer->hpet_config);
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local_irq_save(flags);
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/* NOTE: what we modify here is a hidden accumulator
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* register supported by periodic-capable comparators.
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* We never want to modify the (single) counter; that
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* would affect all the comparators.
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*/
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m = read_counter(&hpet->hpet_mc);
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write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
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} else {
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return 0;
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}
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static inline int hpet_tpcheck(struct hpet_task *tp)
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{
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struct hpet_dev *devp;
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struct hpets *hpetp;
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devp = tp->ht_opaque;
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if (!devp)
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return -ENXIO;
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for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
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if (devp >= hpetp->hp_dev
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&& devp < (hpetp->hp_dev + hpetp->hp_ntimer)
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&& devp->hd_hpet == hpetp->hp_hpet)
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return 0;
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return -ENXIO;
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}
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#if 0
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int hpet_unregister(struct hpet_task *tp)
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{
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struct hpet_dev *devp;
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struct hpet_timer __iomem *timer;
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int err;
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if ((err = hpet_tpcheck(tp)))
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return err;
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spin_lock_irq(&hpet_task_lock);
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spin_lock(&hpet_lock);
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devp = tp->ht_opaque;
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if (devp->hd_task != tp) {
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spin_unlock(&hpet_lock);
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spin_unlock_irq(&hpet_task_lock);
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return -ENXIO;
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}
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timer = devp->hd_timer;
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writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
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&timer->hpet_config);
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devp->hd_flags &= ~(HPET_IE | HPET_PERIODIC);
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devp->hd_task = NULL;
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spin_unlock(&hpet_lock);
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spin_unlock_irq(&hpet_task_lock);
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return 0;
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}
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#endif /* 0 */
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static ctl_table hpet_table[] = {
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{
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.ctl_name = CTL_UNNUMBERED,
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printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
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printk("\n");
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printk(KERN_INFO "hpet%u: %u %d-bit timers, %Lu Hz\n",
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hpetp->hp_which, hpetp->hp_ntimer,
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cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, hpetp->hp_tick_freq);
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printk(KERN_INFO
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"hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
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hpetp->hp_which, hpetp->hp_ntimer,
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cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
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(unsigned) (hpetp->hp_tick_freq / 1000000),
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(unsigned) (hpetp->hp_tick_freq % 1000000));
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mcfg = readq(&hpet->hpet_config);
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if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
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* exported interfaces
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*/
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struct hpet_task {
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void (*ht_func) (void *);
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void *ht_data;
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void *ht_opaque;
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};
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struct hpet_data {
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unsigned long hd_phys_address;
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void __iomem *hd_address;
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unsigned short hd_nirqs;
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unsigned short hd_flags;
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unsigned int hd_state; /* timer allocated */
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unsigned int hd_irq[HPET_MAX_TIMERS];
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};
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#define HPET_DATA_PLATFORM 0x0001 /* platform call to hpet_alloc */
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static inline void hpet_reserve_timer(struct hpet_data *hd, int timer)
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{
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hd->hd_state |= (1 << timer);
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unsigned short hi_timer;
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};
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#define HPET_INFO_PERIODIC 0x0001 /* timer is periodic */
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#define HPET_INFO_PERIODIC 0x0010 /* periodic-capable comparator */
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#define HPET_IE_ON _IO('h', 0x01) /* interrupt on */
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#define HPET_IE_OFF _IO('h', 0x02) /* interrupt off */
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