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[ARM] orion5x: Change names of defines for Reset-Out-Mask register

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The name of the define for the Reset-Out-Mask register as well as its
bit for the watchdog reset are changed to match the names used for
Kirkwood (which in turn match the processor specification more
closely). There is no functional change.

This patch prepares for adding orion5x_wdt as a platform device to
Kirkwood.

Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
This commit is contained in:
Thomas Reitmayr 2009-06-01 13:38:33 +02:00 committed by Nicolas Pitre
parent e8b2b7ba12
commit 6462c6160a
4 changed files with 11 additions and 11 deletions
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4
arch/arm/mach-orion5x/include/mach/bridge-regs.h
View file

@ -17,8 +17,8 @@
#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104)
#define CPU_RESET_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108)
#define WDT_RESET 0x0002
#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108)
#define WDT_RESET_OUT_EN 0x0002
#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c)

2
arch/arm/mach-orion5x/include/mach/system.h
View file

@ -23,7 +23,7 @@ static inline void arch_reset(char mode, const char *cmd)
/*
* Enable and issue soft reset
*/
orion5x_setbits(CPU_RESET_MASK, (1 << 2));
orion5x_setbits(RSTOUTn_MASK, (1 << 2));
orion5x_setbits(CPU_SOFT_RESET, 1);
}

4
arch/arm/mach-orion5x/mss2-setup.c
View file

@ -181,9 +181,9 @@ static void mss2_power_off(void)
/*
* Enable and issue soft reset
*/
reg = readl(CPU_RESET_MASK);
reg = readl(RSTOUTn_MASK);
reg |= 1 << 2;
writel(reg, CPU_RESET_MASK);
writel(reg, RSTOUTn_MASK);
reg = readl(CPU_SOFT_RESET);
reg |= 1;

12
drivers/watchdog/orion5x_wdt.c
View file

@ -73,9 +73,9 @@ static void orion5x_wdt_enable(void)
writel(reg, TIMER_CTRL);
/* Enable reset on watchdog */
reg = readl(CPU_RESET_MASK);
reg |= WDT_RESET;
writel(reg, CPU_RESET_MASK);
reg = readl(RSTOUTn_MASK);
reg |= WDT_RESET_OUT_EN;
writel(reg, RSTOUTn_MASK);
spin_unlock(&wdt_lock);
}
@ -87,9 +87,9 @@ static void orion5x_wdt_disable(void)
spin_lock(&wdt_lock);
/* Disable reset on watchdog */
reg = readl(CPU_RESET_MASK);
reg &= ~WDT_RESET;
writel(reg, CPU_RESET_MASK);
reg = readl(RSTOUTn_MASK);
reg &= ~WDT_RESET_OUT_EN;
writel(reg, RSTOUTn_MASK);
/* Disable watchdog timer */
reg = readl(TIMER_CTRL);