[ARM] 5204/1: Trizeps4 SOM update
- use MFP-API for GPIO - support TRIZEPS4WL module - cleanups Signed-off-by: Jrgen Schindele <linux@schindele.name> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Jürgen Schindele
Russell King
parent
b8e6c91c74
commit
642aa6637e
3 changed files with 422 additions and 245 deletions
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@ -170,13 +170,41 @@ config MACH_E800
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Say Y here if you intend to run this kernel on a Toshiba
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e800 family PDA.
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config TRIZEPS_PXA
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bool "PXA based Keith und Koep Trizeps DIMM-Modules"
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config MACH_TRIZEPS4
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bool "Keith und Koep Trizeps4 DIMM-Module"
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depends on TRIZEPS_PXA
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select TRIZEPS_PCMCIA
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select PXA27x
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config MACH_TRIZEPS4_CONXS
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config MACH_TRIZEPS4WL
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bool "Keith und Koep Trizeps4-WL DIMM-Module"
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depends on TRIZEPS_PXA
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select TRIZEPS_PCMCIA
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select PXA27x
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select PXA_SSP
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choice
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prompt "Select base board for Trizeps module"
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depends on TRIZEPS_PXA
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config MACH_TRIZEPS_CONXS
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bool "ConXS Eval Board"
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depends on MACH_TRIZEPS4
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config MACH_TRIZEPS_UCONXS
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bool "uConXS Eval Board"
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config MACH_TRIZEPS_ANY
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bool "another Board"
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endchoice
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config TRIZEPS_PCMCIA
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bool
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help
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Enable PCMCIA support for Trizeps modules
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config MACH_EM_X270
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bool "CompuLab EM-x270 platform"
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@ -17,11 +17,16 @@
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#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */
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#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */
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#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board CSFR register */
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#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) /* Logic chip on ConXS-Board BOCR register */
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#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) /* Logic chip on ConXS-Board IRCR register*/
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#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) /* Logic chip on ConXS-Board UPSR register*/
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#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* Logic chip on ConXS-Board DICR register*/
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/* Logic on ConXS-board CSFR register*/
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#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS)
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/* Logic on ConXS-board BOCR register*/
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#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000)
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/* Logic on ConXS-board IRCR register*/
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#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000)
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/* Logic on ConXS-board UPSR register*/
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#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000)
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/* Logic on ConXS-board DICR register*/
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#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000)
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/* virtual memory regions */
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#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */
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@ -54,6 +59,15 @@
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#define GPIO_MMC_DET 12
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#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET)
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/* DOC NAND chip */
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#define GPIO_DOC_LOCK 94
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#define GPIO_DOC_IRQ 93
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#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ)
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/* SPI interface */
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#define GPIO_SPI 53
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#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI)
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/* LEDS using tx2 / rx2 */
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#define GPIO_SYS_BUSY_LED 46
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#define GPIO_HEARTBEAT_LED 47
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@ -62,24 +76,66 @@
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#define GPIO_PIC 0
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#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC)
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#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT)
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#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS)
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#ifdef CONFIG_MACH_TRIZEPS_CONXS
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/* for CONXS base board define these registers */
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#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT)
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#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS)
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#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT)
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#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS)
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#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT)
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#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS)
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#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT)
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#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS)
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#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT)
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#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS)
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#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT)
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#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS)
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#ifndef __ASSEMBLY__
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#define ConXS_CFSR (*((volatile unsigned short *)CFSR_P2V(0x0C000000)))
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#define ConXS_BCR (*((volatile unsigned short *)BCR_P2V(0x0E000000)))
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#define ConXS_DCR (*((volatile unsigned short *)DCR_P2V(0x0F800000)))
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static inline unsigned short CFSR_readw(void)
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{
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/* [Compact Flash Status Register] is read only */
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return *((unsigned short *)CFSR_P2V(0x0C000000));
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}
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static inline void BCR_writew(unsigned short value)
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{
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/* [Board Control Regsiter] is write only */
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*((unsigned short *)BCR_P2V(0x0E000000)) = value;
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}
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static inline void DCR_writew(unsigned short value)
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{
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/* [Display Control Register] is write only */
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*((unsigned short *)DCR_P2V(0x0E000000)) = value;
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}
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static inline void IRCR_writew(unsigned short value)
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{
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/* [InfraRed data Control Register] is write only */
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*((unsigned short *)IRCR_P2V(0x0E000000)) = value;
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}
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#else
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#define ConXS_CFSR CFSR_P2V(0x0C000000)
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#define ConXS_BCR BCR_P2V(0x0E000000)
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#define ConXS_DCR DCR_P2V(0x0F800000)
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#define ConXS_IRCR IRCR_P2V(0x0F800000)
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#endif
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#else
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/* for whatever baseboard define function registers */
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static inline unsigned short CFSR_readw(void)
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{
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return 0;
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}
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static inline void BCR_writew(unsigned short value)
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{
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;
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}
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static inline void DCR_writew(unsigned short value)
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{
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;
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}
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static inline void IRCR_writew(unsigned short value)
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{
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;
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}
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#endif /* CONFIG_MACH_TRIZEPS_CONXS */
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#define ConXS_CFSR_BVD_MASK 0x0003
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#define ConXS_CFSR_BVD1 (1 << 0)
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@ -22,8 +22,8 @@
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#include <linux/fb.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/serial_8250.h>
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#include <linux/mtd/mtd.h>
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#include <linux/gpio.h>
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#include <linux/dm9000.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/partitions.h>
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@ -31,7 +31,6 @@
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#include <asm/setup.h>
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#include <asm/memory.h>
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#include <asm/mach-types.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/sizes.h>
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@ -40,41 +39,148 @@
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#include <asm/mach/irq.h>
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#include <asm/mach/flash.h>
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#include <mach/hardware.h>
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#include <mach/pxa-regs.h>
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#include <mach/pxa2xx-regs.h>
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#include <mach/pxa2xx-gpio.h>
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#include <mach/mfp-pxa27x.h>
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#include <mach/pxa2xx_spi.h>
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#include <mach/trizeps4.h>
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#include <mach/audio.h>
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#include <mach/pxafb.h>
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#include <mach/mmc.h>
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#include <mach/irda.h>
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#include <mach/ohci.h>
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#include <mach/i2c.h>
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#include "generic.h"
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#include "devices.h"
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/********************************************************************************************
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/* comment out the following line if you want to use the
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* Standard UART from PXA for serial / irda transmission
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* and acivate it if you have status leds connected */
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#define STATUS_LEDS_ON_STUART_PINS 1
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/*****************************************************************************
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* MultiFunctionPins of CPU
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*****************************************************************************/
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static unsigned long trizeps4_pin_config[] __initdata = {
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/* Chip Selects */
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GPIO15_nCS_1, /* DiskOnChip CS */
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GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */
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GPIO94_GPIO, /* DOC lock */
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GPIO78_nCS_2, /* DM9000 CS */
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GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */
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GPIO79_nCS_3, /* Logic CS */
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GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */
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/* LCD - 16bpp Active TFT */
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GPIO58_LCD_LDD_0,
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GPIO59_LCD_LDD_1,
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GPIO60_LCD_LDD_2,
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GPIO61_LCD_LDD_3,
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GPIO62_LCD_LDD_4,
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GPIO63_LCD_LDD_5,
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GPIO64_LCD_LDD_6,
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GPIO65_LCD_LDD_7,
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GPIO66_LCD_LDD_8,
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GPIO67_LCD_LDD_9,
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GPIO68_LCD_LDD_10,
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GPIO69_LCD_LDD_11,
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GPIO70_LCD_LDD_12,
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GPIO71_LCD_LDD_13,
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GPIO72_LCD_LDD_14,
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GPIO73_LCD_LDD_15,
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GPIO74_LCD_FCLK,
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GPIO75_LCD_LCLK,
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GPIO76_LCD_PCLK,
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GPIO77_LCD_BIAS,
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/* UART */
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GPIO9_FFUART_CTS,
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GPIO10_FFUART_DCD,
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GPIO16_FFUART_TXD,
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GPIO33_FFUART_DSR,
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GPIO38_FFUART_RI,
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GPIO82_FFUART_DTR,
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GPIO83_FFUART_RTS,
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GPIO96_FFUART_RXD,
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GPIO42_BTUART_RXD,
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GPIO43_BTUART_TXD,
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GPIO44_BTUART_CTS,
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GPIO45_BTUART_RTS,
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#ifdef STATUS_LEDS_ON_STUART_PINS
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GPIO46_GPIO,
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GPIO47_GPIO,
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#else
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GPIO46_STUART_RXD,
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GPIO47_STUART_TXD,
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#endif
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/* PCMCIA */
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GPIO11_GPIO, /* TRIZEPS4_CD_IRQ */
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GPIO13_GPIO, /* TRIZEPS4_READY_NINT */
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GPIO48_nPOE,
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GPIO49_nPWE,
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GPIO50_nPIOR,
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GPIO51_nPIOW,
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GPIO54_nPCE_2,
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GPIO55_nPREG,
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GPIO56_nPWAIT,
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GPIO57_nIOIS16,
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GPIO102_nPCE_1,
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GPIO104_PSKTSEL,
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/* MultiMediaCard */
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GPIO32_MMC_CLK,
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GPIO92_MMC_DAT_0,
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GPIO109_MMC_DAT_1,
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GPIO110_MMC_DAT_2,
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GPIO111_MMC_DAT_3,
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GPIO112_MMC_CMD,
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GPIO12_GPIO, /* TRIZEPS4_MMC_IRQ */
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/* USB OHCI */
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GPIO88_USBH1_PWR, /* USBHPWR1 */
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GPIO89_USBH1_PEN, /* USBHPEN1 */
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/* I2C */
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GPIO117_I2C_SCL,
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GPIO118_I2C_SDA,
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};
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static unsigned long trizeps4wl_pin_config[] __initdata = {
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/* SSP 2 */
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GPIO14_SSP2_SFRM,
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GPIO19_SSP2_SCLK,
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GPIO53_GPIO, /* TRIZEPS4_SPI_IRQ */
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GPIO86_SSP2_RXD,
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GPIO87_SSP2_TXD,
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};
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/****************************************************************************
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* ONBOARD FLASH
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********************************************************************************************/
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****************************************************************************/
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static struct mtd_partition trizeps4_partitions[] = {
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{
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.name = "Bootloader",
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.offset = 0x00000000,
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.size = 0x00040000,
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.mask_flags = MTD_WRITEABLE /* force read-only */
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},{
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}, {
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.name = "Backup",
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.offset = 0x00040000,
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.size = 0x00040000,
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},{
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}, {
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.name = "Image",
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.offset = 0x00080000,
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.size = 0x01080000,
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},{
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}, {
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.name = "IPSM",
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.offset = 0x01100000,
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.size = 0x00e00000,
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},{
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}, {
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.name = "Registry",
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.offset = 0x01f00000,
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.size = MTDPART_SIZ_FULL,
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@ -105,9 +211,9 @@ static struct platform_device flash_device = {
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.num_resources = 1,
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};
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/********************************************************************************************
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/****************************************************************************
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* DAVICOM DM9000 Ethernet
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********************************************************************************************/
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****************************************************************************/
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static struct resource dm9000_resources[] = {
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[0] = {
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.start = TRIZEPS4_ETH_PHYS+0x300,
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@ -122,67 +228,68 @@ static struct resource dm9000_resources[] = {
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[2] = {
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.start = TRIZEPS4_ETH_IRQ,
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.end = TRIZEPS4_ETH_IRQ,
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.flags = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
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},
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};
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static struct dm9000_plat_data tri_dm9000_platdata = {
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.flags = DM9000_PLATF_32BITONLY,
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};
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static struct platform_device dm9000_device = {
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.name = "dm9000",
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.id = -1,
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.num_resources = ARRAY_SIZE(dm9000_resources),
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.resource = dm9000_resources,
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.dev = {
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.platform_data = &tri_dm9000_platdata,
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}
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};
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/********************************************************************************************
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* PXA270 serial ports
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********************************************************************************************/
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static struct plat_serial8250_port tri_serial_ports[] = {
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#ifdef CONFIG_SERIAL_PXA
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/* this uses the own PXA driver */
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/****************************************************************************
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* LED's on GPIO pins of PXA
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****************************************************************************/
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static struct gpio_led trizeps4_led[] = {
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#ifdef STATUS_LEDS_ON_STUART_PINS
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{
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0,
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},
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#else
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/* this uses the generic 8520 driver */
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[0] = {
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.membase = (void *)&FFUART,
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.irq = IRQ_FFUART,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM32,
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.regshift = 2,
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.uartclk = (921600*16),
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},
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[1] = {
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.membase = (void *)&BTUART,
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.irq = IRQ_BTUART,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM32,
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.regshift = 2,
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.uartclk = (921600*16),
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.name = "led0:orange:heartbeat", /* */
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.default_trigger = "heartbeat",
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.gpio = GPIO_HEARTBEAT_LED,
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.active_low = 1,
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},
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{
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0,
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.name = "led1:yellow:cpubusy", /* */
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.default_trigger = "cpu-busy",
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.gpio = GPIO_SYS_BUSY_LED,
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.active_low = 1,
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},
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#endif
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};
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static struct platform_device uart_devices = {
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.name = "serial8250",
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.id = 0,
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static struct gpio_led_platform_data trizeps4_led_data = {
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.leds = trizeps4_led,
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.num_leds = ARRAY_SIZE(trizeps4_led),
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};
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static struct platform_device leds_devices = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = tri_serial_ports,
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.platform_data = &trizeps4_led_data,
|
||||
},
|
||||
.num_resources = 0,
|
||||
.resource = NULL,
|
||||
};
|
||||
|
||||
static struct platform_device * trizeps4_devices[] __initdata = {
|
||||
static struct platform_device *trizeps4_devices[] __initdata = {
|
||||
&flash_device,
|
||||
&uart_devices,
|
||||
&dm9000_device,
|
||||
&leds_devices,
|
||||
};
|
||||
|
||||
static struct platform_device *trizeps4wl_devices[] __initdata = {
|
||||
&flash_device,
|
||||
&leds_devices,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_MACH_TRIZEPS4_CONXS
|
||||
static short trizeps_conxs_bcr;
|
||||
|
||||
/* PCCARD power switching supports only 3,3V */
|
||||
|
|
@ -192,108 +299,63 @@ void board_pcmcia_power(int power)
|
|||
/* switch power on, put in reset and enable buffers */
|
||||
trizeps_conxs_bcr |= power;
|
||||
trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
|
||||
trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN);
|
||||
ConXS_BCR = trizeps_conxs_bcr;
|
||||
trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN;
|
||||
BCR_writew(trizeps_conxs_bcr);
|
||||
/* wait a little */
|
||||
udelay(2000);
|
||||
/* take reset away */
|
||||
trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET);
|
||||
ConXS_BCR = trizeps_conxs_bcr;
|
||||
trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET;
|
||||
BCR_writew(trizeps_conxs_bcr);
|
||||
udelay(2000);
|
||||
} else {
|
||||
/* put in reset */
|
||||
trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
|
||||
ConXS_BCR = trizeps_conxs_bcr;
|
||||
BCR_writew(trizeps_conxs_bcr);
|
||||
udelay(1000);
|
||||
/* switch power off */
|
||||
trizeps_conxs_bcr &= ~(0xf);
|
||||
ConXS_BCR = trizeps_conxs_bcr;
|
||||
|
||||
trizeps_conxs_bcr &= ~0xf;
|
||||
BCR_writew(trizeps_conxs_bcr);
|
||||
}
|
||||
pr_debug("%s: o%s 0x%x\n", __func__, power ? "n": "ff", trizeps_conxs_bcr);
|
||||
pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff",
|
||||
trizeps_conxs_bcr);
|
||||
}
|
||||
EXPORT_SYMBOL(board_pcmcia_power);
|
||||
|
||||
/* backlight power switching for LCD panel */
|
||||
static void board_backlight_power(int on)
|
||||
{
|
||||
if (on) {
|
||||
if (on)
|
||||
trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
|
||||
} else {
|
||||
else
|
||||
trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
|
||||
}
|
||||
pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", trizeps_conxs_bcr);
|
||||
ConXS_BCR = trizeps_conxs_bcr;
|
||||
|
||||
pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff",
|
||||
trizeps_conxs_bcr);
|
||||
BCR_writew(trizeps_conxs_bcr);
|
||||
}
|
||||
|
||||
/* Powersupply for MMC/SD cardslot */
|
||||
static void board_mci_power(struct device *dev, unsigned int vdd)
|
||||
{
|
||||
struct pxamci_platform_data* p_d = dev->platform_data;
|
||||
/* a I2C based RTC is known on CONXS board */
|
||||
static struct i2c_board_info trizeps4_i2c_devices[] __initdata = {
|
||||
{ I2C_BOARD_INFO("rtc-pcf8593", 0x51) }
|
||||
};
|
||||
|
||||
if (( 1 << vdd) & p_d->ocr_mask) {
|
||||
pr_debug("%s: on\n", __func__);
|
||||
/* FIXME fill in values here */
|
||||
} else {
|
||||
pr_debug("%s: off\n", __func__);
|
||||
/* FIXME fill in values here */
|
||||
}
|
||||
}
|
||||
|
||||
static short trizeps_conxs_ircr;
|
||||
|
||||
/* Switch modes and Power for IRDA receiver */
|
||||
static void board_irda_mode(struct device *dev, int mode)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
if (mode & IR_SIRMODE) {
|
||||
/* Slow mode */
|
||||
trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
|
||||
} else if (mode & IR_FIRMODE) {
|
||||
/* Fast mode */
|
||||
trizeps_conxs_ircr |= ConXS_IRCR_MODE;
|
||||
}
|
||||
pxa2xx_transceiver_mode(dev, mode);
|
||||
if (mode & IR_OFF) {
|
||||
trizeps_conxs_ircr |= ConXS_IRCR_SD;
|
||||
} else {
|
||||
trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
|
||||
}
|
||||
/* FIXME write values to register */
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
#else
|
||||
/* for other baseboards define dummies */
|
||||
void board_pcmcia_power(int power) {;}
|
||||
#define board_backlight_power NULL
|
||||
#define board_mci_power NULL
|
||||
#define board_irda_mode NULL
|
||||
|
||||
#endif /* CONFIG_MACH_TRIZEPS4_CONXS */
|
||||
EXPORT_SYMBOL(board_pcmcia_power);
|
||||
|
||||
static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data)
|
||||
/****************************************************************************
|
||||
* MMC card slot external to module
|
||||
****************************************************************************/
|
||||
static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int,
|
||||
void *data)
|
||||
{
|
||||
int err;
|
||||
/* setup GPIO for PXA27x MMC controller */
|
||||
pxa_gpio_mode(GPIO32_MMCCLK_MD);
|
||||
pxa_gpio_mode(GPIO112_MMCCMD_MD);
|
||||
pxa_gpio_mode(GPIO92_MMCDAT0_MD);
|
||||
pxa_gpio_mode(GPIO109_MMCDAT1_MD);
|
||||
pxa_gpio_mode(GPIO110_MMCDAT2_MD);
|
||||
pxa_gpio_mode(GPIO111_MMCDAT3_MD);
|
||||
|
||||
pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
|
||||
|
||||
err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
|
||||
IRQF_DISABLED | IRQF_TRIGGER_RISING,
|
||||
"MMC card detect", data);
|
||||
if (err)
|
||||
printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
|
||||
|
||||
return err;
|
||||
IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_SAMPLE_RANDOM,
|
||||
"MMC card detect", data);
|
||||
if (err) {
|
||||
printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request"
|
||||
"MMC card detect IRQ\n");
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void trizeps4_mci_exit(struct device *dev, void *data)
|
||||
|
|
@ -303,22 +365,68 @@ static void trizeps4_mci_exit(struct device *dev, void *data)
|
|||
|
||||
static struct pxamci_platform_data trizeps4_mci_platform_data = {
|
||||
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
|
||||
.detect_delay = 1,
|
||||
.init = trizeps4_mci_init,
|
||||
.exit = trizeps4_mci_exit,
|
||||
.setpower = board_mci_power,
|
||||
.get_ro = NULL, /* write-protection not supported */
|
||||
.setpower = NULL, /* power-switching not supported */
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* IRDA mode switching on stuart
|
||||
****************************************************************************/
|
||||
#ifndef STATUS_LEDS_ON_STUART_PINS
|
||||
static short trizeps_conxs_ircr;
|
||||
|
||||
static int trizeps4_irda_startup(struct device *dev)
|
||||
{
|
||||
trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
|
||||
IRCR_writew(trizeps_conxs_ircr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void trizeps4_irda_shutdown(struct device *dev)
|
||||
{
|
||||
trizeps_conxs_ircr |= ConXS_IRCR_SD;
|
||||
IRCR_writew(trizeps_conxs_ircr);
|
||||
}
|
||||
|
||||
static void trizeps4_irda_transceiver_mode(struct device *dev, int mode)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
/* Switch mode */
|
||||
if (mode & IR_SIRMODE)
|
||||
trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */
|
||||
else if (mode & IR_FIRMODE) {
|
||||
trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */
|
||||
|
||||
/* Switch power */
|
||||
if (mode & IR_OFF)
|
||||
trizeps_conxs_ircr |= ConXS_IRCR_SD;
|
||||
else
|
||||
trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
|
||||
|
||||
IRCR_writew(trizeps_conxs_ircr);
|
||||
local_irq_restore(flags);
|
||||
|
||||
pxa2xx_transceiver_mode(dev, mode);
|
||||
}
|
||||
|
||||
static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
|
||||
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
|
||||
.transceiver_mode = board_irda_mode,
|
||||
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
|
||||
.transceiver_mode = trizeps4_irda_transceiver_mode,
|
||||
.startup = trizeps4_irda_startup,
|
||||
.shutdown = trizeps4_irda_shutdown,
|
||||
};
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* OHCI USB port
|
||||
****************************************************************************/
|
||||
static int trizeps4_ohci_init(struct device *dev)
|
||||
{
|
||||
/* setup Port1 GPIO pin. */
|
||||
pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
|
||||
pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
|
||||
|
||||
/* Set the Power Control Polarity Low and Power Sense
|
||||
Polarity Low to active low. */
|
||||
UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
|
||||
|
|
@ -327,15 +435,9 @@ static int trizeps4_ohci_init(struct device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void trizeps4_ohci_exit(struct device *dev)
|
||||
{
|
||||
;
|
||||
}
|
||||
|
||||
static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
|
||||
.port_mode = PMM_PERPORT_MODE,
|
||||
.init = trizeps4_ohci_init,
|
||||
.exit = trizeps4_ohci_exit,
|
||||
};
|
||||
|
||||
static struct map_desc trizeps4_io_desc[] __initdata = {
|
||||
|
|
@ -372,105 +474,80 @@ static struct map_desc trizeps4_io_desc[] __initdata = {
|
|||
};
|
||||
|
||||
static struct pxafb_mode_info sharp_lcd_mode = {
|
||||
.pixclock = 78000,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.bpp = 8,
|
||||
.hsync_len = 4,
|
||||
.left_margin = 4,
|
||||
.right_margin = 4,
|
||||
.vsync_len = 2,
|
||||
.upper_margin = 0,
|
||||
.lower_margin = 0,
|
||||
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
|
||||
.cmap_greyscale = 0,
|
||||
.pixclock = 78000,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.bpp = 8,
|
||||
.hsync_len = 4,
|
||||
.left_margin = 4,
|
||||
.right_margin = 4,
|
||||
.vsync_len = 2,
|
||||
.upper_margin = 0,
|
||||
.lower_margin = 0,
|
||||
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info sharp_lcd = {
|
||||
.modes = &sharp_lcd_mode,
|
||||
.num_modes = 1,
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
.lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual,
|
||||
.lccr3 = 0x0340ff02,
|
||||
.pxafb_backlight_power = board_backlight_power,
|
||||
.modes = &sharp_lcd_mode,
|
||||
.num_modes = 1,
|
||||
.lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL,
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
.pxafb_backlight_power = board_backlight_power,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info toshiba_lcd_mode = {
|
||||
.pixclock = 39720,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.bpp = 8,
|
||||
.hsync_len = 63,
|
||||
.left_margin = 12,
|
||||
.right_margin = 12,
|
||||
.vsync_len = 4,
|
||||
.upper_margin = 32,
|
||||
.lower_margin = 10,
|
||||
.sync = 0,
|
||||
.cmap_greyscale = 0,
|
||||
.pixclock = 39720,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.bpp = 8,
|
||||
.hsync_len = 63,
|
||||
.left_margin = 12,
|
||||
.right_margin = 12,
|
||||
.vsync_len = 4,
|
||||
.upper_margin = 32,
|
||||
.lower_margin = 10,
|
||||
.sync = 0,
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info toshiba_lcd = {
|
||||
.modes = &toshiba_lcd_mode,
|
||||
.num_modes = 1,
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
.lccr0 = LCCR0_Color | LCCR0_Act,
|
||||
.lccr3 = 0x03400002,
|
||||
.pxafb_backlight_power = board_backlight_power,
|
||||
.modes = &toshiba_lcd_mode,
|
||||
.num_modes = 1,
|
||||
.lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
.pxafb_backlight_power = board_backlight_power,
|
||||
};
|
||||
|
||||
static void __init trizeps4_init(void)
|
||||
{
|
||||
platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config));
|
||||
if (machine_is_trizeps4wl()) {
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config));
|
||||
platform_add_devices(trizeps4wl_devices,
|
||||
ARRAY_SIZE(trizeps4wl_devices));
|
||||
} else {
|
||||
platform_add_devices(trizeps4_devices,
|
||||
ARRAY_SIZE(trizeps4_devices));
|
||||
}
|
||||
|
||||
/* set_pxa_fb_info(&sharp_lcd); */
|
||||
set_pxa_fb_info(&toshiba_lcd);
|
||||
if (0) /* dont know how to determine LCD */
|
||||
set_pxa_fb_info(&sharp_lcd);
|
||||
else
|
||||
set_pxa_fb_info(&toshiba_lcd);
|
||||
|
||||
pxa_set_mci_info(&trizeps4_mci_platform_data);
|
||||
#ifndef STATUS_LEDS_ON_STUART_PINS
|
||||
pxa_set_ficp_info(&trizeps4_ficp_platform_data);
|
||||
#endif
|
||||
pxa_set_ohci_info(&trizeps4_ohci_platform_data);
|
||||
pxa_set_ac97_info(NULL);
|
||||
}
|
||||
pxa_set_i2c_info(NULL);
|
||||
i2c_register_board_info(0, trizeps4_i2c_devices,
|
||||
ARRAY_SIZE(trizeps4_i2c_devices));
|
||||
|
||||
static void __init trizeps4_map_io(void)
|
||||
{
|
||||
pxa_map_io();
|
||||
iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
|
||||
|
||||
/* for DiskOnChip */
|
||||
pxa_gpio_mode(GPIO15_nCS_1_MD);
|
||||
|
||||
/* for off-module PIC on ConXS board */
|
||||
pxa_gpio_mode(GPIO_PIC | GPIO_IN);
|
||||
|
||||
/* UCB1400 irq */
|
||||
pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
|
||||
|
||||
/* for DM9000 LAN */
|
||||
pxa_gpio_mode(GPIO78_nCS_2_MD);
|
||||
pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
|
||||
|
||||
/* for PCMCIA device */
|
||||
pxa_gpio_mode(GPIO_PCD | GPIO_IN);
|
||||
pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
|
||||
|
||||
/* for I2C adapter */
|
||||
pxa_gpio_mode(GPIO117_I2CSCL_MD);
|
||||
pxa_gpio_mode(GPIO118_I2CSDA_MD);
|
||||
|
||||
/* MMC_DET s.o. */
|
||||
pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
|
||||
|
||||
/* whats that for ??? */
|
||||
pxa_gpio_mode(GPIO79_nCS_3_MD);
|
||||
|
||||
#ifdef CONFIG_LEDS
|
||||
pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
|
||||
pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
|
||||
#endif
|
||||
#ifdef CONFIG_MACH_TRIZEPS4_CONXS
|
||||
#ifdef CONFIG_IDE_PXA_CF
|
||||
/* if boot direct from compact flash dont disable power */
|
||||
trizeps_conxs_bcr = 0x0009;
|
||||
|
|
@ -478,18 +555,24 @@ static void __init trizeps4_map_io(void)
|
|||
/* this is the reset value */
|
||||
trizeps_conxs_bcr = 0x00A0;
|
||||
#endif
|
||||
ConXS_BCR = trizeps_conxs_bcr;
|
||||
#endif
|
||||
BCR_writew(trizeps_conxs_bcr);
|
||||
board_backlight_power(1);
|
||||
}
|
||||
|
||||
#warning FIXME - accessing PM registers directly is deprecated
|
||||
PWER = 0x00000002;
|
||||
PFER = 0x00000000;
|
||||
PRER = 0x00000002;
|
||||
PGSR0 = 0x0158C000;
|
||||
PGSR1 = 0x00FF0080;
|
||||
PGSR2 = 0x0001C004;
|
||||
/* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
|
||||
PCFR |= PCFR_OPDE;
|
||||
static void __init trizeps4_map_io(void)
|
||||
{
|
||||
pxa_map_io();
|
||||
iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
|
||||
|
||||
if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) {
|
||||
/* if flash is 16 bit wide its a Trizeps4 WL */
|
||||
__machine_arch_type = MACH_TYPE_TRIZEPS4WL;
|
||||
trizeps4_flash_data[0].width = 2;
|
||||
} else {
|
||||
/* if flash is 32 bit wide its a Trizeps4 */
|
||||
__machine_arch_type = MACH_TYPE_TRIZEPS4;
|
||||
trizeps4_flash_data[0].width = 4;
|
||||
}
|
||||
}
|
||||
|
||||
MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
|
||||
|
|
@ -503,3 +586,13 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
|
|||
.timer = &pxa_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
|
||||
/* MAINTAINER("Jürgen Schindele") */
|
||||
.phys_io = 0x40000000,
|
||||
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
|
||||
.boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
|
||||
.init_machine = trizeps4_init,
|
||||
.map_io = trizeps4_map_io,
|
||||
.init_irq = pxa27x_init_irq,
|
||||
.timer = &pxa_timer,
|
||||
MACHINE_END
|
||||
|
|
|
|||
Loading…
Reference in a new issue