pata_pdc202xx_old: fix data corruption and other problems
Fix wrong "port" calculations in pdc202xx_{configure_piomode,set_dmamode}() They were broken for all configurations except one (master device on primary channel, no other devices) and as a result device settings + PIO/DMA timings were being programmed into the wrong PCI registers. This could result in a large variety of problems including data corruption, hangs etc. (depending on devices used and your luck :-). ap->port_no ap->devno used PCI registers correct PCI registers 0 0 0x60-0x62 0x60-0x62 0 1 0x62-0x64 0x64-0x66 1 0 0x64-0x66 0x68-0x6a 1 1 0x66-0x68 0x6c-0x6e Also forward port recent fixes from drivers/ide pdc202xx_old driver: * fix XFER_MW_DMA0 timings (they were overclocked, use the official ones) * fix bitmasks for clearing bits of register B: - when programming DMA mode bit 0x10 of register B was cleared which resulted in overclocked PIO timing setting (iff PIO0 was used) - when programming PIO mode bits 0x18 weren't cleared so suboptimal timings were used for PIO1-4 if PIO0 was previously set (bit 0x10) and for PIO0/3/4 if PIO1/2 was previously set (bit 0x08) and finally bump driver version. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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8b966dddc2
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63ed71019c
1 changed files with 14 additions and 8 deletions
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@ -2,13 +2,14 @@
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* pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer
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* (C) 2005 Red Hat Inc
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* Alan Cox <alan@redhat.com>
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* (C) 2007 Bartlomiej Zolnierkiewicz
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*
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* Based in part on linux/drivers/ide/pci/pdc202xx_old.c
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*
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* First cut with LBA48/ATAPI
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*
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* TODO:
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* Channel interlock/reset on both required ?
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* Channel interlock/reset on both required
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*/
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#include <linux/kernel.h>
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@ -21,7 +22,7 @@
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#include <linux/libata.h>
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#define DRV_NAME "pata_pdc202xx_old"
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#define DRV_VERSION "0.3.0"
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#define DRV_VERSION "0.4.0"
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/**
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* pdc2024x_pre_reset - probe begin
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@ -76,7 +77,7 @@ static void pdc2026x_error_handler(struct ata_port *ap)
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static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int port = 0x60 + 4 * ap->port_no + 2 * adev->devno;
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int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
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static u16 pio_timing[5] = {
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0x0913, 0x050C , 0x0308, 0x0206, 0x0104
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};
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@ -85,7 +86,7 @@ static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *a
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pci_read_config_byte(pdev, port, &r_ap);
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pci_read_config_byte(pdev, port + 1, &r_bp);
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r_ap &= ~0x3F; /* Preserve ERRDY_EN, SYNC_IN */
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r_bp &= ~0x07;
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r_bp &= ~0x1F;
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r_ap |= (pio_timing[pio] >> 8);
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r_bp |= (pio_timing[pio] & 0xFF);
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@ -123,7 +124,7 @@ static void pdc202xx_set_piomode(struct ata_port *ap, struct ata_device *adev)
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static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int port = 0x60 + 4 * ap->port_no + 2 * adev->devno;
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int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
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static u8 udma_timing[6][2] = {
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{ 0x60, 0x03 }, /* 33 Mhz Clock */
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{ 0x40, 0x02 },
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@ -132,12 +133,17 @@ static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{ 0x20, 0x01 },
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{ 0x20, 0x01 }
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};
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static u8 mdma_timing[3][2] = {
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{ 0x60, 0x03 },
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{ 0x60, 0x04 },
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{ 0xe0, 0x0f },
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};
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u8 r_bp, r_cp;
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pci_read_config_byte(pdev, port + 1, &r_bp);
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pci_read_config_byte(pdev, port + 2, &r_cp);
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r_bp &= ~0xF0;
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r_bp &= ~0xE0;
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r_cp &= ~0x0F;
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if (adev->dma_mode >= XFER_UDMA_0) {
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@ -147,8 +153,8 @@ static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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} else {
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int speed = adev->dma_mode - XFER_MW_DMA_0;
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r_bp |= 0x60;
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r_cp |= (5 - speed);
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r_bp |= mdma_timing[speed][0];
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r_cp |= mdma_timing[speed][1];
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}
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pci_write_config_byte(pdev, port + 1, r_bp);
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pci_write_config_byte(pdev, port + 2, r_cp);
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