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MIPS: JZ4740: register an irq_domain for the interrupt controller

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When probing the interrupt controller, register an IRQ domain such
that the interrupts can be translated by devicetree code & thus used
from devicetree.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Brian Norris <computersforpeace@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/10140/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Paul Burton 2015-05-24 16:11:23 +01:00 committed by Ralf Baechle
parent 69ce4b2288
commit 638c885185
1 changed files with 6 additions and 0 deletions
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6
arch/mips/jz4740/irq.c
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@ -85,6 +85,7 @@ static int __init jz4740_intc_of_init(struct device_node *node,
{ {
struct irq_chip_generic *gc; struct irq_chip_generic *gc;
struct irq_chip_type *ct; struct irq_chip_type *ct;
struct irq_domain *domain;
int parent_irq; int parent_irq;
parent_irq = irq_of_parse_and_map(node, 0); parent_irq = irq_of_parse_and_map(node, 0);
@ -113,6 +114,11 @@ static int __init jz4740_intc_of_init(struct device_node *node,
irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL); irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL);
domain = irq_domain_add_legacy(node, num_chips * 32, JZ4740_IRQ_BASE, 0,
&irq_domain_simple_ops, NULL);
if (!domain)
pr_warn("unable to register IRQ domain\n");
setup_irq(parent_irq, &jz4740_cascade_action); setup_irq(parent_irq, &jz4740_cascade_action);
return 0; return 0;
} }