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[PATCH] hpet-RTC: fix timer config register accesses

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Make sure that the RTC timer is in non-periodic mode; some stupid BIOS might
have initialized it to periodic mode.

Furthermore, don't set the SETVAL bit in the config register.  This wouldn't
have any effect unless the timer was in period mode (which it isn't), and then
the actual timer frequency would be half that of the desired one because
incrementing the comparator in the interrupt handler would be done after the
hardware has already incremented it itself.

Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Acked-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Clemens Ladisch 2005-10-30 15:03:36 -08:00 committed by Linus Torvalds
parent f00c96f313
commit 5f819949ee
2 changed files with 4 additions and 14 deletions
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9
arch/i386/kernel/time_hpet.c
View file

@ -309,7 +309,8 @@ int hpet_rtc_timer_init(void)
local_irq_restore(flags);
cfg = hpet_readl(HPET_T1_CFG);
cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
cfg &= ~HPET_TN_PERIODIC;
cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
hpet_writel(cfg, HPET_T1_CFG);
return 1;
@ -335,12 +336,6 @@ static void hpet_rtc_timer_reinit(void)
cnt = hpet_readl(HPET_T1_CMP);
cnt += hpet_tick*HZ/hpet_rtc_int_freq;
hpet_writel(cnt, HPET_T1_CMP);
cfg = hpet_readl(HPET_T1_CFG);
cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
hpet_writel(cfg, HPET_T1_CFG);
return;
}
/*

9
arch/x86_64/kernel/time.c
View file

@ -1128,7 +1128,8 @@ int hpet_rtc_timer_init(void)
local_irq_restore(flags);
cfg = hpet_readl(HPET_T1_CFG);
cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
cfg &= ~HPET_TN_PERIODIC;
cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
hpet_writel(cfg, HPET_T1_CFG);
return 1;
@ -1154,12 +1155,6 @@ static void hpet_rtc_timer_reinit(void)
cnt = hpet_readl(HPET_T1_CMP);
cnt += hpet_tick*HZ/hpet_rtc_int_freq;
hpet_writel(cnt, HPET_T1_CMP);
cfg = hpet_readl(HPET_T1_CFG);
cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
hpet_writel(cfg, HPET_T1_CFG);
return;
}
/*