[PATCH] powerpc: Split out PCI address cache to its own file
25-pci-address-cache.patch The core EEH file is rather large. This patch splits out a self-contained chunk of it into its own file. This is the chunk that performes the caching and lookup of pci devices based on the i/o addresses of thier resoures. This code is almos architecture-independent and could be used by any system that wanted to find a pci device based only on the i/o address used by the device. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> (cherry picked from b0b291d59906d4a9a89ed9e34d9fd684c7188924 commit)
This commit is contained in:
Linas Vepstas
Paul Mackerras
parent
77bd741561
commit
5d5a0936b3
4 changed files with 328 additions and 294 deletions
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@ -4,7 +4,7 @@ obj-$(CONFIG_SMP) += smp.o
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obj-$(CONFIG_IBMVIO) += vio.o
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obj-$(CONFIG_IBMVIO) += vio.o
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obj-$(CONFIG_XICS) += xics.o
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obj-$(CONFIG_XICS) += xics.o
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obj-$(CONFIG_SCANLOG) += scanlog.o
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obj-$(CONFIG_SCANLOG) += scanlog.o
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obj-$(CONFIG_EEH) += eeh.o eeh_driver.o eeh_event.o
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obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o
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obj-$(CONFIG_HVC_CONSOLE) += hvconsole.o
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obj-$(CONFIG_HVC_CONSOLE) += hvconsole.o
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obj-$(CONFIG_HVCS) += hvcserver.o
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obj-$(CONFIG_HVCS) += hvcserver.o
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@ -76,9 +76,6 @@
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*/
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*/
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#define EEH_MAX_FAILS 100000
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#define EEH_MAX_FAILS 100000
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/* Misc forward declaraions */
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static void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn);
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/* RTAS tokens */
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/* RTAS tokens */
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static int ibm_set_eeh_option;
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static int ibm_set_eeh_option;
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static int ibm_set_slot_reset;
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static int ibm_set_slot_reset;
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@ -107,296 +104,8 @@ static DEFINE_PER_CPU(unsigned long, false_positives);
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static DEFINE_PER_CPU(unsigned long, ignored_failures);
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static DEFINE_PER_CPU(unsigned long, ignored_failures);
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static DEFINE_PER_CPU(unsigned long, slot_resets);
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static DEFINE_PER_CPU(unsigned long, slot_resets);
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/**
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* The pci address cache subsystem. This subsystem places
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* PCI device address resources into a red-black tree, sorted
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* according to the address range, so that given only an i/o
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* address, the corresponding PCI device can be **quickly**
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* found. It is safe to perform an address lookup in an interrupt
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* context; this ability is an important feature.
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*
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* Currently, the only customer of this code is the EEH subsystem;
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* thus, this code has been somewhat tailored to suit EEH better.
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* In particular, the cache does *not* hold the addresses of devices
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* for which EEH is not enabled.
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*
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* (Implementation Note: The RB tree seems to be better/faster
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* than any hash algo I could think of for this problem, even
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* with the penalty of slow pointer chases for d-cache misses).
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*/
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struct pci_io_addr_range
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{
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struct rb_node rb_node;
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unsigned long addr_lo;
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unsigned long addr_hi;
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struct pci_dev *pcidev;
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unsigned int flags;
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};
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static struct pci_io_addr_cache
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{
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struct rb_root rb_root;
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spinlock_t piar_lock;
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} pci_io_addr_cache_root;
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static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
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{
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struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
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while (n) {
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struct pci_io_addr_range *piar;
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piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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if (addr < piar->addr_lo) {
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n = n->rb_left;
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} else {
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if (addr > piar->addr_hi) {
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n = n->rb_right;
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} else {
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pci_dev_get(piar->pcidev);
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return piar->pcidev;
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}
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}
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}
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return NULL;
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}
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/**
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* pci_get_device_by_addr - Get device, given only address
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* @addr: mmio (PIO) phys address or i/o port number
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*
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* Given an mmio phys address, or a port number, find a pci device
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* that implements this address. Be sure to pci_dev_put the device
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* when finished. I/O port numbers are assumed to be offset
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* from zero (that is, they do *not* have pci_io_addr added in).
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* It is safe to call this function within an interrupt.
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*/
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static struct pci_dev *pci_get_device_by_addr(unsigned long addr)
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{
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struct pci_dev *dev;
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unsigned long flags;
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spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
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dev = __pci_get_device_by_addr(addr);
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spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
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return dev;
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}
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#ifdef DEBUG
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/*
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* Handy-dandy debug print routine, does nothing more
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* than print out the contents of our addr cache.
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*/
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static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
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{
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struct rb_node *n;
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int cnt = 0;
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n = rb_first(&cache->rb_root);
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while (n) {
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struct pci_io_addr_range *piar;
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piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
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(piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
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piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
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cnt++;
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n = rb_next(n);
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}
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}
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#endif
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/* Insert address range into the rb tree. */
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static struct pci_io_addr_range *
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pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
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unsigned long ahi, unsigned int flags)
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{
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struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
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struct rb_node *parent = NULL;
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struct pci_io_addr_range *piar;
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/* Walk tree, find a place to insert into tree */
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while (*p) {
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parent = *p;
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piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
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if (ahi < piar->addr_lo) {
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p = &parent->rb_left;
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} else if (alo > piar->addr_hi) {
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p = &parent->rb_right;
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} else {
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if (dev != piar->pcidev ||
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alo != piar->addr_lo || ahi != piar->addr_hi) {
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printk(KERN_WARNING "PIAR: overlapping address range\n");
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}
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return piar;
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}
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}
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piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
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if (!piar)
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return NULL;
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piar->addr_lo = alo;
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piar->addr_hi = ahi;
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piar->pcidev = dev;
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piar->flags = flags;
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#ifdef DEBUG
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printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
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alo, ahi, pci_name (dev));
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#endif
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rb_link_node(&piar->rb_node, parent, p);
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rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
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return piar;
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}
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static void __pci_addr_cache_insert_device(struct pci_dev *dev)
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{
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struct device_node *dn;
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struct pci_dn *pdn;
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int i;
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int inserted = 0;
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dn = pci_device_to_OF_node(dev);
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if (!dn) {
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printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
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return;
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}
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/* Skip any devices for which EEH is not enabled. */
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pdn = PCI_DN(dn);
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if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
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pdn->eeh_mode & EEH_MODE_NOCHECK) {
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#ifdef DEBUG
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printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
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pci_name(dev), pdn->node->full_name);
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#endif
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return;
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}
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/* The cache holds a reference to the device... */
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pci_dev_get(dev);
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/* Walk resources on this device, poke them into the tree */
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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unsigned long start = pci_resource_start(dev,i);
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unsigned long end = pci_resource_end(dev,i);
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unsigned int flags = pci_resource_flags(dev,i);
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/* We are interested only bus addresses, not dma or other stuff */
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if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
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continue;
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if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
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continue;
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pci_addr_cache_insert(dev, start, end, flags);
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inserted = 1;
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}
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/* If there was nothing to add, the cache has no reference... */
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if (!inserted)
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pci_dev_put(dev);
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}
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/**
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* pci_addr_cache_insert_device - Add a device to the address cache
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* @dev: PCI device whose I/O addresses we are interested in.
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*
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* In order to support the fast lookup of devices based on addresses,
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* we maintain a cache of devices that can be quickly searched.
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* This routine adds a device to that cache.
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*/
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static void pci_addr_cache_insert_device(struct pci_dev *dev)
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{
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unsigned long flags;
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spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
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__pci_addr_cache_insert_device(dev);
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spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
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}
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static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
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{
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struct rb_node *n;
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int removed = 0;
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restart:
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n = rb_first(&pci_io_addr_cache_root.rb_root);
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while (n) {
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struct pci_io_addr_range *piar;
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piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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if (piar->pcidev == dev) {
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rb_erase(n, &pci_io_addr_cache_root.rb_root);
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removed = 1;
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kfree(piar);
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goto restart;
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}
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n = rb_next(n);
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}
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/* The cache no longer holds its reference to this device... */
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if (removed)
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pci_dev_put(dev);
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}
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/**
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* pci_addr_cache_remove_device - remove pci device from addr cache
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* @dev: device to remove
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*
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* Remove a device from the addr-cache tree.
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* This is potentially expensive, since it will walk
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* the tree multiple times (once per resource).
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* But so what; device removal doesn't need to be that fast.
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*/
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static void pci_addr_cache_remove_device(struct pci_dev *dev)
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{
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unsigned long flags;
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spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
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__pci_addr_cache_remove_device(dev);
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spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
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}
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/**
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* pci_addr_cache_build - Build a cache of I/O addresses
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*
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* Build a cache of pci i/o addresses. This cache will be used to
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* find the pci device that corresponds to a given address.
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* This routine scans all pci busses to build the cache.
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* Must be run late in boot process, after the pci controllers
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* have been scaned for devices (after all device resources are known).
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*/
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void __init pci_addr_cache_build(void)
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{
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struct device_node *dn;
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struct pci_dev *dev = NULL;
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if (!eeh_subsystem_enabled)
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return;
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spin_lock_init(&pci_io_addr_cache_root.piar_lock);
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while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
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/* Ignore PCI bridges ( XXX why ??) */
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if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) {
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continue;
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}
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pci_addr_cache_insert_device(dev);
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/* Save the BAR's; firmware doesn't restore these after EEH reset */
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dn = pci_device_to_OF_node(dev);
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eeh_save_bars(dev, PCI_DN(dn));
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}
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#ifdef DEBUG
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/* Verify tree built up above, echo back the list of addrs. */
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pci_addr_cache_print(&pci_io_addr_cache_root);
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#endif
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}
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/* --------------------------------------------------------------- */
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/* --------------------------------------------------------------- */
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/* Above lies the PCI Address Cache. Below lies the EEH event infrastructure */
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/* Below lies the EEH event infrastructure */
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void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
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void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
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{
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{
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@ -880,7 +589,7 @@ void eeh_restore_bars(struct pci_dn *pdn)
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* PCI devices are added individuallly; but, for the restore,
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* PCI devices are added individuallly; but, for the restore,
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* an entire slot is reset at a time.
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* an entire slot is reset at a time.
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*/
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*/
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static void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn)
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void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn)
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{
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{
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int i;
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int i;
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317
arch/powerpc/platforms/pseries/eeh_cache.c
Normal file
317
arch/powerpc/platforms/pseries/eeh_cache.c
Normal file
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@ -0,0 +1,317 @@
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/*
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* eeh_cache.c
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* PCI address cache; allows the lookup of PCI devices based on I/O address
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*
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* Copyright (C) 2004 Linas Vepstas <linas@austin.ibm.com> IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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||||||
|
#include <linux/list.h>
|
||||||
|
#include <linux/pci.h>
|
||||||
|
#include <linux/rbtree.h>
|
||||||
|
#include <linux/spinlock.h>
|
||||||
|
#include <asm/atomic.h>
|
||||||
|
#include <asm/pci-bridge.h>
|
||||||
|
#include <asm/ppc-pci.h>
|
||||||
|
#include <asm/systemcfg.h>
|
||||||
|
|
||||||
|
#undef DEBUG
|
||||||
|
|
||||||
|
/**
|
||||||
|
* The pci address cache subsystem. This subsystem places
|
||||||
|
* PCI device address resources into a red-black tree, sorted
|
||||||
|
* according to the address range, so that given only an i/o
|
||||||
|
* address, the corresponding PCI device can be **quickly**
|
||||||
|
* found. It is safe to perform an address lookup in an interrupt
|
||||||
|
* context; this ability is an important feature.
|
||||||
|
*
|
||||||
|
* Currently, the only customer of this code is the EEH subsystem;
|
||||||
|
* thus, this code has been somewhat tailored to suit EEH better.
|
||||||
|
* In particular, the cache does *not* hold the addresses of devices
|
||||||
|
* for which EEH is not enabled.
|
||||||
|
*
|
||||||
|
* (Implementation Note: The RB tree seems to be better/faster
|
||||||
|
* than any hash algo I could think of for this problem, even
|
||||||
|
* with the penalty of slow pointer chases for d-cache misses).
|
||||||
|
*/
|
||||||
|
struct pci_io_addr_range
|
||||||
|
{
|
||||||
|
struct rb_node rb_node;
|
||||||
|
unsigned long addr_lo;
|
||||||
|
unsigned long addr_hi;
|
||||||
|
struct pci_dev *pcidev;
|
||||||
|
unsigned int flags;
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct pci_io_addr_cache
|
||||||
|
{
|
||||||
|
struct rb_root rb_root;
|
||||||
|
spinlock_t piar_lock;
|
||||||
|
} pci_io_addr_cache_root;
|
||||||
|
|
||||||
|
static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
|
||||||
|
{
|
||||||
|
struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
|
||||||
|
|
||||||
|
while (n) {
|
||||||
|
struct pci_io_addr_range *piar;
|
||||||
|
piar = rb_entry(n, struct pci_io_addr_range, rb_node);
|
||||||
|
|
||||||
|
if (addr < piar->addr_lo) {
|
||||||
|
n = n->rb_left;
|
||||||
|
} else {
|
||||||
|
if (addr > piar->addr_hi) {
|
||||||
|
n = n->rb_right;
|
||||||
|
} else {
|
||||||
|
pci_dev_get(piar->pcidev);
|
||||||
|
return piar->pcidev;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* pci_get_device_by_addr - Get device, given only address
|
||||||
|
* @addr: mmio (PIO) phys address or i/o port number
|
||||||
|
*
|
||||||
|
* Given an mmio phys address, or a port number, find a pci device
|
||||||
|
* that implements this address. Be sure to pci_dev_put the device
|
||||||
|
* when finished. I/O port numbers are assumed to be offset
|
||||||
|
* from zero (that is, they do *not* have pci_io_addr added in).
|
||||||
|
* It is safe to call this function within an interrupt.
|
||||||
|
*/
|
||||||
|
struct pci_dev *pci_get_device_by_addr(unsigned long addr)
|
||||||
|
{
|
||||||
|
struct pci_dev *dev;
|
||||||
|
unsigned long flags;
|
||||||
|
|
||||||
|
spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
|
||||||
|
dev = __pci_get_device_by_addr(addr);
|
||||||
|
spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
|
||||||
|
return dev;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef DEBUG
|
||||||
|
/*
|
||||||
|
* Handy-dandy debug print routine, does nothing more
|
||||||
|
* than print out the contents of our addr cache.
|
||||||
|
*/
|
||||||
|
static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
|
||||||
|
{
|
||||||
|
struct rb_node *n;
|
||||||
|
int cnt = 0;
|
||||||
|
|
||||||
|
n = rb_first(&cache->rb_root);
|
||||||
|
while (n) {
|
||||||
|
struct pci_io_addr_range *piar;
|
||||||
|
piar = rb_entry(n, struct pci_io_addr_range, rb_node);
|
||||||
|
printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
|
||||||
|
(piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
|
||||||
|
piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
|
||||||
|
cnt++;
|
||||||
|
n = rb_next(n);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Insert address range into the rb tree. */
|
||||||
|
static struct pci_io_addr_range *
|
||||||
|
pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
|
||||||
|
unsigned long ahi, unsigned int flags)
|
||||||
|
{
|
||||||
|
struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
|
||||||
|
struct rb_node *parent = NULL;
|
||||||
|
struct pci_io_addr_range *piar;
|
||||||
|
|
||||||
|
/* Walk tree, find a place to insert into tree */
|
||||||
|
while (*p) {
|
||||||
|
parent = *p;
|
||||||
|
piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
|
||||||
|
if (ahi < piar->addr_lo) {
|
||||||
|
p = &parent->rb_left;
|
||||||
|
} else if (alo > piar->addr_hi) {
|
||||||
|
p = &parent->rb_right;
|
||||||
|
} else {
|
||||||
|
if (dev != piar->pcidev ||
|
||||||
|
alo != piar->addr_lo || ahi != piar->addr_hi) {
|
||||||
|
printk(KERN_WARNING "PIAR: overlapping address range\n");
|
||||||
|
}
|
||||||
|
return piar;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
|
||||||
|
if (!piar)
|
||||||
|
return NULL;
|
||||||
|
|
||||||
|
piar->addr_lo = alo;
|
||||||
|
piar->addr_hi = ahi;
|
||||||
|
piar->pcidev = dev;
|
||||||
|
piar->flags = flags;
|
||||||
|
|
||||||
|
#ifdef DEBUG
|
||||||
|
printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
|
||||||
|
alo, ahi, pci_name (dev));
|
||||||
|
#endif
|
||||||
|
|
||||||
|
rb_link_node(&piar->rb_node, parent, p);
|
||||||
|
rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
|
||||||
|
|
||||||
|
return piar;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __pci_addr_cache_insert_device(struct pci_dev *dev)
|
||||||
|
{
|
||||||
|
struct device_node *dn;
|
||||||
|
struct pci_dn *pdn;
|
||||||
|
int i;
|
||||||
|
int inserted = 0;
|
||||||
|
|
||||||
|
dn = pci_device_to_OF_node(dev);
|
||||||
|
if (!dn) {
|
||||||
|
printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Skip any devices for which EEH is not enabled. */
|
||||||
|
pdn = PCI_DN(dn);
|
||||||
|
if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
|
||||||
|
pdn->eeh_mode & EEH_MODE_NOCHECK) {
|
||||||
|
#ifdef DEBUG
|
||||||
|
printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
|
||||||
|
pci_name(dev), pdn->node->full_name);
|
||||||
|
#endif
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* The cache holds a reference to the device... */
|
||||||
|
pci_dev_get(dev);
|
||||||
|
|
||||||
|
/* Walk resources on this device, poke them into the tree */
|
||||||
|
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
|
||||||
|
unsigned long start = pci_resource_start(dev,i);
|
||||||
|
unsigned long end = pci_resource_end(dev,i);
|
||||||
|
unsigned int flags = pci_resource_flags(dev,i);
|
||||||
|
|
||||||
|
/* We are interested only bus addresses, not dma or other stuff */
|
||||||
|
if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
|
||||||
|
continue;
|
||||||
|
if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
|
||||||
|
continue;
|
||||||
|
pci_addr_cache_insert(dev, start, end, flags);
|
||||||
|
inserted = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* If there was nothing to add, the cache has no reference... */
|
||||||
|
if (!inserted)
|
||||||
|
pci_dev_put(dev);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* pci_addr_cache_insert_device - Add a device to the address cache
|
||||||
|
* @dev: PCI device whose I/O addresses we are interested in.
|
||||||
|
*
|
||||||
|
* In order to support the fast lookup of devices based on addresses,
|
||||||
|
* we maintain a cache of devices that can be quickly searched.
|
||||||
|
* This routine adds a device to that cache.
|
||||||
|
*/
|
||||||
|
void pci_addr_cache_insert_device(struct pci_dev *dev)
|
||||||
|
{
|
||||||
|
unsigned long flags;
|
||||||
|
|
||||||
|
spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
|
||||||
|
__pci_addr_cache_insert_device(dev);
|
||||||
|
spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
|
||||||
|
{
|
||||||
|
struct rb_node *n;
|
||||||
|
int removed = 0;
|
||||||
|
|
||||||
|
restart:
|
||||||
|
n = rb_first(&pci_io_addr_cache_root.rb_root);
|
||||||
|
while (n) {
|
||||||
|
struct pci_io_addr_range *piar;
|
||||||
|
piar = rb_entry(n, struct pci_io_addr_range, rb_node);
|
||||||
|
|
||||||
|
if (piar->pcidev == dev) {
|
||||||
|
rb_erase(n, &pci_io_addr_cache_root.rb_root);
|
||||||
|
removed = 1;
|
||||||
|
kfree(piar);
|
||||||
|
goto restart;
|
||||||
|
}
|
||||||
|
n = rb_next(n);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* The cache no longer holds its reference to this device... */
|
||||||
|
if (removed)
|
||||||
|
pci_dev_put(dev);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* pci_addr_cache_remove_device - remove pci device from addr cache
|
||||||
|
* @dev: device to remove
|
||||||
|
*
|
||||||
|
* Remove a device from the addr-cache tree.
|
||||||
|
* This is potentially expensive, since it will walk
|
||||||
|
* the tree multiple times (once per resource).
|
||||||
|
* But so what; device removal doesn't need to be that fast.
|
||||||
|
*/
|
||||||
|
void pci_addr_cache_remove_device(struct pci_dev *dev)
|
||||||
|
{
|
||||||
|
unsigned long flags;
|
||||||
|
|
||||||
|
spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
|
||||||
|
__pci_addr_cache_remove_device(dev);
|
||||||
|
spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* pci_addr_cache_build - Build a cache of I/O addresses
|
||||||
|
*
|
||||||
|
* Build a cache of pci i/o addresses. This cache will be used to
|
||||||
|
* find the pci device that corresponds to a given address.
|
||||||
|
* This routine scans all pci busses to build the cache.
|
||||||
|
* Must be run late in boot process, after the pci controllers
|
||||||
|
* have been scaned for devices (after all device resources are known).
|
||||||
|
*/
|
||||||
|
void __init pci_addr_cache_build(void)
|
||||||
|
{
|
||||||
|
struct device_node *dn;
|
||||||
|
struct pci_dev *dev = NULL;
|
||||||
|
|
||||||
|
spin_lock_init(&pci_io_addr_cache_root.piar_lock);
|
||||||
|
|
||||||
|
while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
|
||||||
|
/* Ignore PCI bridges */
|
||||||
|
if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
pci_addr_cache_insert_device(dev);
|
||||||
|
|
||||||
|
/* Save the BAR's; firmware doesn't restore these after EEH reset */
|
||||||
|
dn = pci_device_to_OF_node(dev);
|
||||||
|
eeh_save_bars(dev, PCI_DN(dn));
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef DEBUG
|
||||||
|
/* Verify tree built up above, echo back the list of addrs. */
|
||||||
|
pci_addr_cache_print(&pci_io_addr_cache_root);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -52,6 +52,14 @@ extern unsigned long pci_probe_only;
|
||||||
|
|
||||||
/* ---- EEH internal-use-only related routines ---- */
|
/* ---- EEH internal-use-only related routines ---- */
|
||||||
#ifdef CONFIG_EEH
|
#ifdef CONFIG_EEH
|
||||||
|
|
||||||
|
void pci_addr_cache_insert_device(struct pci_dev *dev);
|
||||||
|
void pci_addr_cache_remove_device(struct pci_dev *dev);
|
||||||
|
void pci_addr_cache_build(void);
|
||||||
|
struct pci_dev *pci_get_device_by_addr(unsigned long addr);
|
||||||
|
|
||||||
|
void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* eeh_slot_error_detail -- record and EEH error condition to the log
|
* eeh_slot_error_detail -- record and EEH error condition to the log
|
||||||
* @severity: 1 if temporary, 2 if permanent failure.
|
* @severity: 1 if temporary, 2 if permanent failure.
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue