[ARM] Move IRQ enable after coprocessor number decode
Allow the individual coprocessor handlers to decide when to enable interrupts, rather than unconditionally enabling them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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f78f104368
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5d25ac038a
2 changed files with 2 additions and 1 deletions
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@ -484,7 +484,6 @@ call_fpe:
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movcss r7, r5, lsr #(TIF_USING_IWMMXT + 1)
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movcss r7, r5, lsr #(TIF_USING_IWMMXT + 1)
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bcs iwmmxt_task_enable
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bcs iwmmxt_task_enable
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#endif
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#endif
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enable_irq
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add pc, pc, r8, lsr #6
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add pc, pc, r8, lsr #6
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mov r0, r0
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mov r0, r0
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@ -511,6 +510,7 @@ call_fpe:
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mov pc, lr @ CP#15 (Control)
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mov pc, lr @ CP#15 (Control)
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do_fpe:
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do_fpe:
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enable_irq
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ldr r4, .LCfp
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ldr r4, .LCfp
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add r10, r10, #TI_FPSTATE @ r10 = workspace
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add r10, r10, #TI_FPSTATE @ r10 = workspace
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ldr pc, [r4] @ Call FP module USR entry point
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ldr pc, [r4] @ Call FP module USR entry point
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@ -22,6 +22,7 @@
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.globl do_vfp
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.globl do_vfp
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do_vfp:
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do_vfp:
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enable_irq
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ldr r4, .LCvfp
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ldr r4, .LCvfp
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add r10, r10, #TI_VFPSTATE @ r10 = workspace
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add r10, r10, #TI_VFPSTATE @ r10 = workspace
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ldr pc, [r4] @ call VFP entry point
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ldr pc, [r4] @ call VFP entry point
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