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Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6

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* 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6:
  [PATCH] x86-64: increase PHB1 split transaction timeout
  [PATCH] x86-64: Fix C3 timer test
This commit is contained in:
Linus Torvalds 2006-10-21 16:52:40 -07:00
commit 5cfc35cf79
2 changed files with 44 additions and 2 deletions
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44
arch/x86_64/kernel/pci-calgary.c
View file

@ -52,7 +52,8 @@
#define ONE_BASED_CHASSIS_NUM 1
/* register offsets inside the host bridge space */
#define PHB_CSR_OFFSET 0x0110
#define CALGARY_CONFIG_REG 0x0108
#define PHB_CSR_OFFSET 0x0110 /* Channel Status */
#define PHB_PLSSR_OFFSET 0x0120
#define PHB_CONFIG_RW_OFFSET 0x0160
#define PHB_IOBASE_BAR_LOW 0x0170
@ -83,6 +84,8 @@
#define TAR_VALID 0x0000000000000008UL
/* CSR (Channel/DMA Status Register) */
#define CSR_AGENT_MASK 0xffe0ffff
/* CCR (Calgary Configuration Register) */
#define CCR_2SEC_TIMEOUT 0x000000000000000EUL
#define MAX_NUM_OF_PHBS 8 /* how many PHBs in total? */
#define MAX_NUM_CHASSIS 8 /* max number of chassis */
@ -732,6 +735,38 @@ static void calgary_watchdog(unsigned long data)
}
}
static void __init calgary_increase_split_completion_timeout(void __iomem *bbar,
unsigned char busnum)
{
u64 val64;
void __iomem *target;
unsigned long phb_shift = -1;
u64 mask;
switch (busno_to_phbid(busnum)) {
case 0: phb_shift = (63 - 19);
break;
case 1: phb_shift = (63 - 23);
break;
case 2: phb_shift = (63 - 27);
break;
case 3: phb_shift = (63 - 35);
break;
default:
BUG_ON(busno_to_phbid(busnum));
}
target = calgary_reg(bbar, CALGARY_CONFIG_REG);
val64 = be64_to_cpu(readq(target));
/* zero out this PHB's timer bits */
mask = ~(0xFUL << phb_shift);
val64 &= mask;
val64 |= (CCR_2SEC_TIMEOUT << phb_shift);
writeq(cpu_to_be64(val64), target);
readq(target); /* flush */
}
static void __init calgary_enable_translation(struct pci_dev *dev)
{
u32 val32;
@ -756,6 +791,13 @@ static void __init calgary_enable_translation(struct pci_dev *dev)
writel(cpu_to_be32(val32), target);
readl(target); /* flush */
/*
* Give split completion a longer timeout on bus 1 for aic94xx
* http://bugzilla.kernel.org/show_bug.cgi?id=7180
*/
if (busnum == 1)
calgary_increase_split_completion_timeout(bbar, busnum);
init_timer(&tbl->watchdog_timer);
tbl->watchdog_timer.function = &calgary_watchdog;
tbl->watchdog_timer.data = (unsigned long)dev;

2
arch/x86_64/kernel/time.c
View file

@ -948,7 +948,7 @@ __cpuinit int unsynchronized_tsc(void)
if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
#ifdef CONFIG_ACPI
/* But TSC doesn't tick in C3 so don't use it there */
if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100)
if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 1000)
return 1;
#endif
return 0;