avr32: Add MIMC200 board support
Please consider the following patch which adds support for a new AVR32 based board. The board is closely based on Atmel's NGW100 reference board, but has an extra 8MByte FLASH and 128KByte FRAM. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This commit is contained in:
Mark Jackson
Haavard Skinnemoen
parent
198f29358a
commit
5b50c166b7
6 changed files with 466 additions and 0 deletions
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@ -123,6 +123,10 @@ config BOARD_ATNGW100
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config BOARD_FAVR_32
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bool "Favr-32 LCD-board"
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select CPU_AT32AP7000
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config BOARD_MIMC200
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bool "MIMC200 CPU board"
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select CPU_AT32AP7000
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endchoice
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source "arch/avr32/boards/atstk1000/Kconfig"
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@ -34,6 +34,7 @@ core-y += $(machdirs)
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core-$(CONFIG_BOARD_ATSTK1000) += arch/avr32/boards/atstk1000/
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core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/
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core-$(CONFIG_BOARD_FAVR_32) += arch/avr32/boards/favr-32/
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core-$(CONFIG_BOARD_MIMC200) += arch/avr32/boards/mimc200/
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core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
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core-y += arch/avr32/kernel/
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core-y += arch/avr32/mm/
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1
arch/avr32/boards/mimc200/Makefile
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1
arch/avr32/boards/mimc200/Makefile
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@ -0,0 +1 @@
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obj-y += setup.o flash.o fram.o
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143
arch/avr32/boards/mimc200/flash.c
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143
arch/avr32/boards/mimc200/flash.c
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@ -0,0 +1,143 @@
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/*
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* MIMC200 board-specific flash initialization
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*
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* Copyright (C) 2008 Mercury IMC Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <mach/smc.h>
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static struct smc_timing flash_timing __initdata = {
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.ncs_read_setup = 0,
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.nrd_setup = 15,
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.ncs_write_setup = 0,
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.nwe_setup = 0,
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.ncs_read_pulse = 115,
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.nrd_pulse = 110,
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.ncs_write_pulse = 60,
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.nwe_pulse = 60,
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.read_cycle = 115,
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.write_cycle = 100,
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};
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static struct smc_config flash_config __initdata = {
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.bus_width = 2,
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.nrd_controlled = 1,
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.nwe_controlled = 1,
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.byte_write = 1,
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};
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/* system flash definition */
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static struct mtd_partition flash_parts_system[] = {
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{
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.name = "u-boot",
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.offset = 0x00000000,
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.size = 0x00020000, /* 128 KiB */
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "root",
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.offset = 0x00020000,
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.size = 0x007c0000,
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},
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{
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.name = "splash",
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.offset = 0x007e0000,
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.size = 0x00010000, /* 64KiB */
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},
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{
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.name = "env",
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.offset = 0x007f0000,
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.size = 0x00010000,
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.mask_flags = MTD_WRITEABLE,
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},
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};
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static struct physmap_flash_data flash_system = {
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.width = 2,
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.nr_parts = ARRAY_SIZE(flash_parts_system),
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.parts = flash_parts_system,
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};
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static struct resource flash_resource_system = {
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.start = 0x00000000,
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.end = 0x007fffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device flash_device_system = {
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.name = "physmap-flash",
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.id = 0,
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.resource = &flash_resource_system,
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.num_resources = 1,
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.dev = {
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.platform_data = &flash_system,
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},
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};
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/* data flash definition */
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static struct mtd_partition flash_parts_data[] = {
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{
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.name = "data",
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.offset = 0x00000000,
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.size = 0x00800000,
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},
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};
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static struct physmap_flash_data flash_data = {
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.width = 2,
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.nr_parts = ARRAY_SIZE(flash_parts_data),
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.parts = flash_parts_data,
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};
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static struct resource flash_resource_data = {
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.start = 0x08000000,
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.end = 0x087fffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device flash_device_data = {
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.name = "physmap-flash",
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.id = 1,
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.resource = &flash_resource_data,
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.num_resources = 1,
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.dev = {
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.platform_data = &flash_data,
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},
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};
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/* This needs to be called after the SMC has been initialized */
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static int __init mimc200_flash_init(void)
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{
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int ret;
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smc_set_timing(&flash_config, &flash_timing);
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ret = smc_set_configuration(0, &flash_config);
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if (ret < 0) {
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printk(KERN_ERR "mimc200: failed to set 'System' NOR flash timing\n");
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return ret;
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}
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ret = smc_set_configuration(1, &flash_config);
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if (ret < 0) {
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printk(KERN_ERR "mimc200: failed to set 'Data' NOR flash timing\n");
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return ret;
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}
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platform_device_register(&flash_device_system);
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platform_device_register(&flash_device_data);
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return 0;
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}
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device_initcall(mimc200_flash_init);
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80
arch/avr32/boards/mimc200/fram.c
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80
arch/avr32/boards/mimc200/fram.c
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@ -0,0 +1,80 @@
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/*
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* FRAM driver for MIMC200 board
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*
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* Copyright 2008 Mark Jackson <mpfj@mimc.co.uk>
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*
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* This module adds *very* simply support for the system's FRAM device.
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* At the moment, this is hard-coded to the MIMC200 platform, and only
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* supports mmap().
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*/
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#define FRAM_VERSION "1.0"
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#include <linux/miscdevice.h>
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#include <linux/proc_fs.h>
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#include <linux/mm.h>
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#include <linux/io.h>
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#define FRAM_BASE 0xac000000
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#define FRAM_SIZE 0x20000
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/*
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* The are the file operation function for user access to /dev/fram
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*/
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static int fram_mmap(struct file *filp, struct vm_area_struct *vma)
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{
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int ret;
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ret = remap_pfn_range(vma,
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vma->vm_start,
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virt_to_phys((void *)((unsigned long)FRAM_BASE)) >> PAGE_SHIFT,
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vma->vm_end-vma->vm_start,
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PAGE_SHARED);
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if (ret != 0)
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return -EAGAIN;
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return 0;
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}
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static const struct file_operations fram_fops = {
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.owner = THIS_MODULE,
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.mmap = fram_mmap,
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};
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#define FRAM_MINOR 0
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static struct miscdevice fram_dev = {
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FRAM_MINOR,
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"fram",
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&fram_fops
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};
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static int __init
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fram_init(void)
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{
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int ret;
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ret = misc_register(&fram_dev);
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if (ret) {
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printk(KERN_ERR "fram: can't misc_register on minor=%d\n",
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FRAM_MINOR);
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return ret;
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}
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printk(KERN_INFO "FRAM memory driver v" FRAM_VERSION "\n");
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return 0;
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}
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static void __exit
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fram_cleanup_module(void)
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{
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misc_deregister(&fram_dev);
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}
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module_init(fram_init);
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module_exit(fram_cleanup_module);
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(FRAM_MINOR);
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237
arch/avr32/boards/mimc200/setup.c
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237
arch/avr32/boards/mimc200/setup.c
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@ -0,0 +1,237 @@
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/*
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* Board-specific setup code for the MIMC200
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*
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* Copyright (C) 2008 Mercury IMC Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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extern struct atmel_lcdfb_info mimc200_lcdc_data;
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#include <linux/clk.h>
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#include <linux/etherdevice.h>
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#include <linux/i2c-gpio.h>
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <linux/leds.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/eeprom.h>
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#include <video/atmel_lcdc.h>
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#include <linux/fb.h>
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#include <asm/atmel-mci.h>
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#include <linux/io.h>
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#include <asm/setup.h>
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#include <mach/at32ap700x.h>
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#include <mach/board.h>
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#include <mach/init.h>
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#include <mach/portmux.h>
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/* Oscillator frequencies. These are board-specific */
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unsigned long at32_board_osc_rates[3] = {
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[0] = 32768, /* 32.768 kHz on RTC osc */
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[1] = 10000000, /* 10 MHz on osc0 */
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[2] = 12000000, /* 12 MHz on osc1 */
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};
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/* Initialized by bootloader-specific startup code. */
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struct tag *bootloader_tags __initdata;
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static struct fb_videomode __initdata tx14d14_modes[] = {
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{
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.name = "640x480 @ 60",
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.refresh = 60,
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.xres = 640, .yres = 480,
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.pixclock = KHZ2PICOS(11666),
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.left_margin = 80, .right_margin = 1,
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.upper_margin = 13, .lower_margin = 2,
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.hsync_len = 64, .vsync_len = 1,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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};
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static struct fb_monspecs __initdata mimc200_default_monspecs = {
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.manufacturer = "HIT",
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.monitor = "TX14D14VM1BAB",
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.modedb = tx14d14_modes,
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.modedb_len = ARRAY_SIZE(tx14d14_modes),
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.hfmin = 14820,
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.hfmax = 22230,
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.vfmin = 60,
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.vfmax = 73.3,
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.dclkmax = 25200000,
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};
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struct atmel_lcdfb_info __initdata mimc200_lcdc_data = {
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.default_bpp = 16,
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.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
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.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
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| ATMEL_LCDC_INVCLK
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| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
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| ATMEL_LCDC_MEMOR_BIG),
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.default_monspecs = &mimc200_default_monspecs,
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.guard_time = 2,
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};
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struct eth_addr {
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u8 addr[6];
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};
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static struct eth_addr __initdata hw_addr[2];
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static struct eth_platform_data __initdata eth_data[2];
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static struct spi_eeprom eeprom_25lc010 = {
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.name = "25lc010",
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.byte_len = 128,
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.page_size = 16,
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.flags = EE_ADDR1,
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};
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static struct spi_board_info spi0_board_info[] __initdata = {
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{
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.modalias = "rtc-ds1390",
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.max_speed_hz = 4000000,
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.chip_select = 2,
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},
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{
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.modalias = "at25",
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.max_speed_hz = 1000000,
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.chip_select = 1,
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.mode = SPI_MODE_3,
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.platform_data = &eeprom_25lc010,
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},
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};
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static struct mci_platform_data __initdata mci0_data = {
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.slot[0] = {
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.bus_width = 4,
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.detect_pin = GPIO_PIN_PA(26),
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.wp_pin = GPIO_PIN_PA(27),
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},
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};
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/*
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* The next two functions should go away as the boot loader is
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* supposed to initialize the macb address registers with a valid
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* ethernet address. But we need to keep it around for a while until
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* we can be reasonably sure the boot loader does this.
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*
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* The phy_id is ignored as the driver will probe for it.
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*/
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static int __init parse_tag_ethernet(struct tag *tag)
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{
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int i;
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i = tag->u.ethernet.mac_index;
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if (i < ARRAY_SIZE(hw_addr))
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memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
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sizeof(hw_addr[i].addr));
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return 0;
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}
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__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
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static void __init set_hw_addr(struct platform_device *pdev)
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{
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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const u8 *addr;
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void __iomem *regs;
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struct clk *pclk;
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if (!res)
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return;
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if (pdev->id >= ARRAY_SIZE(hw_addr))
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return;
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addr = hw_addr[pdev->id].addr;
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if (!is_valid_ether_addr(addr))
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return;
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/*
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* Since this is board-specific code, we'll cheat and use the
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* physical address directly as we happen to know that it's
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* the same as the virtual address.
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*/
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regs = (void __iomem __force *)res->start;
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pclk = clk_get(&pdev->dev, "pclk");
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if (!pclk)
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return;
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clk_enable(pclk);
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__raw_writel((addr[3] << 24) | (addr[2] << 16)
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| (addr[1] << 8) | addr[0], regs + 0x98);
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__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
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clk_disable(pclk);
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clk_put(pclk);
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}
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void __init setup_board(void)
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{
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at32_map_usart(0, 0); /* USART 0: /dev/ttyS0 (TTL --> Altera) */
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at32_map_usart(1, 1); /* USART 1: /dev/ttyS1 (RS232) */
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at32_map_usart(2, 2); /* USART 2: /dev/ttyS2 (RS485) */
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at32_map_usart(3, 3); /* USART 3: /dev/ttyS3 (RS422 Multidrop) */
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}
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static struct i2c_gpio_platform_data i2c_gpio_data = {
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.sda_pin = GPIO_PIN_PA(6),
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.scl_pin = GPIO_PIN_PA(7),
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.sda_is_open_drain = 1,
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.scl_is_open_drain = 1,
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.udelay = 2, /* close to 100 kHz */
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};
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static struct platform_device i2c_gpio_device = {
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.name = "i2c-gpio",
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.id = 0,
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.dev = {
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.platform_data = &i2c_gpio_data,
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},
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};
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static struct i2c_board_info __initdata i2c_info[] = {
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};
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static int __init mimc200_init(void)
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{
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/*
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* MIMC200 uses 16-bit SDRAM interface, so we don't need to
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* reserve any pins for it.
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*/
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at32_add_system_devices();
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at32_add_device_usart(0);
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at32_add_device_usart(1);
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at32_add_device_usart(2);
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at32_add_device_usart(3);
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set_hw_addr(at32_add_device_eth(0, ð_data[0]));
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set_hw_addr(at32_add_device_eth(1, ð_data[1]));
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at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
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||||
at32_add_device_mci(0, &mci0_data);
|
||||
at32_add_device_usba(0, NULL);
|
||||
|
||||
at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP);
|
||||
at32_select_gpio(i2c_gpio_data.sda_pin,
|
||||
AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
|
||||
at32_select_gpio(i2c_gpio_data.scl_pin,
|
||||
AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
|
||||
platform_device_register(&i2c_gpio_device);
|
||||
i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
|
||||
|
||||
at32_add_device_lcdc(0, &mimc200_lcdc_data,
|
||||
fbmem_start, fbmem_size, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(mimc200_init);
|
||||
Loading…
Reference in a new issue