Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

[PATCH] ide: backport piix fixes from libata into the legacy driver

Browse source 
There are three flags being set by default by the PIIX driver for speeds >
PIO 1, and one not being cleared properly on fallback to PIO0.  The most
important one is the prefetch/post write control which only works for ATA
and can do bad things with ATAPI.

The patch does its best to set the flags correctly for drivers/ide.  Its
not 100% perfect but its closer than the original.  100% perfect requires
proper IORDY handling but this isn't critical (and its not right in libata
either ..  yet)

Sergei Shtylyov <sshtylyov@ru.mvista.com> said:

> +					{ 0, 0 },
> +					{ 0, 0 },
> +					{ 1, 0 },
> +					{ 2, 1 },
> +					{ 2, 3 }, };
>
>  	pio = ide_get_best_pio_mode(drive, pio, 5, NULL);

    BTW, there's quite obvious error here which leads to access outside of
timings[] if somebody passes PIO mode 5 (or autotuning code finds out that
drive supports PIO mode 5). Could have been fixed while at it... Those drives
should be rare, though...

> +		}
>  		master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
>  	}
>  	pci_write_config_word(dev, master_port, master_data);

    Actually, there's one more serious issue with piix_tune_drive() -- it
doesn't actually set the drive's own transfer mode.

Signed-off-by: Alan Cox <alan@redhat.com>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Alan Cox 2006-10-03 01:14:23 -07:00 committed by Linus Torvalds
parent 14e0a19320
commit 5ac2469769
1 changed files with 22 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

31
drivers/ide/pci/piix.c
View file

@ -222,13 +222,15 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
u16 master_data;
u8 slave_data;
static DEFINE_SPINLOCK(tune_lock);
int control = 0;
/* ISP RTC */
u8 timings[][2] = { { 0, 0 },
{ 0, 0 },
{ 1, 0 },
{ 2, 1 },
{ 2, 3 }, };
static const u8 timings[][2]= {
{ 0, 0 },
{ 0, 0 },
{ 1, 0 },
{ 2, 1 },
{ 2, 3 }, };
pio = ide_get_best_pio_mode(drive, pio, 5, NULL);
@ -239,19 +241,30 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
*/
spin_lock_irqsave(&tune_lock, flags);
pci_read_config_word(dev, master_port, &master_data);
if (pio >= 2)
control |= 1; /* Programmable timing on */
if (drive->media == ide_disk)
control |= 4; /* Prefetch, post write */
if (pio >= 3)
control |= 2; /* IORDY */
if (is_slave) {
master_data = master_data | 0x4000;
if (pio > 1)
if (pio > 1) {
/* enable PPE, IE and TIME */
master_data = master_data | 0x0070;
master_data = master_data | (control << 4);
} else {
master_data &= ~0x0070;
}
pci_read_config_byte(dev, slave_port, &slave_data);
slave_data = slave_data & (hwif->channel ? 0x0f : 0xf0);
slave_data = slave_data | (((timings[pio][0] << 2) | timings[pio][1]) << (hwif->channel ? 4 : 0));
} else {
master_data = master_data & 0xccf8;
if (pio > 1)
if (pio > 1) {
/* enable PPE, IE and TIME */
master_data = master_data | 0x0007;
master_data = master_data | control;
}
master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
}
pci_write_config_word(dev, master_port, master_data);