drm/radeon/si: add VM CS checker support for CP DMA
Need to verify for copies involving registers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 47 additions and 0 deletions
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@ -2550,6 +2550,7 @@ static int si_vm_packet3_gfx_check(struct radeon_device *rdev,
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u32 idx = pkt->idx + 1;
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u32 idx_value = ib[idx];
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u32 start_reg, end_reg, reg, i;
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u32 command, info;
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switch (pkt->opcode) {
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case PACKET3_NOP:
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@ -2649,6 +2650,52 @@ static int si_vm_packet3_gfx_check(struct radeon_device *rdev,
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return -EINVAL;
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}
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break;
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case PACKET3_CP_DMA:
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command = ib[idx + 4];
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info = ib[idx + 1];
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if (command & PACKET3_CP_DMA_CMD_SAS) {
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/* src address space is register */
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if (((info & 0x60000000) >> 29) == 0) {
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start_reg = idx_value << 2;
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if (command & PACKET3_CP_DMA_CMD_SAIC) {
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reg = start_reg;
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if (!si_vm_reg_valid(reg)) {
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DRM_ERROR("CP DMA Bad SRC register\n");
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return -EINVAL;
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}
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} else {
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for (i = 0; i < (command & 0x1fffff); i++) {
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reg = start_reg + (4 * i);
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if (!si_vm_reg_valid(reg)) {
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DRM_ERROR("CP DMA Bad SRC register\n");
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return -EINVAL;
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}
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}
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}
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}
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}
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if (command & PACKET3_CP_DMA_CMD_DAS) {
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/* dst address space is register */
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if (((info & 0x00300000) >> 20) == 0) {
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start_reg = ib[idx + 2];
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if (command & PACKET3_CP_DMA_CMD_DAIC) {
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reg = start_reg;
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if (!si_vm_reg_valid(reg)) {
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DRM_ERROR("CP DMA Bad DST register\n");
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return -EINVAL;
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}
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} else {
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for (i = 0; i < (command & 0x1fffff); i++) {
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reg = start_reg + (4 * i);
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if (!si_vm_reg_valid(reg)) {
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DRM_ERROR("CP DMA Bad DST register\n");
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return -EINVAL;
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}
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}
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}
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}
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}
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break;
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default:
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DRM_ERROR("Invalid GFX packet3: 0x%x\n", pkt->opcode);
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return -EINVAL;
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