KVM: x86: keep track of LVT0 changes under APICv
Memory-mapped LVT0 register already contains the new value when APICv traps so we can't directly detect a change. Memorize a bit we are interested in to enable legacy NMI watchdog. Suggested-by: Yoshida Nobuo <yoshida.nb@ncos.nec.co.jp> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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2 changed files with 9 additions and 6 deletions
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@ -1257,16 +1257,17 @@ static void start_apic_timer(struct kvm_lapic *apic)
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static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val)
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{
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int nmi_wd_enabled = apic_lvt_nmi_mode(kvm_apic_get_reg(apic, APIC_LVT0));
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bool lvt0_in_nmi_mode = apic_lvt_nmi_mode(lvt0_val);
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if (apic_lvt_nmi_mode(lvt0_val)) {
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if (!nmi_wd_enabled) {
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if (apic->lvt0_in_nmi_mode != lvt0_in_nmi_mode) {
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apic->lvt0_in_nmi_mode = lvt0_in_nmi_mode;
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if (lvt0_in_nmi_mode) {
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apic_debug("Receive NMI setting on APIC_LVT0 "
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"for cpu %d\n", apic->vcpu->vcpu_id);
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atomic_inc(&apic->vcpu->kvm->arch.vapics_in_nmi_mode);
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}
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} else if (nmi_wd_enabled)
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atomic_dec(&apic->vcpu->kvm->arch.vapics_in_nmi_mode);
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} else
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atomic_dec(&apic->vcpu->kvm->arch.vapics_in_nmi_mode);
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}
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}
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static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
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@ -1597,6 +1598,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event)
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if (!(vcpu->kvm->arch.disabled_quirks & KVM_QUIRK_LINT0_REENABLED))
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apic_set_reg(apic, APIC_LVT0,
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SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT));
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apic_manage_nmi_watchdog(apic, kvm_apic_get_reg(apic, APIC_LVT0));
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apic_set_reg(apic, APIC_DFR, 0xffffffffU);
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apic_set_spiv(apic, 0xff);
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@ -26,6 +26,7 @@ struct kvm_lapic {
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struct kvm_vcpu *vcpu;
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bool sw_enabled;
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bool irr_pending;
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bool lvt0_in_nmi_mode;
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/* Number of bits set in ISR. */
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s16 isr_count;
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/* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
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