ARM: imx: add msl support for imx7d
Add i.MX7D MSL support. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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6 changed files with 65 additions and 2 deletions
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@ -582,6 +582,13 @@ config SOC_IMX6SX
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help
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This enables support for Freescale i.MX6 SoloX processor.
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config SOC_IMX7D
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bool "i.MX7 Dual support"
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select PINCTRL_IMX7D
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select ARM_GIC
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help
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This enables support for Freescale i.MX7 Dual processor.
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config SOC_VF610
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bool "Vybrid Family VF610 support"
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select IRQ_DOMAIN_HIERARCHY
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@ -85,6 +85,7 @@ endif
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obj-$(CONFIG_SOC_IMX6Q) += mach-imx6q.o
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obj-$(CONFIG_SOC_IMX6SL) += mach-imx6sl.o
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obj-$(CONFIG_SOC_IMX6SX) += mach-imx6sx.o
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obj-$(CONFIG_SOC_IMX7D) += mach-imx7d.o
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ifeq ($(CONFIG_SUSPEND),y)
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AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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* Copyright (C) 2013-2015 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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@ -28,6 +28,7 @@
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#define ANADIG_USB2_CHRG_DETECT 0x210
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#define ANADIG_DIGPROG 0x260
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#define ANADIG_DIGPROG_IMX6SL 0x280
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#define ANADIG_DIGPROG_IMX7D 0x800
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#define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG 0x40000
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#define BM_ANADIG_REG_2P5_ENABLE_PULLDOWN 0x8
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@ -121,6 +122,8 @@ void __init imx_init_revision_from_anatop(void)
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WARN_ON(!anatop_base);
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if (of_device_is_compatible(np, "fsl,imx6sl-anatop"))
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offset = ANADIG_DIGPROG_IMX6SL;
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if (of_device_is_compatible(np, "fsl,imx7d-anatop"))
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offset = ANADIG_DIGPROG_IMX7D;
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digprog = readl_relaxed(anatop_base + offset);
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iounmap(anatop_base);
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@ -130,6 +130,9 @@ struct device * __init imx_soc_device_init(void)
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case MXC_CPU_IMX6Q:
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soc_id = "i.MX6Q";
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break;
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case MXC_CPU_IMX7D:
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soc_id = "i.MX7D";
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break;
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default:
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soc_id = "Unknown";
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}
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43
arch/arm/mach-imx/mach-imx7d.c
Normal file
43
arch/arm/mach-imx/mach-imx7d.c
Normal file
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@ -0,0 +1,43 @@
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/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/irqchip.h>
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include "common.h"
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static void __init imx7d_init_machine(void)
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{
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struct device *parent;
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parent = imx_soc_device_init();
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if (parent == NULL)
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pr_warn("failed to initialize soc device\n");
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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imx_anatop_init();
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}
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static void __init imx7d_init_irq(void)
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{
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imx_init_revision_from_anatop();
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imx_src_init();
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irqchip_init();
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}
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static const char *imx7d_dt_compat[] __initconst = {
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"fsl,imx7d",
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NULL,
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};
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DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual (Device Tree)")
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.init_irq = imx7d_init_irq,
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.init_machine = imx7d_init_machine,
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.dt_compat = imx7d_dt_compat,
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MACHINE_END
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@ -1,5 +1,5 @@
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/*
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* Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc.
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* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
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*
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* This program is free software; you can redistribute it and/or
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@ -38,6 +38,7 @@
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#define MXC_CPU_IMX6DL 0x61
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#define MXC_CPU_IMX6SX 0x62
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#define MXC_CPU_IMX6Q 0x63
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#define MXC_CPU_IMX7D 0x72
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#define IMX_DDR_TYPE_LPDDR2 1
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@ -169,6 +170,11 @@ static inline bool cpu_is_imx6q(void)
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return __mxc_cpu_type == MXC_CPU_IMX6Q;
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}
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static inline bool cpu_is_imx7d(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX7D;
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}
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struct cpu_op {
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u32 cpu_rate;
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};
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