Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

EDAC, AMD: decode bus unit MCEs

Browse source 
... according to Table 69, Fam10h BKDG (31116, rev. 3.28).

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
This commit is contained in:
Borislav Petkov 2009-07-28 14:14:24 +02:00
parent ab5535e70f
commit 56cad2d6fb
1 changed files with 46 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

46
drivers/edac/edac_mce_amd.c
View file

@ -228,6 +228,48 @@ static void amd_decode_ic_mce(u64 mc1_status)
pr_warning("Corrupted IC MCE info?\n");
}
static void amd_decode_bu_mce(u64 mc2_status)
{
u32 ec = mc2_status & 0xffff;
u32 xec = (mc2_status >> 16) & 0xf;
pr_emerg(" Bus Unit Error");
if (xec == 0x1)
pr_cont(" in the write data buffers.\n");
else if (xec == 0x3)
pr_cont(" in the victim data buffers.\n");
else if (xec == 0x2 && MEM_ERROR(ec))
pr_cont(": %s error in the L2 cache tags.\n", RRRR_MSG(ec));
else if (xec == 0x0) {
if (TLB_ERROR(ec))
pr_cont(": %s error in a Page Descriptor Cache or "
"Guest TLB.\n", TT_MSG(ec));
else if (BUS_ERROR(ec))
pr_cont(": %s/ECC error in data read from NB: %s.\n",
RRRR_MSG(ec), PP_MSG(ec));
else if (MEM_ERROR(ec)) {
u8 rrrr = (ec >> 4) & 0xf;
if (rrrr >= 0x7)
pr_cont(": %s error during data copyback.\n",
RRRR_MSG(ec));
else if (rrrr <= 0x1)
pr_cont(": %s parity/ECC error during data "
"access from L2.\n", RRRR_MSG(ec));
else
goto wrong_bu_mce;
} else
goto wrong_bu_mce;
} else
goto wrong_bu_mce;
return;
wrong_bu_mce:
pr_warning("Corrupted BU MCE info?\n");
}
void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
{
u32 ec = ERROR_CODE(regs->nbsl);
@ -320,6 +362,10 @@ void decode_mce(struct mce *m)
amd_decode_ic_mce(m->status);
break;
case 2:
amd_decode_bu_mce(m->status);
break;
case 4:
regs.nbsl = (u32) m->status;
regs.nbsh = (u32)(m->status >> 32);