MIPS: Tracing: Fix argument passing of the 32bit support with gcc 4.5
As documented in the GCC 4.5 docs [1] -mmcount-ra-address uses register $12 to pass the stack offset of the return address to the _mcount function. On 64-bit kernels $12 is t0 but in 32-bit kernels it is t4 so we need to use $12 instead of t0 here to be correct for both kernel types. [1] GCC documentation: MIPS Options http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips <linux-mips@linux-mips.org> Cc: David Daney <david.s.daney@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/1227/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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1 changed files with 9 additions and 3 deletions
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@ -57,6 +57,12 @@
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move ra, AT
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.endm
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/*
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* The -mmcount-ra-address option of gcc 4.5 uses register $12 to pass
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* the location of the parent's return address.
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*/
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#define MCOUNT_RA_ADDRESS_REG $12
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#ifdef CONFIG_DYNAMIC_FTRACE
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NESTED(ftrace_caller, PT_SIZE, ra)
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@ -70,7 +76,7 @@ _mcount:
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MCOUNT_SAVE_REGS
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#ifdef KBUILD_MCOUNT_RA_ADDRESS
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PTR_S t0, PT_R12(sp) /* save location of parent's return address */
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PTR_S MCOUNT_RA_ADDRESS_REG, PT_R12(sp)
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#endif
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move a0, ra /* arg1: self return address */
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@ -142,9 +148,9 @@ NESTED(ftrace_graph_caller, PT_SIZE, ra)
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#ifdef CONFIG_DYNAMIC_FTRACE
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PTR_L a0, PT_R12(sp)
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#else
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move a0, t0
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move a0, MCOUNT_RA_ADDRESS_REG
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#endif
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bnez a0, 1f /* non-leaf func: stored in t0 */
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bnez a0, 1f /* non-leaf func: stored in MCOUNT_RA_ADDRESS_REG */
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nop
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#endif
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PTR_LA a0, PT_R1(sp) /* leaf func: the location in current stack */
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