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ARC: RIP broken 64bit RTSC

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Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Vineet Gupta 2015-03-07 17:06:09 +05:30
parent 742f8af6cb
commit 565a9b497c
7 changed files with 4 additions and 63 deletions
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5
arch/arc/Kconfig
View file

@ -311,11 +311,6 @@ config ARC_HAS_SWAPE
bool "Insn: SWAPE (endian-swap)"
default y
config ARC_HAS_RTSC
bool "Insn: RTSC (64-bit r/o cycle counter)"
default y
depends on !SMP
endmenu # "ARC CPU Configuration"
config LINUX_LINK_BASE

2
arch/arc/Makefile
View file

@ -33,7 +33,7 @@ cflags-$(atleast_gcc44) += -fsection-anchors
cflags-$(CONFIG_ARC_HAS_LLSC) += -mlock
cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape
cflags-$(CONFIG_ARC_HAS_RTSC) += -mrtsc
cflags-$(CONFIG_ARC_DW2_UNWIND) += -fasynchronous-unwind-tables
# By default gcc 4.8 generates dwarf4 which kernel unwinder can't grok

1
arch/arc/configs/nsim_700_defconfig
View file

@ -23,7 +23,6 @@ CONFIG_MODULES=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARC_PLAT_FPGA_LEGACY=y
# CONFIG_ARC_HAS_RTSC is not set
CONFIG_ARC_BUILTIN_DTB_NAME="angel4"
CONFIG_PREEMPT=y
# CONFIG_COMPACTION is not set

1
arch/arc/configs/nsimosci_defconfig
View file

@ -24,7 +24,6 @@ CONFIG_MODULES=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARC_PLAT_FPGA_LEGACY=y
# CONFIG_ARC_HAS_RTSC is not set
CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci"
# CONFIG_COMPACTION is not set
CONFIG_NET=y

1
arch/arc/configs/tb10x_defconfig
View file

@ -26,7 +26,6 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_BLOCK is not set
CONFIG_ARC_PLAT_TB10X=y
CONFIG_ARC_CACHE_LINE_SHIFT=5
# CONFIG_ARC_HAS_RTSC is not set
CONFIG_ARC_STACK_NONEXEC=y
CONFIG_HZ=250
CONFIG_ARC_BUILTIN_DTB_NAME="abilis_tb100_dvk"

8
arch/arc/kernel/setup.c
View file

@ -180,10 +180,9 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
(unsigned int)(arc_get_core_freq() / 1000000),
(unsigned int)(arc_get_core_freq() / 10000) % 100);
n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s\nISA Extn\t: ",
IS_AVAIL1(cpu->timers.t0, "Timer0 "),
IS_AVAIL1(cpu->timers.t1, "Timer1 "),
IS_AVAIL2(cpu->timers.rtsc, "64-bit RTSC ", CONFIG_ARC_HAS_RTSC));
IS_AVAIL1(cpu->timers.t1, "Timer1 "));
n += i = scnprintf(buf + n, len - n, "%s%s",
IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC));
@ -254,9 +253,6 @@ static void arc_chk_core_config(void)
if (!cpu->timers.t1)
panic("Timer1 is not present!\n");
if (IS_ENABLED(CONFIG_ARC_HAS_RTSC) && !cpu->timers.rtsc)
panic("RTSC is not present\n");
#ifdef CONFIG_ARC_HAS_DCCM
/*
* DCCM can be arbit placed in hardware.

49
arch/arc/kernel/time.c
View file

@ -26,6 +26,7 @@
* while TIMER1 for free running (clocksource)
*
* Newer ARC700 cores have 64bit clk fetching RTSC insn, preferred over TIMER1
* which however is currently broken
*/
#include <linux/spinlock.h>
@ -59,52 +60,6 @@
/********** Clock Source Device *********/
#ifdef CONFIG_ARC_HAS_RTSC
int arc_counter_setup(void)
{
/*
* For SMP this needs to be 0. However Kconfig glue doesn't
* enable this option for SMP configs
*/
return 1;
}
static cycle_t arc_counter_read(struct clocksource *cs)
{
unsigned long flags;
union {
#ifdef CONFIG_CPU_BIG_ENDIAN
struct { u32 high, low; };
#else
struct { u32 low, high; };
#endif
cycle_t full;
} stamp;
flags = arch_local_irq_save();
__asm__ __volatile(
" .extCoreRegister tsch, 58, r, cannot_shortcut \n"
" rtsc %0, 0 \n"
" mov %1, 0 \n"
: "=r" (stamp.low), "=r" (stamp.high));
arch_local_irq_restore(flags);
return stamp.full;
}
static struct clocksource arc_counter = {
.name = "ARC RTSC",
.rating = 300,
.read = arc_counter_read,
.mask = CLOCKSOURCE_MASK(32),
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
#else /* !CONFIG_ARC_HAS_RTSC */
static bool is_usable_as_clocksource(void)
{
#ifdef CONFIG_SMP
@ -139,8 +94,6 @@ static struct clocksource arc_counter = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
#endif
/********** Clock Event Device *********/
/*