[MIPS] Replace board_timer_setup function pointer by plat_timer_setup.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
2006-07-09 21:38:56 +01:00 · 2006-07-09 21:38:56 +01:00 · 54d0a216f4
commit 54d0a216f4
parent 2c70df5b98
39 changed files with 40 additions and 97 deletions
--- a/Documentation/mips/time.README
+++ b/Documentation/mips/time.README
@ -65,7 +65,7 @@ the following functions or values:
 	1. (optional) set up RTC routines
 	2. (optional) calibrate and set the mips_counter_frequency

-  b) board_timer_setup - a function pointer.  Invoked at the end of time_init()
+  b) plat_timer_setup - a function pointer.  Invoked at the end of time_init()
 	1. (optional) over-ride any decisions made in time_init()
 	2. set up the irqaction for timer interrupt.
 	3. enable the timer interrupt
@ -116,19 +116,17 @@ Step 2:  the machine setup() function

  If you supply board_time_init(), set the function poointer.

-  Set the function pointer board_timer_setup() (mandatory)

-
-Step 3: implement rtc routines, board_time_init() and board_timer_setup()
+Step 3: implement rtc routines, board_time_init() and plat_timer_setup()
  if needed.

-  board_time_init() - 
+  board_time_init() -
  	a) (optional) set up RTC routines, 
        b) (optional) calibrate and set the mips_counter_frequency
 	    (only needed if you intended to use fixed_rate_gettimeoffset
 	     or use cpu counter as timer interrupt source)

-  board_timer_setup() - 
+  plat_timer_setup() -
 	a) (optional) over-write any choices made above by time_init().
 	b) machine specific code should setup the timer irqaction.
 	c) enable the timer interrupt
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@ -51,7 +51,6 @@ extern void au1000_power_off(void);
 extern void au1x_time_init(void);
 extern void au1x_timer_setup(struct irqaction *irq);
 extern void au1xxx_time_init(void);
-extern void au1xxx_timer_setup(struct irqaction *irq);
 extern void set_cpuspec(void);

 void __init plat_mem_setup(void)
@ -123,7 +122,6 @@ void __init plat_mem_setup(void)
 	_machine_halt = au1000_halt;
 	pm_power_off = au1000_power_off;
 	board_time_init = au1xxx_time_init;
-	board_timer_setup = au1xxx_timer_setup;

 	/* IO/MEM resources. */
 	set_io_port_base(0);
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@ -383,7 +383,7 @@ static unsigned long do_fast_pm_gettimeoffset(void)
 }
 #endif

-void __init au1xxx_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	unsigned int est_freq;

--- a/arch/mips/basler/excite/excite_setup.c
+++ b/arch/mips/basler/excite/excite_setup.c
@ -78,7 +78,7 @@ static void excite_timer_init(void)
 	mips_hpt_frequency = EXCITE_CPU_EXT_CLOCK * mult / div / 2;
 }

-static void excite_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	/* The eXcite platform uses the alternate timer interrupt */
 	set_c0_intcontrol(0x80);
@ -262,7 +262,6 @@ void __init plat_mem_setup(void)

 	/* Set up timer initialization hooks */
 	board_time_init = excite_timer_init;
-	board_timer_setup = excite_timer_setup;

 	/* Set up the peripheral address map */
 	*(boot_ocd_base + (LKB9 / sizeof (u32))) = 0;
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@ -49,7 +49,7 @@ const char *get_system_type(void)
 	return "MIPS Cobalt";
 }

-static void __init cobalt_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	/* Load timer value for 1KHz (TCLK is 50MHz) */
 	GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS);
@ -129,8 +129,6 @@ void __init plat_mem_setup(void)
 	_machine_halt = cobalt_machine_halt;
 	pm_power_off = cobalt_machine_power_off;

-	board_timer_setup = cobalt_timer_setup;
-
        set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE));

 	/* I/O port resource must include UART and LCD/buttons */
--- a/arch/mips/ddb5xxx/ddb5477/setup.c
+++ b/arch/mips/ddb5xxx/ddb5477/setup.c
@ -147,7 +147,7 @@ static void __init ddb_time_init(void)
 	mips_hpt_frequency = bus_frequency*(i+4)/4;
 }

-static void __init ddb_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 #if defined(USE_CPU_COUNTER_TIMER)

@ -177,7 +177,6 @@ void __init plat_mem_setup(void)
 	set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE));

 	board_time_init = ddb_time_init;
-	board_timer_setup = ddb_timer_setup;

 	_machine_restart = ddb_machine_restart;
 	_machine_halt = ddb_machine_halt;
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@ -145,13 +145,11 @@ static void __init dec_be_init(void)


 extern void dec_time_init(void);
-extern void dec_timer_setup(struct irqaction *);

 void __init plat_mem_setup(void)
 {
 	board_be_init = dec_be_init;
 	board_time_init = dec_time_init;
-	board_timer_setup = dec_timer_setup;

 	wbflush_setup();

--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@ -186,7 +186,7 @@ void __init dec_time_init(void)

 EXPORT_SYMBOL(do_settimeofday);

-void __init dec_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	setup_irq(dec_interrupt[DEC_IRQ_RTC], irq);

--- a/arch/mips/emma2rh/markeins/setup.c
+++ b/arch/mips/emma2rh/markeins/setup.c
@ -104,7 +104,7 @@ static void __init emma2rh_time_init(void)
 	mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2;
 }

-static void __init emma2rh_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	/* we are using the cpu counter for timer interrupts */
 	setup_irq(CPU_IRQ_BASE + 7, irq);
@ -149,7 +149,6 @@ void __init plat_mem_setup(void)
 	set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE));

 	board_time_init = emma2rh_time_init;
-	board_timer_setup = emma2rh_timer_setup;

 	_machine_restart = markeins_machine_restart;
 	_machine_halt = markeins_machine_halt;
--- a/arch/mips/gt64120/wrppmc/setup.c
+++ b/arch/mips/gt64120/wrppmc/setup.c
@ -127,7 +127,6 @@ static void wrppmc_setup_serial(void)
 void __init plat_mem_setup(void)
 {
 	extern void wrppmc_time_init(void);
-	extern void wrppmc_timer_setup(struct irqaction *);
 	extern void wrppmc_machine_restart(char *command);
 	extern void wrppmc_machine_halt(void);
 	extern void wrppmc_machine_power_off(void);
@ -138,7 +137,6 @@ void __init plat_mem_setup(void)

 	/* Use MIPS Count/Compare Timer */
 	board_time_init   = wrppmc_time_init;
-	board_timer_setup = wrppmc_timer_setup;

 	/* This makes the operations of 'in/out[bwl]' to the
 	 * physical address ( < KSEG0) can work via KSEG1
--- a/arch/mips/gt64120/wrppmc/time.c
+++ b/arch/mips/gt64120/wrppmc/time.c
@ -26,7 +26,7 @@

 #define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */

-void __init wrppmc_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	/* Install ISR for timer interrupt */
 	setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq);
--- a/arch/mips/ite-boards/generic/it8172_setup.c
+++ b/arch/mips/ite-boards/generic/it8172_setup.c
@ -60,7 +60,6 @@ extern void it8172_halt(void);
 extern void it8172_power_off(void);

 extern void it8172_time_init(void);
-extern void it8172_timer_setup(struct irqaction *irq);

 #ifdef CONFIG_IT8172_REVC
 struct {
@ -168,7 +167,6 @@ void __init plat_mem_setup(void)
 	clear_c0_status(ST0_FR);

 	board_time_init = it8172_time_init;
-	board_timer_setup = it8172_timer_setup;

 	_machine_restart = it8172_restart;
 	_machine_halt = it8172_halt;
--- a/arch/mips/ite-boards/generic/time.c
+++ b/arch/mips/ite-boards/generic/time.c
@ -233,7 +233,8 @@ void __init it8172_time_init(void)
 }

 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
-void __init it8172_timer_setup(struct irqaction *irq)
+
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	puts("timer_setup\n");
 	put32(NR_IRQS);
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@ -37,7 +37,7 @@ extern void jazz_machine_restart(char *command);
 extern void jazz_machine_halt(void);
 extern void jazz_machine_power_off(void);

-static void __init jazz_time_init(struct irqaction *irq)
+void __init plat_time_init(struct irqaction *irq)
 {
 	/* set the clock to 100 Hz */
 	r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
@ -75,7 +75,6 @@ void __init plat_mem_setup(void)
 	for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++)
 		request_resource(&ioport_resource, jazz_io_resources + i);

-        board_timer_setup = jazz_time_init;
 	/* The RTC is outside the port address space */

 	_machine_restart = jazz_machine_restart;
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@ -185,7 +185,7 @@ static void __init jmr3927_time_init(void)

 unsigned long jmr3927_do_gettimeoffset(void);

-static void __init jmr3927_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	do_gettimeoffset = jmr3927_do_gettimeoffset;

@ -244,7 +244,6 @@ void __init plat_mem_setup(void)
 	set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);

 	board_time_init = jmr3927_time_init;
-	board_timer_setup = jmr3927_timer_setup;

 	_machine_restart = jmr3927_machine_restart;
 	_machine_halt = jmr3927_machine_halt;
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@ -577,7 +577,7 @@ void smtc_init_secondary(void)
 {
 	/*
 	 * Start timer on secondary VPEs if necessary.
-	 * mips_timer_setup should already have been invoked by init/main
+	 * plat_timer_setup has already have been invoked by init/main
 	 * on "boot" TC.  Like per_cpu_trap_init() hack, this assumes that
 	 * SMTC init code assigns TCs consdecutively and in ascending order
 	 * to across available VPEs.
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@ -566,14 +566,13 @@ asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
 * 2) setup xtime based on rtc_mips_get_time().
 * 3) choose a appropriate gettimeoffset routine.
 * 4) calculate a couple of cached variables for later usage
- * 5) board_timer_setup() -
+ * 5) plat_timer_setup() -
 *	a) (optional) over-write any choices made above by time_init().
 *	b) machine specific code should setup the timer irqaction.
 *	c) enable the timer interrupt
 */

 void (*board_time_init)(void);
-void (*board_timer_setup)(struct irqaction *irq);

 unsigned int mips_hpt_frequency;

@ -718,7 +717,7 @@ void __init time_init(void)
 	 * to be NULL function so that we are sure the high-level code
 	 * is not invoked accidentally.
 	 */
-	board_timer_setup(&timer_irqaction);
+	plat_timer_setup(&timer_irqaction);
 }

 #define FEBRUARY		2
--- a/arch/mips/lasat/setup.c
+++ b/arch/mips/lasat/setup.c
@ -115,12 +115,9 @@ static void lasat_time_init(void)
 	mips_hpt_frequency = lasat_board_info.li_cpu_hz / 2;
 }

-static void lasat_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
-
-	write_c0_compare(
-		read_c0_count() +
-		mips_hpt_frequency / HZ);
+	write_c0_compare( read_c0_count() + mips_hpt_frequency / HZ);
 	change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5);
 }

@ -170,7 +167,6 @@ void __init plat_mem_setup(void)
 	lasat_reboot_setup();

 	board_time_init = lasat_time_init;
-	board_timer_setup = lasat_timer_setup;

 #ifdef CONFIG_DS1603
 	ds1603 = &ds_defs[mips_machtype];
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ b/arch/mips/mips-boards/atlas/atlas_setup.c
@ -35,7 +35,6 @@

 extern void mips_reboot_setup(void);
 extern void mips_time_init(void);
-extern void mips_timer_setup(struct irqaction *irq);
 extern unsigned long mips_rtc_get_time(void);

 #ifdef CONFIG_KGDB
@ -63,7 +62,6 @@ void __init plat_mem_setup(void)
 	mips_reboot_setup();

 	board_time_init = mips_time_init;
-	board_timer_setup = mips_timer_setup;
 	rtc_mips_get_time = mips_rtc_get_time;
 }

--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@ -245,7 +245,7 @@ void __init mips_time_init(void)
 	local_irq_restore(flags);
 }

-void __init mips_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	if (cpu_has_veic) {
 		set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch);
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@ -44,7 +44,6 @@

 extern void mips_reboot_setup(void);
 extern void mips_time_init(void);
-extern void mips_timer_setup(struct irqaction *irq);
 extern unsigned long mips_rtc_get_time(void);

 #ifdef CONFIG_KGDB
@ -223,6 +222,5 @@ void __init plat_mem_setup(void)
 	mips_reboot_setup();

 	board_time_init = mips_time_init;
-	board_timer_setup = mips_timer_setup;
 	rtc_mips_get_time = mips_rtc_get_time;
 }
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ b/arch/mips/mips-boards/sead/sead_setup.c
@ -35,7 +35,6 @@

 extern void mips_reboot_setup(void);
 extern void mips_time_init(void);
-extern void mips_timer_setup(struct irqaction *irq);

 static void __init serial_init(void);

@ -51,7 +50,6 @@ void __init plat_mem_setup(void)
 	serial_init ();

 	board_time_init = mips_time_init;
-	board_timer_setup = mips_timer_setup;

 	mips_reboot_setup();
 }
--- a/arch/mips/mips-boards/sim/sim_setup.c
+++ b/arch/mips/mips-boards/sim/sim_setup.c
@ -37,7 +37,6 @@


 extern void sim_time_init(void);
-extern void sim_timer_setup(struct irqaction *irq);
 static void __init serial_init(void);
 unsigned int _isbonito = 0;

@ -56,7 +55,6 @@ void __init plat_mem_setup(void)
 	serial_init();

 	board_time_init = sim_time_init;
-	board_timer_setup = sim_timer_setup;
 	prom_printf("Linux started...\n");

 #ifdef CONFIG_MT_SMP
--- a/arch/mips/momentum/jaguar_atx/setup.c
+++ b/arch/mips/momentum/jaguar_atx/setup.c
@ -212,7 +212,7 @@ int m48t37y_set_time(unsigned long sec)
 	return 0;
 }

-void momenco_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	setup_irq(8, irq);
 }
@ -226,7 +226,6 @@ void momenco_time_init(void)
 	wire_stupidity_into_tlb();

 	mips_hpt_frequency = cpu_clock / 2;
-	board_timer_setup = momenco_timer_setup;

 	rtc_mips_get_time = m48t37y_get_time;
 	rtc_mips_set_time = m48t37y_set_time;
--- a/arch/mips/momentum/ocelot_3/setup.c
+++ b/arch/mips/momentum/ocelot_3/setup.c
@ -197,7 +197,7 @@ int m48t37y_set_time(unsigned long sec)
 	return 0;
 }

-void momenco_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	setup_irq(7, irq);	/* Timer interrupt, unmask status IM7 */
 }
@ -211,7 +211,6 @@ void momenco_time_init(void)
 	 * the Rm7900 and the Rm7065C
 	 */
 	mips_hpt_frequency = cpu_clock / 2;
-	board_timer_setup = momenco_timer_setup;

 	rtc_mips_get_time = m48t37y_get_time;
 	rtc_mips_set_time = m48t37y_set_time;
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ b/arch/mips/momentum/ocelot_c/setup.c
@ -209,7 +209,7 @@ int m48t37y_set_time(unsigned long sec)
 	return 0;
 }

-void momenco_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	setup_irq(7, irq);
 }
@ -224,7 +224,6 @@ void momenco_time_init(void)
 #error Unknown CPU for this board
 #endif
 	printk("momenco_time_init cpu_clock=%d\n", cpu_clock);
-	board_timer_setup = momenco_timer_setup;

 	rtc_mips_get_time = m48t37y_get_time;
 	rtc_mips_set_time = m48t37y_set_time;
--- a/arch/mips/philips/pnx8550/common/setup.c
+++ b/arch/mips/philips/pnx8550/common/setup.c
@ -50,7 +50,6 @@ extern void pnx8550_machine_power_off(void);
 extern struct resource ioport_resource;
 extern struct resource iomem_resource;
 extern void pnx8550_time_init(void);
-extern void pnx8550_timer_setup(struct irqaction *irq);
 extern void rs_kgdb_hook(int tty_no);
 extern void prom_printf(char *fmt, ...);
 extern char *prom_getcmdline(void);
@ -109,7 +108,6 @@ void __init plat_mem_setup(void)
        pm_power_off = pnx8550_machine_power_off;

 	board_time_init = pnx8550_time_init;
-	board_timer_setup = pnx8550_timer_setup;

 	/* Clear the Global 2 Register, PCI Inta Output Enable Registers
 	   Bit 1:Enable DAC Powerdown
--- a/arch/mips/philips/pnx8550/common/time.c
+++ b/arch/mips/philips/pnx8550/common/time.c
@ -70,16 +70,7 @@ void pnx8550_time_init(void)
 	mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p));
 }

-/*
- * pnx8550_timer_setup() - it does the following things:
- *
- * 5) board_timer_setup() -
- *	a) (optional) over-write any choices made above by time_init().
- *	b) machine specific code should setup the timer irqaction.
- *	c) enable the timer interrupt
- */
-
-void __init pnx8550_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	int configPR;

--- a/arch/mips/pmc-sierra/yosemite/setup.c
+++ b/arch/mips/pmc-sierra/yosemite/setup.c
@ -133,14 +133,13 @@ int m48t37y_set_time(unsigned long sec)
 	return 0;
 }

-void yosemite_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	setup_irq(7, irq);
 }

 void yosemite_time_init(void)
 {
-	board_timer_setup = yosemite_timer_setup;
 	mips_hpt_frequency = cpu_clock / 2;
 mips_hpt_frequency = 33000000 * 3 * 5;
 }
--- a/arch/mips/qemu/q-setup.c
+++ b/arch/mips/qemu/q-setup.c
@ -11,7 +11,7 @@ const char *get_system_type(void)
 	return "Qemu";
 }

-static void __init qemu_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	/* set the clock to 100 Hz */
 	outb_p(0x34,0x43);		/* binary, mode 2, LSB/MSB, ch 0 */
@ -23,7 +23,5 @@ static void __init qemu_timer_setup(struct irqaction *irq)
 void __init plat_mem_setup(void)
 {
 	set_io_port_base(QEMU_PORT_BASE);
-	board_timer_setup = qemu_timer_setup;
-
 	qemu_reboot_setup();
 }
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@ -7,7 +7,7 @@
 * Ralf Baechle or David S. Miller (sorry guys, i'm really not sure)
 *
 * Copyright (C) 2001 by Ladislav Michl
- * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org)
 */
 #include <linux/bcd.h>
 #include <linux/ds1286.h>
@ -199,7 +199,7 @@ void indy_r4k_timer_interrupt(struct pt_regs *regs)
 	irq_exit();
 }

-static void indy_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	/* over-write the handler, we use our own way */
 	irq->handler = no_action;
@ -215,5 +215,4 @@ void __init ip22_time_init(void)
 	rtc_mips_set_time = indy_rtc_set_time;

 	board_time_init = indy_time_init;
-	board_timer_setup = indy_timer_setup;
 }
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@ -1,5 +1,5 @@
 /*
- * Copytight (C) 1999, 2000, 05 Ralf Baechle (ralf@linux-mips.org)
+ * Copytight (C) 1999, 2000, 05, 06 Ralf Baechle (ralf@linux-mips.org)
 * Copytight (C) 1999, 2000 Silicon Graphics, Inc.
 */
 #include <linux/bcd.h>
@ -225,7 +225,7 @@ static struct irqaction rt_irqaction = {

 extern int allocate_irqno(void);

-static void ip27_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	int irqno  = allocate_irqno();

@ -256,8 +256,6 @@ void __init ip27_time_init(void)
 	xtime.tv_nsec = 0;

 	do_gettimeoffset = ip27_do_gettimeoffset;
-
-	board_timer_setup = ip27_timer_setup;
 }

 void __init cpu_time_init(void)
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@ -7,6 +7,7 @@
 *
 * Copyright (C) 2000 Harald Koerfgen
 * Copyright (C) 2002, 2003, 2005 Ilya A. Volynets
+ * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
 */
 #include <linux/console.h>
 #include <linux/init.h>
@ -80,7 +81,7 @@ void __init ip32_time_init(void)
 	printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000);
 }

-void __init ip32_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	irq->handler = no_action;
 	setup_irq(IP32_R4K_TIMER_IRQ, irq);
@ -94,7 +95,6 @@ void __init plat_mem_setup(void)
 	rtc_mips_set_mmss = mc146818_set_rtc_mmss;

 	board_time_init = ip32_time_init;
-	board_timer_setup = ip32_timer_setup;

 #ifdef CONFIG_SERIAL_8250
 	{
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@ -77,7 +77,7 @@ void __init swarm_time_init(void)
 #endif
 }

-void __init swarm_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
        /*
         * we don't set up irqaction, because we will deliver timer
@ -117,7 +117,6 @@ void __init plat_mem_setup(void)
 	panic_timeout = 5;  /* For debug.  */

 	board_time_init = swarm_time_init;
-	board_timer_setup = swarm_timer_setup;
 	board_be_handler = swarm_be_handler;

 	if (xicor_probe()) {
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@ -41,7 +41,7 @@ extern void sni_machine_restart(char *command);
 extern void sni_machine_halt(void);
 extern void sni_machine_power_off(void);

-static void __init sni_rm200_pci_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	/* set the clock to 100 Hz */
 	outb_p(0x34,0x43);		/* binary, mode 2, LSB/MSB, ch 0 */
@ -270,7 +270,6 @@ void __init plat_mem_setup(void)
 #endif

 	sni_resource_init();
-	board_timer_setup = sni_rm200_pci_timer_setup;

 	_machine_restart = sni_machine_restart;
 	_machine_halt = sni_machine_halt;
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@ -50,7 +50,6 @@
 #undef DEBUG

 void __init tx4927_time_init(void);
-void __init tx4927_timer_setup(struct irqaction *irq);
 void dump_cp0(char *key);


@ -66,7 +65,6 @@ static void tx4927_write_buffer_flush(void)
 void __init plat_mem_setup(void)
 {
 	board_time_init = tx4927_time_init;
-	board_timer_setup = tx4927_timer_setup;
 	__wbflush = tx4927_write_buffer_flush;

 #ifdef CONFIG_TOSHIBA_RBTX4927
@ -91,7 +89,7 @@ void __init tx4927_time_init(void)
 }


-void __init tx4927_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	u32 count;
 	u32 c1;
--- a/arch/mips/tx4938/common/setup.c
+++ b/arch/mips/tx4938/common/setup.c
@ -39,7 +39,6 @@ extern void rbtx4938_time_init(void);

 void __init tx4938_setup(void);
 void __init tx4938_time_init(void);
-void __init tx4938_timer_setup(struct irqaction *irq);
 void dump_cp0(char *key);

 void (*__wbflush) (void);
@ -64,7 +63,6 @@ void __init
 plat_mem_setup(void)
 {
 	board_time_init = tx4938_time_init;
-	board_timer_setup = tx4938_timer_setup;
 	__wbflush = tx4938_write_buffer_flush;
 	toshiba_rbtx4938_setup();
 }
@ -75,8 +73,7 @@ tx4938_time_init(void)
 	rbtx4938_time_init();
 }

-void __init
-tx4938_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	u32 count;
 	u32 c1;
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@ -47,7 +47,7 @@ static void __init setup_timer_frequency(void)
 		mips_hpt_frequency = tclock / 4;
 }

-static void __init setup_timer_irq(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
 	setup_irq(TIMER_IRQ, irq);
 }
@ -55,7 +55,6 @@ static void __init setup_timer_irq(struct irqaction *irq)
 static void __init timer_init(void)
 {
 	board_time_init = setup_timer_frequency;
-	board_timer_setup = setup_timer_irq;
 }

 void __init plat_mem_setup(void)
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@ -83,11 +83,11 @@ extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
 /*
 * board specific routines required by time_init().
 * board_time_init is defaulted to NULL and can remain so.
- * board_timer_setup must be setup properly in machine setup routine.
+ * plat_timer_setup must be setup properly in machine setup routine.
 */
 struct irqaction;
 extern void (*board_time_init)(void);
-extern void (*board_timer_setup)(struct irqaction *irq);
+extern void plat_timer_setup(struct irqaction *irq);

 /*
 * mips_hpt_frequency - must be set if you intend to use an R4k-compatible