drm/radeon/kms: force pinning buffer into visible VRAM
This patch properly set visible VRAM and enforce any pinned buffer to be into visible VRAM. We might later add a flag to release this constraint for some newer hw more clever than previous. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
parent
22e6dd7e70
commit
51e5fcd353
7 changed files with 13 additions and 4 deletions
|
@ -474,6 +474,7 @@ int evergreen_mc_init(struct radeon_device *rdev)
|
|||
/* size in MB on evergreen */
|
||||
rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
|
||||
rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
|
||||
rdev->mc.visible_vram_size = rdev->mc.aper_size;
|
||||
/* FIXME remove this once we support unmappable VRAM */
|
||||
if (rdev->mc.mc_vram_size > rdev->mc.aper_size) {
|
||||
rdev->mc.mc_vram_size = rdev->mc.aper_size;
|
||||
|
|
|
@ -1958,9 +1958,12 @@ void r100_vram_init_sizes(struct radeon_device *rdev)
|
|||
u64 config_aper_size;
|
||||
|
||||
/* work out accessible VRAM */
|
||||
rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev);
|
||||
rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
|
||||
rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
|
||||
rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev);
|
||||
/* FIXME we don't use the second aperture yet when we could use it */
|
||||
if (rdev->mc.visible_vram_size > rdev->mc.aper_size)
|
||||
rdev->mc.visible_vram_size = rdev->mc.aper_size;
|
||||
config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE);
|
||||
if (rdev->flags & RADEON_IS_IGP) {
|
||||
uint32_t tom;
|
||||
|
|
|
@ -712,6 +712,7 @@ int r600_mc_init(struct radeon_device *rdev)
|
|||
/* Setup GPU memory space */
|
||||
rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
|
||||
rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
|
||||
rdev->mc.visible_vram_size = rdev->mc.aper_size;
|
||||
/* FIXME remove this once we support unmappable VRAM */
|
||||
if (rdev->mc.mc_vram_size > rdev->mc.aper_size) {
|
||||
rdev->mc.mc_vram_size = rdev->mc.aper_size;
|
||||
|
|
|
@ -178,7 +178,6 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
|
|||
{
|
||||
int r, i;
|
||||
|
||||
radeon_ttm_placement_from_domain(bo, domain);
|
||||
if (bo->pin_count) {
|
||||
bo->pin_count++;
|
||||
if (gpu_addr)
|
||||
|
@ -186,6 +185,8 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
|
|||
return 0;
|
||||
}
|
||||
radeon_ttm_placement_from_domain(bo, domain);
|
||||
/* force to pin into visible video ram */
|
||||
bo->placement.lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
|
||||
for (i = 0; i < bo->placement.num_placement; i++)
|
||||
bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
|
||||
r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
|
||||
|
|
|
@ -462,12 +462,13 @@ void rs600_mc_init(struct radeon_device *rdev)
|
|||
{
|
||||
u64 base;
|
||||
|
||||
rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
|
||||
rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
|
||||
rdev->mc.vram_is_ddr = true;
|
||||
rdev->mc.vram_width = 128;
|
||||
rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
|
||||
rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
|
||||
rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
|
||||
rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
|
||||
rdev->mc.visible_vram_size = rdev->mc.aper_size;
|
||||
rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
|
||||
base = RREG32_MC(R_000004_MC_FB_LOCATION);
|
||||
base = G_000004_MC_FB_START(base) << 16;
|
||||
|
|
|
@ -141,6 +141,7 @@ void rs690_mc_init(struct radeon_device *rdev)
|
|||
rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
|
||||
rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
|
||||
rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
|
||||
rdev->mc.visible_vram_size = rdev->mc.aper_size;
|
||||
base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
|
||||
base = G_000100_MC_FB_START(base) << 16;
|
||||
rs690_pm_info(rdev);
|
||||
|
|
|
@ -901,6 +901,7 @@ int rv770_mc_init(struct radeon_device *rdev)
|
|||
/* Setup GPU memory space */
|
||||
rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
|
||||
rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
|
||||
rdev->mc.visible_vram_size = rdev->mc.aper_size;
|
||||
/* FIXME remove this once we support unmappable VRAM */
|
||||
if (rdev->mc.mc_vram_size > rdev->mc.aper_size) {
|
||||
rdev->mc.mc_vram_size = rdev->mc.aper_size;
|
||||
|
|
Loading…
Reference in a new issue