ARM: tegra: remove common.c
common.c was create to contain code shared across the various Tegra board files. There is now only one board file, tegra.c. So, move the code there. One exception is the PMC reboot routine, which moves to pmc.c, and now takes advantage of the 'standard' tegra_pmc_readl/writel functions. Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Stephen Warren
parent
d2207071b3
commit
51100bdc06
6 changed files with 78 additions and 122 deletions
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@ -1,6 +1,5 @@
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asflags-y += -march=armv7-a
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obj-y += common.o
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obj-y += io.o
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obj-y += irq.o
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obj-y += fuse.o
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@ -25,14 +25,8 @@
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#include <linux/types.h>
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#include <linux/reboot.h>
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void tegra_assert_system_reset(enum reboot_mode mode, const char *cmd);
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void __init tegra_init_early(void);
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void __init tegra_map_common_io(void);
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void __init tegra_init_irq(void);
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void __init tegra_dt_init_irq(void);
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void tegra_init_late(void);
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#ifdef CONFIG_DEBUG_FS
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int tegra_clk_debugfs_init(void);
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@ -1,113 +0,0 @@
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/*
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* arch/arm/mach-tegra/common.c
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*
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* Copyright (c) 2013 NVIDIA Corporation. All rights reserved.
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* Copyright (C) 2010 Google, Inc.
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*
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* Author:
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* Colin Cross <ccross@android.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/reboot.h>
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#include <linux/irqchip.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "board.h"
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#include "common.h"
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#include "cpuidle.h"
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#include "fuse.h"
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#include "iomap.h"
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#include "irq.h"
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#include "pmc.h"
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#include "apbio.h"
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#include "sleep.h"
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#include "pm.h"
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#include "reset.h"
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/*
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* Storage for debug-macro.S's state.
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*
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* This must be in .data not .bss so that it gets initialized each time the
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* kernel is loaded. The data is declared here rather than debug-macro.S so
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* that multiple inclusions of debug-macro.S point at the same data.
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*/
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u32 tegra_uart_config[4] = {
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/* Debug UART initialization required */
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1,
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/* Debug UART physical address */
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0,
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/* Debug UART virtual address */
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0,
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/* Scratch space for debug macro */
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0,
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};
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#ifdef CONFIG_OF
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void __init tegra_dt_init_irq(void)
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{
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tegra_pmc_init_irq();
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tegra_init_irq();
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irqchip_init();
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tegra_legacy_irq_syscore_init();
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}
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#endif
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void tegra_assert_system_reset(enum reboot_mode mode, const char *cmd)
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{
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void __iomem *reset = IO_ADDRESS(TEGRA_PMC_BASE + 0);
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u32 reg;
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reg = readl_relaxed(reset);
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reg |= 0x10;
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writel_relaxed(reg, reset);
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}
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static void __init tegra_init_cache(void)
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{
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#ifdef CONFIG_CACHE_L2X0
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int ret;
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void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
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u32 aux_ctrl, cache_type;
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cache_type = readl(p + L2X0_CACHE_TYPE);
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aux_ctrl = (cache_type & 0x700) << (17-8);
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aux_ctrl |= 0x7C400001;
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ret = l2x0_of_init(aux_ctrl, 0x8200c3fe);
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if (!ret)
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l2x0_saved_regs_addr = virt_to_phys(&l2x0_saved_regs);
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#endif
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}
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void __init tegra_init_early(void)
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{
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tegra_cpu_reset_handler_init();
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tegra_apb_io_init();
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tegra_init_fuse();
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tegra_init_cache();
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tegra_powergate_init();
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tegra_hotplug_init();
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}
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void __init tegra_init_late(void)
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{
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tegra_init_suspend();
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tegra_cpuidle_init();
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tegra_powergate_debugfs_init();
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}
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@ -166,6 +166,15 @@ int tegra_pmc_cpu_remove_clamping(int cpuid)
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return tegra_pmc_powergate_remove_clamping(id);
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}
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void tegra_pmc_restart(enum reboot_mode mode, const char *cmd)
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{
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u32 val;
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val = tegra_pmc_readl(0);
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val |= 0x10;
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tegra_pmc_writel(val, 0);
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}
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#ifdef CONFIG_PM_SLEEP
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static void set_power_timers(u32 us_on, u32 us_off, unsigned long rate)
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{
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@ -18,6 +18,8 @@
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#ifndef __MACH_TEGRA_PMC_H
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#define __MACH_TEGRA_PMC_H
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#include <linux/reboot.h>
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enum tegra_suspend_mode {
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TEGRA_SUSPEND_NONE = 0,
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TEGRA_SUSPEND_LP2, /* CPU voltage off */
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@ -39,6 +41,8 @@ bool tegra_pmc_cpu_is_powered(int cpuid);
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int tegra_pmc_cpu_power_on(int cpuid);
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int tegra_pmc_cpu_remove_clamping(int cpuid);
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void tegra_pmc_restart(enum reboot_mode mode, const char *cmd);
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void tegra_pmc_init_irq(void);
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void tegra_pmc_init(void);
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@ -35,17 +35,78 @@
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#include <linux/usb/tegra_usb_phy.h>
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#include <linux/clk-provider.h>
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#include <linux/clk/tegra.h>
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#include <linux/irqchip.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/setup.h>
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#include "apbio.h"
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#include "board.h"
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#include "common.h"
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#include "cpuidle.h"
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#include "fuse.h"
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#include "iomap.h"
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#include "irq.h"
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#include "pmc.h"
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#include "pm.h"
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#include "reset.h"
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#include "sleep.h"
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/*
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* Storage for debug-macro.S's state.
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*
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* This must be in .data not .bss so that it gets initialized each time the
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* kernel is loaded. The data is declared here rather than debug-macro.S so
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* that multiple inclusions of debug-macro.S point at the same data.
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*/
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u32 tegra_uart_config[4] = {
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/* Debug UART initialization required */
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1,
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/* Debug UART physical address */
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0,
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/* Debug UART virtual address */
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0,
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/* Scratch space for debug macro */
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0,
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};
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static void __init tegra_init_cache(void)
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{
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#ifdef CONFIG_CACHE_L2X0
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int ret;
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void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
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u32 aux_ctrl, cache_type;
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cache_type = readl(p + L2X0_CACHE_TYPE);
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aux_ctrl = (cache_type & 0x700) << (17-8);
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aux_ctrl |= 0x7C400001;
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ret = l2x0_of_init(aux_ctrl, 0x8200c3fe);
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if (!ret)
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l2x0_saved_regs_addr = virt_to_phys(&l2x0_saved_regs);
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#endif
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}
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static void __init tegra_init_early(void)
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{
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tegra_cpu_reset_handler_init();
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tegra_apb_io_init();
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tegra_init_fuse();
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tegra_init_cache();
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tegra_powergate_init();
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tegra_hotplug_init();
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}
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static void __init tegra_dt_init_irq(void)
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{
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tegra_pmc_init_irq();
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tegra_init_irq();
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irqchip_init();
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tegra_legacy_irq_syscore_init();
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}
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static void __init tegra_dt_init(void)
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{
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@ -107,7 +168,9 @@ static void __init tegra_dt_init_late(void)
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{
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int i;
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tegra_init_late();
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tegra_init_suspend();
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tegra_cpuidle_init();
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tegra_powergate_debugfs_init();
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for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
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if (of_machine_is_compatible(board_init_funcs[i].machine)) {
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@ -132,6 +195,6 @@ DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
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.init_time = tegra_dt_init_time,
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.init_machine = tegra_dt_init,
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.init_late = tegra_dt_init_late,
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.restart = tegra_assert_system_reset,
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.restart = tegra_pmc_restart,
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.dt_compat = tegra_dt_board_compat,
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MACHINE_END
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