ARM: OMAP4+: PRM: fix omap4 version of prm_save_and_clear_irqen
This was incorrectly reading the irq status registers during the save and clear, instead of the irq enable. This worked because there is only one user for the prcm interrupts currently, namely the io-chain. Whenever the function was called, an io-chain interrupt was both pending and enabled. Signed-off-by: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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1 changed files with 2 additions and 2 deletions
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@ -252,10 +252,10 @@ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
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{
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saved_mask[0] =
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omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
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OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
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OMAP4_PRM_IRQENABLE_MPU_OFFSET);
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saved_mask[1] =
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omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
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OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
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OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
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omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
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OMAP4_PRM_IRQENABLE_MPU_OFFSET);
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