[ARM] 3796/1: S3C24XX: Add per-cpu DMA channel mapper
Allow each CPU type in the S3C24XX range to select the DMA channel mapping it supports. We change the DMA registration to use an virtual channel number that the DMA system will allocate to a hardware channel at request time. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Ben Dooks
Russell King
parent
fd88edd20f
commit
505788cccb
4 changed files with 257 additions and 69 deletions
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@ -9,6 +9,8 @@ obj-y := cpu.o irq.o time.o gpio.o clock.o devs.o
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obj-m :=
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obj-n :=
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obj- :=
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obj-dma-y :=
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obj-dma-n :=
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# DMA
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obj-$(CONFIG_S3C2410_DMA) += dma.o
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@ -57,6 +59,10 @@ obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o
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obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o
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# merge in dma objects
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obj-y += $(obj-dma-y)
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# machine specific support
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obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o
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@ -1,35 +1,16 @@
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/* linux/arch/arm/mach-bast/dma.c
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/* linux/arch/arm/mach-s3c2410/dma.c
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*
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* (c) 2003-2005 Simtec Electronics
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* (c) 2003-2005,2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 DMA core
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*
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* http://www.simtec.co.uk/products/EB2410ITX/
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Changelog:
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* 27-Feb-2005 BJD Added kmem cache for dma descriptors
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* 18-Nov-2004 BJD Removed error for loading onto stopped channel
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* 10-Nov-2004 BJD Ensure all external symbols exported for modules
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* 10-Nov-2004 BJD Use sys_device and sysdev_class for power management
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* 08-Aug-2004 BJD Apply rmk's suggestions
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* 21-Jul-2004 BJD Ported to linux 2.6
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* 12-Jul-2004 BJD Finished re-write and change of API
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* 06-Jul-2004 BJD Rewrote dma code to try and cope with various problems
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* 23-May-2003 BJD Created file
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* 19-Aug-2003 BJD Cleanup, header fix, added URL
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*
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* This file is based on the Sangwook Lee/Samsung patches, re-written due
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* to various ommisions from the code (such as flexible dma configuration)
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* for use with the BAST system board.
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*
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* The re-write is pretty much complete, and should be good enough for any
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* possible DMA function
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*/
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*/
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#ifdef CONFIG_S3C2410_DMA_DEBUG
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@ -55,10 +36,14 @@
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#include <asm/mach/dma.h>
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#include <asm/arch/map.h>
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#include "dma.h"
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/* io map for dma */
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static void __iomem *dma_base;
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static kmem_cache_t *dma_kmem;
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struct s3c24xx_dma_selection dma_sel;
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/* dma channel state information */
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struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
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@ -79,7 +64,6 @@ dma_wrreg(struct s3c2410_dma_chan *chan, int reg, unsigned long val)
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pr_debug("writing %08x to register %08x\n",(unsigned int)val,reg);
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writel(val, dma_regaddr(chan, reg));
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}
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#endif
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#define dma_rdreg(chan, reg) readl((chan)->regs + (reg))
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@ -151,12 +135,20 @@ dmadbg_showregs(const char *fname, int line, struct s3c2410_dma_chan *chan)
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#define dbg_showchan(chan) do { } while(0)
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#endif /* CONFIG_S3C2410_DMA_DEBUG */
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#define check_channel(chan) \
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do { if ((chan) >= S3C2410_DMA_CHANNELS) { \
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printk(KERN_ERR "%s: invalid channel %d\n", __FUNCTION__, (chan)); \
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return -EINVAL; \
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} } while(0)
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static struct s3c2410_dma_chan *dma_chan_map[DMACH_MAX];
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/* lookup_dma_channel
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*
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* change the dma channel number given into a real dma channel id
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*/
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static struct s3c2410_dma_chan *lookup_dma_channel(unsigned int channel)
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{
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if (channel & DMACH_LOW_LEVEL)
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return &s3c2410_chans[channel & ~DMACH_LOW_LEVEL];
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else
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return dma_chan_map[channel];
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}
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/* s3c2410_dma_stats_timeout
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*
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@ -321,8 +313,10 @@ static inline void
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s3c2410_dma_buffdone(struct s3c2410_dma_chan *chan, struct s3c2410_dma_buf *buf,
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enum s3c2410_dma_buffresult result)
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{
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#if 0
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pr_debug("callback_fn=%p, buf=%p, id=%p, size=%d, result=%d\n",
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chan->callback_fn, buf, buf->id, buf->size, result);
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#endif
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if (chan->callback_fn != NULL) {
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(chan->callback_fn)(chan, buf->id, buf->size, result);
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@ -439,7 +433,6 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan)
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return 0;
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}
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/* s3c2410_dma_enqueue
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*
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* queue an given buffer for dma transfer.
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@ -460,11 +453,12 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan)
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int s3c2410_dma_enqueue(unsigned int channel, void *id,
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dma_addr_t data, int size)
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{
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
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struct s3c2410_dma_buf *buf;
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unsigned long flags;
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check_channel(channel);
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if (chan == NULL)
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return -EINVAL;
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pr_debug("%s: id=%p, data=%08x, size=%d\n",
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__FUNCTION__, id, (unsigned int)data, size);
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@ -562,8 +556,10 @@ s3c2410_dma_freebuf(struct s3c2410_dma_buf *buf)
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static inline void
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s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan)
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{
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#if 0
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pr_debug("dma%d: s3c2410_dma_lastxfer: load_state %d\n",
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chan->number, chan->load_state);
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#endif
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switch (chan->load_state) {
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case S3C2410_DMALOAD_NONE:
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@ -718,7 +714,8 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs)
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if (chan->load_state == S3C2410_DMALOAD_NONE) {
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pr_debug("dma%d: end of transfer, stopping channel (%ld)\n",
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chan->number, jiffies);
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s3c2410_dma_ctrl(chan->number, S3C2410_DMAOP_STOP);
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s3c2410_dma_ctrl(chan->number | DMACH_LOW_LEVEL,
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S3C2410_DMAOP_STOP);
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}
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}
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@ -726,37 +723,34 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs)
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return IRQ_HANDLED;
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}
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static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel);
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/* s3c2410_request_dma
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*
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* get control of an dma channel
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*/
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int s3c2410_dma_request(unsigned int channel, struct s3c2410_dma_client *client,
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int s3c2410_dma_request(unsigned int channel,
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struct s3c2410_dma_client *client,
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void *dev)
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{
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan;
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unsigned long flags;
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int err;
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pr_debug("dma%d: s3c2410_request_dma: client=%s, dev=%p\n",
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channel, client->name, dev);
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check_channel(channel);
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local_irq_save(flags);
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dbg_showchan(chan);
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if (chan->in_use) {
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if (client != chan->client) {
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printk(KERN_ERR "dma%d: already in use\n", channel);
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local_irq_restore(flags);
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return -EBUSY;
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} else {
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printk(KERN_ERR "dma%d: client already has channel\n", channel);
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}
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chan = s3c2410_dma_map_channel(channel);
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if (chan == NULL) {
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local_irq_restore(flags);
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return -EBUSY;
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}
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dbg_showchan(chan);
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chan->client = client;
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chan->in_use = 1;
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@ -809,14 +803,14 @@ EXPORT_SYMBOL(s3c2410_dma_request);
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int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client)
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{
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
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unsigned long flags;
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check_channel(channel);
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if (chan == NULL)
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return -EINVAL;
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local_irq_save(flags);
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if (chan->client != client) {
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printk(KERN_WARNING "dma%d: possible free from different client (channel %p, passed %p)\n",
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channel, chan->client, client);
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@ -837,8 +831,12 @@ int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client)
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if (chan->irq_claimed)
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free_irq(chan->irq, (void *)chan);
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chan->irq_claimed = 0;
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if (!(channel & DMACH_LOW_LEVEL))
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dma_chan_map[channel] = NULL;
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local_irq_restore(flags);
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return 0;
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@ -848,8 +846,8 @@ EXPORT_SYMBOL(s3c2410_dma_free);
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static int s3c2410_dma_dostop(struct s3c2410_dma_chan *chan)
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{
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unsigned long tmp;
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unsigned long flags;
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unsigned long tmp;
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pr_debug("%s:\n", __FUNCTION__);
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@ -997,9 +995,10 @@ s3c2410_dma_started(struct s3c2410_dma_chan *chan)
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int
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s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op)
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{
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
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check_channel(channel);
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if (chan == NULL)
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return -EINVAL;
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switch (op) {
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case S3C2410_DMAOP_START:
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@ -1046,12 +1045,19 @@ int s3c2410_dma_config(dmach_t channel,
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int xferunit,
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int dcon)
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{
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
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pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n",
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__FUNCTION__, channel, xferunit, dcon);
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check_channel(channel);
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if (chan == NULL)
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return -EINVAL;
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printk("Initial dcon is %08x\n", dcon);
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dcon |= chan->dcon & dma_sel.dcon_mask;
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printk("New dcon is %08x\n", dcon);
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switch (xferunit) {
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case 1:
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@ -1086,9 +1092,10 @@ EXPORT_SYMBOL(s3c2410_dma_config);
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int s3c2410_dma_setflags(dmach_t channel, unsigned int flags)
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{
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
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check_channel(channel);
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if (chan == NULL)
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return -EINVAL;
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pr_debug("%s: chan=%p, flags=%08x\n", __FUNCTION__, chan, flags);
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@ -1106,9 +1113,10 @@ EXPORT_SYMBOL(s3c2410_dma_setflags);
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int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn)
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{
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
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check_channel(channel);
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if (chan == NULL)
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return -EINVAL;
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pr_debug("%s: chan=%p, op rtn=%p\n", __FUNCTION__, chan, rtn);
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@ -1121,9 +1129,10 @@ EXPORT_SYMBOL(s3c2410_dma_set_opfn);
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int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn)
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{
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
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check_channel(channel);
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if (chan == NULL)
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return -EINVAL;
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pr_debug("%s: chan=%p, callback rtn=%p\n", __FUNCTION__, chan, rtn);
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@ -1153,9 +1162,10 @@ int s3c2410_dma_devconfig(int channel,
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int hwcfg,
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unsigned long devaddr)
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{
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
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check_channel(channel);
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if (chan == NULL)
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return -EINVAL;
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pr_debug("%s: source=%d, hwcfg=%08x, devaddr=%08lx\n",
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__FUNCTION__, (int)source, hwcfg, devaddr);
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@ -1200,9 +1210,10 @@ EXPORT_SYMBOL(s3c2410_dma_devconfig);
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int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst)
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{
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struct s3c2410_dma_chan *chan = &s3c2410_chans[channel];
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struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
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check_channel(channel);
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if (chan == NULL)
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return -EINVAL;
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if (src != NULL)
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*src = dma_rdreg(chan, S3C2410_DMA_DCSRC);
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@ -1252,7 +1263,7 @@ static int s3c2410_dma_resume(struct sys_device *dev)
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#define s3c2410_dma_resume NULL
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#endif /* CONFIG_PM */
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static struct sysdev_class dma_sysclass = {
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struct sysdev_class dma_sysclass = {
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set_kset_name("s3c24xx-dma"),
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.suspend = s3c2410_dma_suspend,
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.resume = s3c2410_dma_resume,
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@ -1265,7 +1276,6 @@ static void s3c2410_dma_cache_ctor(void *p, kmem_cache_t *c, unsigned long f)
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memset(p, 0, sizeof(struct s3c2410_dma_buf));
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}
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/* initialisation code */
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static int __init s3c2410_init_dma(void)
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@ -1274,7 +1284,7 @@ static int __init s3c2410_init_dma(void)
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int channel;
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int ret;
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printk("S3C2410 DMA Driver, (c) 2003-2004 Simtec Electronics\n");
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printk("S3C24XX DMA Driver, (c) 2003-2004,2006 Simtec Electronics\n");
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dma_base = ioremap(S3C24XX_PA_DMA, 0x200);
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if (dma_base == NULL) {
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@ -1282,6 +1292,8 @@ static int __init s3c2410_init_dma(void)
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return -ENOMEM;
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}
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printk("Registering sysclass\n");
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ret = sysdev_class_register(&dma_sysclass);
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if (ret != 0) {
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printk(KERN_ERR "dma sysclass registration failed\n");
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@ -1335,4 +1347,95 @@ static int __init s3c2410_init_dma(void)
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return ret;
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}
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__initcall(s3c2410_init_dma);
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core_initcall(s3c2410_init_dma);
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static inline int is_channel_valid(unsigned int channel)
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{
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return (channel & DMA_CH_VALID);
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}
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/* s3c2410_dma_map_channel()
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*
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* turn the virtual channel number into a real, and un-used hardware
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* channel.
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*
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* currently this code uses first-free channel from the specified harware
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* map, not taking into account anything that the board setup code may
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* have to say about the likely peripheral set to be in use.
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*/
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struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel)
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{
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struct s3c24xx_dma_map *ch_map;
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struct s3c2410_dma_chan *dmach;
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int ch;
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if (dma_sel.map == NULL || channel > dma_sel.map_size)
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return NULL;
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ch_map = dma_sel.map + channel;
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for (ch = 0; ch < S3C2410_DMA_CHANNELS; ch++) {
|
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if (!is_channel_valid(ch_map->channels[ch]))
|
||||
continue;
|
||||
|
||||
if (s3c2410_chans[ch].in_use == 0) {
|
||||
printk("mapped channel %d to %d\n", channel, ch);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (ch >= S3C2410_DMA_CHANNELS)
|
||||
return NULL;
|
||||
|
||||
/* update our channel mapping */
|
||||
|
||||
dmach = &s3c2410_chans[ch];
|
||||
dma_chan_map[channel] = dmach;
|
||||
|
||||
/* select the channel */
|
||||
|
||||
(dma_sel.select)(dmach, ch_map);
|
||||
|
||||
return dmach;
|
||||
}
|
||||
|
||||
static void s3c24xx_dma_show_ch(struct s3c24xx_dma_map *map, int ch)
|
||||
{
|
||||
/* show the channel configuration */
|
||||
|
||||
printk("%2d: %20s, channels %c%c%c%c\n", ch, map->name,
|
||||
(is_channel_valid(map->channels[0]) ? '0' : '-'),
|
||||
(is_channel_valid(map->channels[1]) ? '1' : '-'),
|
||||
(is_channel_valid(map->channels[2]) ? '2' : '-'),
|
||||
(is_channel_valid(map->channels[3]) ? '3' : '-'));
|
||||
}
|
||||
|
||||
static int s3c24xx_dma_check_entry(struct s3c24xx_dma_map *map, int ch)
|
||||
{
|
||||
if (1)
|
||||
s3c24xx_dma_show_ch(map, ch);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int __init s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel)
|
||||
{
|
||||
struct s3c24xx_dma_map *nmap;
|
||||
size_t map_sz = sizeof(*nmap) * sel->map_size;
|
||||
int ptr;
|
||||
|
||||
nmap = kmalloc(map_sz, GFP_KERNEL);
|
||||
if (nmap == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
memcpy(nmap, sel->map, map_sz);
|
||||
memcpy(&dma_sel, sel, sizeof(*sel));
|
||||
|
||||
dma_sel.map = nmap;
|
||||
|
||||
for (ptr = 0; ptr < sel->map_size; ptr++)
|
||||
s3c24xx_dma_check_entry(nmap+ptr, ptr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
45
arch/arm/mach-s3c2410/dma.h
Normal file
45
arch/arm/mach-s3c2410/dma.h
Normal file
|
|
@ -0,0 +1,45 @@
|
|||
/* arch/arm/mach-s3c2410/dma.h
|
||||
*
|
||||
* Copyright (C) 2006 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
* Samsung S3C24XX DMA support
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
extern struct sysdev_class dma_sysclass;
|
||||
extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
|
||||
|
||||
#define DMA_CH_VALID (1<<31)
|
||||
|
||||
struct s3c24xx_dma_addr {
|
||||
unsigned long from;
|
||||
unsigned long to;
|
||||
};
|
||||
|
||||
/* struct s3c24xx_dma_map
|
||||
*
|
||||
* this holds the mapping information for the channel selected
|
||||
* to be connected to the specified device
|
||||
*/
|
||||
|
||||
struct s3c24xx_dma_map {
|
||||
const char *name;
|
||||
struct s3c24xx_dma_addr hw_addr;
|
||||
|
||||
unsigned long channels[S3C2410_DMA_CHANNELS];
|
||||
};
|
||||
|
||||
struct s3c24xx_dma_selection {
|
||||
struct s3c24xx_dma_map *map;
|
||||
unsigned long map_size;
|
||||
unsigned long dcon_mask;
|
||||
|
||||
void (*select)(struct s3c2410_dma_chan *chan,
|
||||
struct s3c24xx_dma_map *map);
|
||||
};
|
||||
|
||||
extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
|
||||
|
|
@ -23,6 +23,36 @@
|
|||
#define MAX_DMA_ADDRESS 0x40000000
|
||||
#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */
|
||||
|
||||
/* We use `virtual` dma channels to hide the fact we have only a limited
|
||||
* number of DMA channels, and not of all of them (dependant on the device)
|
||||
* can be attached to any DMA source. We therefore let the DMA core handle
|
||||
* the allocation of hardware channels to clients.
|
||||
*/
|
||||
|
||||
enum dma_ch {
|
||||
DMACH_XD0,
|
||||
DMACH_XD1,
|
||||
DMACH_SDI,
|
||||
DMACH_SPI0,
|
||||
DMACH_SPI1,
|
||||
DMACH_UART0,
|
||||
DMACH_UART1,
|
||||
DMACH_UART2,
|
||||
DMACH_TIMER,
|
||||
DMACH_I2S_IN,
|
||||
DMACH_I2S_OUT,
|
||||
DMACH_PCM_IN,
|
||||
DMACH_PCM_OUT,
|
||||
DMACH_MIC_IN,
|
||||
DMACH_USB_EP1,
|
||||
DMACH_USB_EP2,
|
||||
DMACH_USB_EP3,
|
||||
DMACH_USB_EP4,
|
||||
DMACH_MAX, /* the end entry */
|
||||
};
|
||||
|
||||
#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
|
||||
|
||||
/* we have 4 dma channels */
|
||||
#define S3C2410_DMA_CHANNELS (4)
|
||||
|
||||
|
|
@ -149,6 +179,8 @@ struct s3c2410_dma_stats {
|
|||
unsigned long timeout_failed;
|
||||
};
|
||||
|
||||
struct s3c2410_dma_map;
|
||||
|
||||
/* struct s3c2410_dma_chan
|
||||
*
|
||||
* full state information for each DMA channel
|
||||
|
|
@ -174,6 +206,8 @@ struct s3c2410_dma_chan {
|
|||
unsigned long load_timeout;
|
||||
unsigned int flags; /* channel flags */
|
||||
|
||||
struct s3c24xx_dma_map *map; /* channel hw maps */
|
||||
|
||||
/* channel's hardware position and configuration */
|
||||
void __iomem *regs; /* channels registers */
|
||||
void __iomem *addr_reg; /* data address register */
|
||||
|
|
|
|||
Loading…
Reference in a new issue