Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Input: i8042 - use pr_<level>, pr_fmt, fix dbg and __FILE__ use

Browse source 
Standardized message logging prefixes.
Removed \n from dbg macro, added \n to each dbg call site.
Removed direct use of __FILE__ from dbg, converted to pr_fmt(fmt)
Added non-debug printf argument verification of dbg calls
Removed "i8042.c" from printks, converted to pr_<level>

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
This commit is contained in:
Joe Perches 2010-11-29 23:33:07 -08:00 committed by Dmitry Torokhov
parent b029ffafe8
commit 4eb3c30b2e
3 changed files with 63 additions and 73 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

30
drivers/input/serio/i8042-x86ia64io.h
View file

@ -752,7 +752,7 @@ static int __init i8042_pnp_init(void)
#endif
if (i8042_nopnp) {
printk(KERN_INFO "i8042: PNP detection disabled\n");
pr_info("PNP detection disabled\n");
return 0;
}
@ -769,7 +769,7 @@ static int __init i8042_pnp_init(void)
#if defined(__ia64__)
return -ENODEV;
#else
printk(KERN_INFO "PNP: No PS/2 controller found. Probing ports directly.\n");
pr_info("PNP: No PS/2 controller found. Probing ports directly.\n");
return 0;
#endif
}
@ -781,7 +781,7 @@ static int __init i8042_pnp_init(void)
snprintf(aux_irq_str, sizeof(aux_irq_str),
"%d", i8042_pnp_aux_irq);
printk(KERN_INFO "PNP: PS/2 Controller [%s%s%s] at %#x,%#x irq %s%s%s\n",
pr_info("PNP: PS/2 Controller [%s%s%s] at %#x,%#x irq %s%s%s\n",
i8042_pnp_kbd_name, (i8042_pnp_kbd_devices && i8042_pnp_aux_devices) ? "," : "",
i8042_pnp_aux_name,
i8042_pnp_data_reg, i8042_pnp_command_reg,
@ -798,9 +798,7 @@ static int __init i8042_pnp_init(void)
if (((i8042_pnp_data_reg & ~0xf) == (i8042_data_reg & ~0xf) &&
i8042_pnp_data_reg != i8042_data_reg) ||
!i8042_pnp_data_reg) {
printk(KERN_WARNING
"PNP: PS/2 controller has invalid data port %#x; "
"using default %#x\n",
pr_warn("PNP: PS/2 controller has invalid data port %#x; using default %#x\n",
i8042_pnp_data_reg, i8042_data_reg);
i8042_pnp_data_reg = i8042_data_reg;
pnp_data_busted = true;
@ -809,33 +807,27 @@ static int __init i8042_pnp_init(void)
if (((i8042_pnp_command_reg & ~0xf) == (i8042_command_reg & ~0xf) &&
i8042_pnp_command_reg != i8042_command_reg) ||
!i8042_pnp_command_reg) {
printk(KERN_WARNING
"PNP: PS/2 controller has invalid command port %#x; "
"using default %#x\n",
pr_warn("PNP: PS/2 controller has invalid command port %#x; using default %#x\n",
i8042_pnp_command_reg, i8042_command_reg);
i8042_pnp_command_reg = i8042_command_reg;
pnp_data_busted = true;
}
if (!i8042_nokbd && !i8042_pnp_kbd_irq) {
printk(KERN_WARNING
"PNP: PS/2 controller doesn't have KBD irq; "
"using default %d\n", i8042_kbd_irq);
pr_warn("PNP: PS/2 controller doesn't have KBD irq; using default %d\n",
i8042_kbd_irq);
i8042_pnp_kbd_irq = i8042_kbd_irq;
pnp_data_busted = true;
}
if (!i8042_noaux && !i8042_pnp_aux_irq) {
if (!pnp_data_busted && i8042_pnp_kbd_irq) {
printk(KERN_WARNING
"PNP: PS/2 appears to have AUX port disabled, "
"if this is incorrect please boot with "
"i8042.nopnp\n");
pr_warn("PNP: PS/2 appears to have AUX port disabled, "
"if this is incorrect please boot with i8042.nopnp\n");
i8042_noaux = true;
} else {
printk(KERN_WARNING
"PNP: PS/2 controller doesn't have AUX irq; "
"using default %d\n", i8042_aux_irq);
pr_warn("PNP: PS/2 controller doesn't have AUX irq; using default %d\n",
i8042_aux_irq);
i8042_pnp_aux_irq = i8042_aux_irq;
}
}

92
drivers/input/serio/i8042.c
View file

@ -10,6 +10,8 @@
* the Free Software Foundation.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/module.h>
@ -225,8 +227,8 @@ static int i8042_flush(void)
udelay(50);
data = i8042_read_data();
i++;
dbg("%02x <- i8042 (flush, %s)", data,
str & I8042_STR_AUXDATA ? "aux" : "kbd");
dbg("%02x <- i8042 (flush, %s)\n",
data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
}
spin_unlock_irqrestore(&i8042_lock, flags);
@ -253,32 +255,32 @@ static int __i8042_command(unsigned char *param, int command)
if (error)
return error;
dbg("%02x -> i8042 (command)", command & 0xff);
dbg("%02x -> i8042 (command)\n", command & 0xff);
i8042_write_command(command & 0xff);
for (i = 0; i < ((command >> 12) & 0xf); i++) {
error = i8042_wait_write();
if (error)
return error;
dbg("%02x -> i8042 (parameter)", param[i]);
dbg("%02x -> i8042 (parameter)\n", param[i]);
i8042_write_data(param[i]);
}
for (i = 0; i < ((command >> 8) & 0xf); i++) {
error = i8042_wait_read();
if (error) {
dbg(" -- i8042 (timeout)");
dbg(" -- i8042 (timeout)\n");
return error;
}
if (command == I8042_CMD_AUX_LOOP &&
!(i8042_read_status() & I8042_STR_AUXDATA)) {
dbg(" -- i8042 (auxerr)");
dbg(" -- i8042 (auxerr)\n");
return -1;
}
param[i] = i8042_read_data();
dbg("%02x <- i8042 (return)", param[i]);
dbg("%02x <- i8042 (return)\n", param[i]);
}
return 0;
@ -309,7 +311,7 @@ static int i8042_kbd_write(struct serio *port, unsigned char c)
spin_lock_irqsave(&i8042_lock, flags);
if (!(retval = i8042_wait_write())) {
dbg("%02x -> i8042 (kbd-data)", c);
dbg("%02x -> i8042 (kbd-data)\n", c);
i8042_write_data(c);
}
@ -355,17 +357,14 @@ static void i8042_port_close(struct serio *serio)
i8042_ctr &= ~irq_bit;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
printk(KERN_WARNING
"i8042.c: Can't write CTR while closing %s port.\n",
port_name);
pr_warn("Can't write CTR while closing %s port\n", port_name);
udelay(50);
i8042_ctr &= ~disable_bit;
i8042_ctr |= irq_bit;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
printk(KERN_ERR "i8042.c: Can't reactivate %s port.\n",
port_name);
pr_err("Can't reactivate %s port\n", port_name);
/*
* See if there is any data appeared while we were messing with
@ -456,7 +455,8 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id)
str = i8042_read_status();
if (unlikely(~str & I8042_STR_OBF)) {
spin_unlock_irqrestore(&i8042_lock, flags);
if (irq) dbg("Interrupt %d, without any data", irq);
if (irq)
dbg("Interrupt %d, without any data\n", irq);
ret = 0;
goto out;
}
@ -469,7 +469,8 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id)
dfl = 0;
if (str & I8042_STR_MUXERR) {
dbg("MUX error, status is %02x, data is %02x", str, data);
dbg("MUX error, status is %02x, data is %02x\n",
str, data);
/*
* When MUXERR condition is signalled the data register can only contain
* 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
@ -512,7 +513,7 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id)
port = &i8042_ports[port_no];
serio = port->exists ? port->serio : NULL;
dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
dbg("%02x <- i8042 (interrupt, %d, %d%s%s)\n",
data, port_no, irq,
dfl & SERIO_PARITY ? ", bad parity" : "",
dfl & SERIO_TIMEOUT ? ", timeout" : "");
@ -540,7 +541,7 @@ static int i8042_enable_kbd_port(void)
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
i8042_ctr &= ~I8042_CTR_KBDINT;
i8042_ctr |= I8042_CTR_KBDDIS;
printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
pr_err("Failed to enable KBD port\n");
return -EIO;
}
@ -559,7 +560,7 @@ static int i8042_enable_aux_port(void)
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
i8042_ctr &= ~I8042_CTR_AUXINT;
i8042_ctr |= I8042_CTR_AUXDIS;
printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
pr_err("Failed to enable AUX port\n");
return -EIO;
}
@ -641,7 +642,7 @@ static int __init i8042_check_mux(void)
if (i8042_set_mux_mode(true, &mux_version))
return -1;
printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
pr_info("Detected active multiplexing controller, rev %d.%d\n",
(mux_version >> 4) & 0xf, mux_version & 0xf);
/*
@ -651,7 +652,7 @@ static int __init i8042_check_mux(void)
i8042_ctr &= ~I8042_CTR_AUXINT;
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
pr_err("Failed to disable AUX port, can't use MUX\n");
return -EIO;
}
@ -676,8 +677,8 @@ static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
str = i8042_read_status();
if (str & I8042_STR_OBF) {
data = i8042_read_data();
dbg("%02x <- i8042 (aux_test_irq, %s)",
data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
dbg("%02x <- i8042 (aux_test_irq, %s)\n",
data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
if (i8042_irq_being_tested &&
data == 0xa5 && (str & I8042_STR_AUXDATA))
complete(&i8042_aux_irq_delivered);
@ -770,8 +771,8 @@ static int __init i8042_check_aux(void)
*/
if (i8042_toggle_aux(false)) {
printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
}
if (i8042_toggle_aux(true))
@ -819,7 +820,7 @@ static int __init i8042_check_aux(void)
* AUX IRQ was never delivered so we need to flush the controller to
* get rid of the byte we put there; otherwise keyboard may not work.
*/
dbg(" -- i8042 (aux irq test timeout)");
dbg(" -- i8042 (aux irq test timeout)\n");
i8042_flush();
retval = -1;
}
@ -845,7 +846,7 @@ static int __init i8042_check_aux(void)
static int i8042_controller_check(void)
{
if (i8042_flush() == I8042_BUFFER_SIZE) {
printk(KERN_ERR "i8042.c: No controller found.\n");
pr_err("No controller found\n");
return -ENODEV;
}
@ -864,15 +865,15 @@ static int i8042_controller_selftest(void)
do {
if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
pr_err("i8042 controller self test timeout\n");
return -ENODEV;
}
if (param == I8042_RET_CTL_TEST)
return 0;
printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
param, I8042_RET_CTL_TEST);
pr_err("i8042 controller selftest failed. (%#x != %#x)\n",
param, I8042_RET_CTL_TEST);
msleep(50);
} while (i++ < 5);
@ -883,8 +884,7 @@ static int i8042_controller_selftest(void)
* and user will still get a working keyboard. This is especially
* important on netbooks. On other arches we trust hardware more.
*/
printk(KERN_INFO
"i8042: giving up on controller selftest, continuing anyway...\n");
pr_info("giving up on controller selftest, continuing anyway...\n");
return 0;
#else
return -EIO;
@ -909,8 +909,7 @@ static int i8042_controller_init(void)
do {
if (n >= 10) {
printk(KERN_ERR
"i8042.c: Unable to get stable CTR read.\n");
pr_err("Unable to get stable CTR read\n");
return -EIO;
}
@ -918,8 +917,7 @@ static int i8042_controller_init(void)
udelay(50);
if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
printk(KERN_ERR
"i8042.c: Can't read CTR while initializing i8042.\n");
pr_err("Can't read CTR while initializing i8042\n");
return -EIO;
}
@ -943,7 +941,7 @@ static int i8042_controller_init(void)
if (i8042_unlock)
i8042_ctr |= I8042_CTR_IGNKEYLOCK;
else
printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
pr_warn("Warning: Keylock active\n");
}
spin_unlock_irqrestore(&i8042_lock, flags);
@ -970,7 +968,7 @@ static int i8042_controller_init(void)
*/
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
pr_err("Can't write CTR while initializing i8042\n");
return -EIO;
}
@ -1000,7 +998,7 @@ static void i8042_controller_reset(void)
i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
printk(KERN_WARNING "i8042.c: Can't write CTR while resetting.\n");
pr_warn("Can't write CTR while resetting\n");
/*
* Disable MUX mode if present.
@ -1021,7 +1019,7 @@ static void i8042_controller_reset(void)
*/
if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
pr_warn("Can't restore CTR\n");
}
@ -1045,14 +1043,14 @@ static long i8042_panic_blink(int state)
led = (state) ? 0x01 | 0x04 : 0;
while (i8042_read_status() & I8042_STR_IBF)
DELAY;
dbg("%02x -> i8042 (panic blink)", 0xed);
dbg("%02x -> i8042 (panic blink)\n", 0xed);
i8042_suppress_kbd_ack = 2;
i8042_write_data(0xed); /* set leds */
DELAY;
while (i8042_read_status() & I8042_STR_IBF)
DELAY;
DELAY;
dbg("%02x -> i8042 (panic blink)", led);
dbg("%02x -> i8042 (panic blink)\n", led);
i8042_write_data(led);
DELAY;
return delay;
@ -1068,9 +1066,7 @@ static void i8042_dritek_enable(void)
error = i8042_command(&param, 0x1059);
if (error)
printk(KERN_WARNING
"Failed to enable DRITEK extension: %d\n",
error);
pr_warn("Failed to enable DRITEK extension: %d\n", error);
}
#endif
@ -1105,10 +1101,10 @@ static int i8042_controller_resume(bool force_reset)
i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
printk(KERN_WARNING "i8042: Can't write CTR to resume, retrying...\n");
pr_warn("Can't write CTR to resume, retrying...\n");
msleep(50);
if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
printk(KERN_ERR "i8042: CTR write retry failed\n");
pr_err("CTR write retry failed\n");
return -EIO;
}
}
@ -1121,9 +1117,7 @@ static int i8042_controller_resume(bool force_reset)
if (i8042_mux_present) {
if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
printk(KERN_WARNING
"i8042: failed to resume active multiplexor, "
"mouse won't work.\n");
pr_warn("failed to resume active multiplexor, mouse won't work\n");
} else if (i8042_ports[I8042_AUX_PORT_NO].serio)
i8042_enable_aux_port();

14
drivers/input/serio/i8042.h
View file

@ -89,15 +89,19 @@
#ifdef DEBUG
static unsigned long i8042_start_time;
#define dbg_init() do { i8042_start_time = jiffies; } while (0)
#define dbg(format, arg...) \
do { \
#define dbg(format, arg...) \
do { \
if (i8042_debug) \
printk(KERN_DEBUG __FILE__ ": " format " [%d]\n" , \
## arg, (int) (jiffies - i8042_start_time)); \
printk(KERN_DEBUG KBUILD_MODNAME ": [%d] " format, \
(int) (jiffies - i8042_start_time), ##arg); \
} while (0)
#else
#define dbg_init() do { } while (0)
#define dbg(format, arg...) do {} while (0)
#define dbg(format, arg...) \
do { \
if (0) \
printk(KERN_DEBUG pr_fmt(format), ##arg); \
} while (0)
#endif
#endif /* _I8042_H */