wl12xx: add hw configuration for max supported AMDPU size
The wl12xx chips do the AMDPU aggregation work in the firmware, but it supports a maximum of 8 frames per block. Configure the mac80211 hw structure accordingly. Signed-off-by: Luciano Coelho <coelho@ti.com> Tested-by: Juuso Oikarinen <juuso.oikarinen@nokia.com>
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@ -3180,6 +3180,8 @@ int wl1271_init_ieee80211(struct wl1271 *wl)
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wl->hw->sta_data_size = sizeof(struct wl1271_station);
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wl->hw->max_rx_aggregation_subframes = 8;
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return 0;
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}
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EXPORT_SYMBOL_GPL(wl1271_init_ieee80211);
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