drm/radeon/kms/igp: sideport is AMD only
Intel variants don't support it. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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e06b14ee91
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4 changed files with 11 additions and 11 deletions
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@ -1032,21 +1032,18 @@ bool radeon_atombios_sideport_present(struct radeon_device *rdev)
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u8 frev, crev;
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u8 frev, crev;
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u16 data_offset;
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u16 data_offset;
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/* sideport is AMD only */
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if (rdev->family == CHIP_RS600)
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return false;
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if (atom_parse_data_header(mode_info->atom_context, index, NULL,
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if (atom_parse_data_header(mode_info->atom_context, index, NULL,
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&frev, &crev, &data_offset)) {
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&frev, &crev, &data_offset)) {
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igp_info = (union igp_info *)(mode_info->atom_context->bios +
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igp_info = (union igp_info *)(mode_info->atom_context->bios +
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data_offset);
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data_offset);
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switch (crev) {
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switch (crev) {
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case 1:
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case 1:
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/* AMD IGPS */
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if (igp_info->info.ulBootUpMemoryClock)
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if ((rdev->family == CHIP_RS690) ||
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return true;
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(rdev->family == CHIP_RS740)) {
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if (igp_info->info.ulBootUpMemoryClock)
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return true;
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} else {
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if (igp_info->info.ucMemoryType & 0xf0)
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return true;
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}
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break;
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break;
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case 2:
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case 2:
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if (igp_info->info_2.ucMemoryType & 0x0f)
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if (igp_info->info_2.ucMemoryType & 0x0f)
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@ -693,6 +693,10 @@ bool radeon_combios_sideport_present(struct radeon_device *rdev)
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struct drm_device *dev = rdev->ddev;
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struct drm_device *dev = rdev->ddev;
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u16 igp_info;
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u16 igp_info;
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/* sideport is AMD only */
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if (rdev->family == CHIP_RS400)
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return false;
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igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE);
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igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE);
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if (igp_info) {
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if (igp_info) {
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@ -696,7 +696,6 @@ void rs600_mc_init(struct radeon_device *rdev)
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rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
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rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
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base = RREG32_MC(R_000004_MC_FB_LOCATION);
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base = RREG32_MC(R_000004_MC_FB_LOCATION);
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base = G_000004_MC_FB_START(base) << 16;
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base = G_000004_MC_FB_START(base) << 16;
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rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
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radeon_vram_location(rdev, &rdev->mc, base);
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radeon_vram_location(rdev, &rdev->mc, base);
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rdev->mc.gtt_base_align = 0;
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rdev->mc.gtt_base_align = 0;
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radeon_gtt_location(rdev, &rdev->mc);
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radeon_gtt_location(rdev, &rdev->mc);
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@ -159,8 +159,8 @@ void rs690_mc_init(struct radeon_device *rdev)
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rdev->mc.visible_vram_size = rdev->mc.aper_size;
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rdev->mc.visible_vram_size = rdev->mc.aper_size;
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base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
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base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
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base = G_000100_MC_FB_START(base) << 16;
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base = G_000100_MC_FB_START(base) << 16;
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rs690_pm_info(rdev);
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rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
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rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
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rs690_pm_info(rdev);
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radeon_vram_location(rdev, &rdev->mc, base);
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radeon_vram_location(rdev, &rdev->mc, base);
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rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;
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rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;
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radeon_gtt_location(rdev, &rdev->mc);
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radeon_gtt_location(rdev, &rdev->mc);
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