bcma: add constants for chip ids
The chip IDs are used all over bcma and no constants where defined. This patch adds the constants and makes bcma use them. Acked-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Hauke Mehrtens
John W. Linville
parent
00eeedcf08
commit
4b4f5be2e4
5 changed files with 90 additions and 55 deletions
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@ -59,10 +59,10 @@ static void bcma_pmu_pll_init(struct bcma_drv_cc *cc)
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struct bcma_bus *bus = cc->core->bus;
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switch (bus->chipinfo.id) {
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case 0x4313:
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case 0x4331:
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case 43224:
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case 43225:
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case BCMA_CHIP_ID_BCM4313:
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case BCMA_CHIP_ID_BCM4331:
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case BCMA_CHIP_ID_BCM43224:
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case BCMA_CHIP_ID_BCM43225:
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break;
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default:
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pr_err("PLL init unknown for device 0x%04X\n",
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@ -76,13 +76,13 @@ static void bcma_pmu_resources_init(struct bcma_drv_cc *cc)
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u32 min_msk = 0, max_msk = 0;
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switch (bus->chipinfo.id) {
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case 0x4313:
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case BCMA_CHIP_ID_BCM4313:
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min_msk = 0x200D;
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max_msk = 0xFFFF;
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break;
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case 0x4331:
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case 43224:
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case 43225:
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case BCMA_CHIP_ID_BCM4331:
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case BCMA_CHIP_ID_BCM43224:
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case BCMA_CHIP_ID_BCM43225:
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break;
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default:
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pr_err("PMU resource config unknown for device 0x%04X\n",
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@ -101,10 +101,10 @@ void bcma_pmu_swreg_init(struct bcma_drv_cc *cc)
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struct bcma_bus *bus = cc->core->bus;
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switch (bus->chipinfo.id) {
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case 0x4313:
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case 0x4331:
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case 43224:
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case 43225:
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case BCMA_CHIP_ID_BCM4313:
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case BCMA_CHIP_ID_BCM4331:
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case BCMA_CHIP_ID_BCM43224:
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case BCMA_CHIP_ID_BCM43225:
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break;
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default:
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pr_err("PMU switch/regulators init unknown for device "
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@ -138,15 +138,15 @@ void bcma_pmu_workarounds(struct bcma_drv_cc *cc)
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struct bcma_bus *bus = cc->core->bus;
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switch (bus->chipinfo.id) {
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case 0x4313:
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case BCMA_CHIP_ID_BCM4313:
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bcma_chipco_chipctl_maskset(cc, 0, ~0, 0x7);
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break;
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case 0x4331:
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case 43431:
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case BCMA_CHIP_ID_BCM4331:
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case BCMA_CHIP_ID_BCM43431:
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/* Ext PA lines must be enabled for tx on BCM4331 */
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bcma_chipco_bcm4331_ext_pa_lines_ctl(cc, true);
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break;
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case 43224:
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case BCMA_CHIP_ID_BCM43224:
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if (bus->chipinfo.rev == 0) {
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pr_err("Workarounds for 43224 rev 0 not fully "
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"implemented\n");
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@ -155,7 +155,7 @@ void bcma_pmu_workarounds(struct bcma_drv_cc *cc)
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bcma_chipco_chipctl_maskset(cc, 0, ~0, 0xF0);
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}
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break;
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case 43225:
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case BCMA_CHIP_ID_BCM43225:
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break;
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default:
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pr_err("Workarounds unknown for device 0x%04X\n",
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@ -194,17 +194,17 @@ u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc)
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struct bcma_bus *bus = cc->core->bus;
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switch (bus->chipinfo.id) {
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case 0x4716:
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case 0x4748:
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case 47162:
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case 0x4313:
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case 0x5357:
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case 0x4749:
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case 53572:
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case BCMA_CHIP_ID_BCM4716:
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case BCMA_CHIP_ID_BCM4748:
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case BCMA_CHIP_ID_BCM47162:
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case BCMA_CHIP_ID_BCM4313:
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case BCMA_CHIP_ID_BCM5357:
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case BCMA_CHIP_ID_BCM4749:
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case BCMA_CHIP_ID_BCM53572:
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/* always 20Mhz */
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return 20000 * 1000;
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case 0x5356:
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case 0x5300:
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case BCMA_CHIP_ID_BCM5356:
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case BCMA_CHIP_ID_BCM4706:
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/* always 25Mhz */
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return 25000 * 1000;
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default:
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@ -227,7 +227,8 @@ static u32 bcma_pmu_clock(struct bcma_drv_cc *cc, u32 pll0, u32 m)
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BUG_ON(!m || m > 4);
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if (bus->chipinfo.id == 0x5357 || bus->chipinfo.id == 0x4749) {
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if (bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 ||
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bus->chipinfo.id == BCMA_CHIP_ID_BCM4749) {
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/* Detect failure in clock setting */
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tmp = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT);
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if (tmp & 0x40000)
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@ -259,22 +260,22 @@ u32 bcma_pmu_get_clockcontrol(struct bcma_drv_cc *cc)
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struct bcma_bus *bus = cc->core->bus;
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switch (bus->chipinfo.id) {
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case 0x4716:
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case 0x4748:
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case 47162:
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case BCMA_CHIP_ID_BCM4716:
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case BCMA_CHIP_ID_BCM4748:
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case BCMA_CHIP_ID_BCM47162:
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return bcma_pmu_clock(cc, BCMA_CC_PMU4716_MAINPLL_PLL0,
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BCMA_CC_PMU5_MAINPLL_SSB);
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case 0x5356:
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case BCMA_CHIP_ID_BCM5356:
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return bcma_pmu_clock(cc, BCMA_CC_PMU5356_MAINPLL_PLL0,
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BCMA_CC_PMU5_MAINPLL_SSB);
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case 0x5357:
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case 0x4749:
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case BCMA_CHIP_ID_BCM5357:
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case BCMA_CHIP_ID_BCM4749:
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return bcma_pmu_clock(cc, BCMA_CC_PMU5357_MAINPLL_PLL0,
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BCMA_CC_PMU5_MAINPLL_SSB);
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case 0x5300:
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case BCMA_CHIP_ID_BCM4706:
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return bcma_pmu_clock(cc, BCMA_CC_PMU4706_MAINPLL_PLL0,
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BCMA_CC_PMU5_MAINPLL_SSB);
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case 53572:
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case BCMA_CHIP_ID_BCM53572:
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return 75000000;
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default:
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pr_warn("No backplane clock specified for %04X device, "
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@ -289,17 +290,17 @@ u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc)
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{
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struct bcma_bus *bus = cc->core->bus;
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if (bus->chipinfo.id == 53572)
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if (bus->chipinfo.id == BCMA_CHIP_ID_BCM53572)
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return 300000000;
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if (cc->pmu.rev >= 5) {
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u32 pll;
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switch (bus->chipinfo.id) {
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case 0x5356:
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case BCMA_CHIP_ID_BCM5356:
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pll = BCMA_CC_PMU5356_MAINPLL_PLL0;
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break;
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case 0x5357:
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case 0x4749:
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case BCMA_CHIP_ID_BCM5357:
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case BCMA_CHIP_ID_BCM4749:
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pll = BCMA_CC_PMU5357_MAINPLL_PLL0;
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break;
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default:
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@ -307,7 +308,7 @@ u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc)
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break;
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}
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/* TODO: if (bus->chipinfo.id == 0x5300)
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/* TODO: if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706)
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return si_4706_pmu_clock(sih, osh, cc, PMU4706_MAINPLL_PLL0, PMU5_MAINPLL_CPU); */
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return bcma_pmu_clock(cc, pll, BCMA_CC_PMU5_MAINPLL_CPU);
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}
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@ -22,15 +22,15 @@
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/* The 47162a0 hangs when reading MIPS DMP registers registers */
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static inline bool bcma_core_mips_bcm47162a0_quirk(struct bcma_device *dev)
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{
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return dev->bus->chipinfo.id == 47162 && dev->bus->chipinfo.rev == 0 &&
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dev->id.id == BCMA_CORE_MIPS_74K;
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return dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM47162 &&
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dev->bus->chipinfo.rev == 0 && dev->id.id == BCMA_CORE_MIPS_74K;
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}
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/* The 5357b0 hangs when reading USB20H DMP registers */
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static inline bool bcma_core_mips_bcm5357b0_quirk(struct bcma_device *dev)
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{
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return (dev->bus->chipinfo.id == 0x5357 ||
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dev->bus->chipinfo.id == 0x4749) &&
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return (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 ||
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dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4749) &&
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dev->bus->chipinfo.pkg == 11 &&
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dev->id.id == BCMA_CORE_USB20_HOST;
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}
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@ -215,7 +215,8 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,
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} else {
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writel(val, mmio);
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if (chipid == 0x4716 || chipid == 0x4748)
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if (chipid == BCMA_CHIP_ID_BCM4716 ||
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chipid == BCMA_CHIP_ID_BCM4748)
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readl(mmio);
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}
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@ -434,13 +435,14 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)
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* as mips can't generate 64-bit address on the
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* backplane.
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*/
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if (bus->chipinfo.id == 0x4716 || bus->chipinfo.id == 0x4748) {
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if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4716 ||
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bus->chipinfo.id == BCMA_CHIP_ID_BCM4748) {
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pc_host->mem_resource.start = BCMA_SOC_PCI_MEM;
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pc_host->mem_resource.end = BCMA_SOC_PCI_MEM +
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BCMA_SOC_PCI_MEM_SZ - 1;
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pcicore_write32(pc, BCMA_CORE_PCI_SBTOPCI0,
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BCMA_CORE_PCI_SBTOPCI_MEM | BCMA_SOC_PCI_MEM);
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} else if (bus->chipinfo.id == 0x5300) {
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} else if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) {
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tmp = BCMA_CORE_PCI_SBTOPCI_MEM;
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tmp |= BCMA_CORE_PCI_SBTOPCI_PREF;
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tmp |= BCMA_CORE_PCI_SBTOPCI_BURST;
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@ -468,11 +468,11 @@ static bool bcma_sprom_ext_available(struct bcma_bus *bus)
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/* older chipcommon revisions use chip status register */
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chip_status = bcma_read32(bus->drv_cc.core, BCMA_CC_CHIPSTAT);
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switch (bus->chipinfo.id) {
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case 0x4313:
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case BCMA_CHIP_ID_BCM4313:
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present_mask = BCMA_CC_CHIPST_4313_SPROM_PRESENT;
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break;
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case 0x4331:
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case BCMA_CHIP_ID_BCM4331:
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present_mask = BCMA_CC_CHIPST_4331_SPROM_PRESENT;
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break;
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@ -494,16 +494,16 @@ static bool bcma_sprom_onchip_available(struct bcma_bus *bus)
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chip_status = bcma_read32(bus->drv_cc.core, BCMA_CC_CHIPSTAT);
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switch (bus->chipinfo.id) {
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case 0x4313:
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case BCMA_CHIP_ID_BCM4313:
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present = chip_status & BCMA_CC_CHIPST_4313_OTP_PRESENT;
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break;
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case 0x4331:
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case BCMA_CHIP_ID_BCM4331:
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present = chip_status & BCMA_CC_CHIPST_4331_OTP_PRESENT;
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break;
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case 43224:
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case 43225:
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case BCMA_CHIP_ID_BCM43224:
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case BCMA_CHIP_ID_BCM43225:
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/* for these chips OTP is always available */
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present = true;
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break;
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@ -579,13 +579,15 @@ int bcma_sprom_get(struct bcma_bus *bus)
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if (!sprom)
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return -ENOMEM;
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if (bus->chipinfo.id == 0x4331 || bus->chipinfo.id == 43431)
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if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4331 ||
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bus->chipinfo.id == BCMA_CHIP_ID_BCM43431)
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bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, false);
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pr_debug("SPROM offset 0x%x\n", offset);
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bcma_sprom_read(bus, offset, sprom);
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if (bus->chipinfo.id == 0x4331 || bus->chipinfo.id == 43431)
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if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4331 ||
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bus->chipinfo.id == BCMA_CHIP_ID_BCM43431)
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bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, true);
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err = bcma_sprom_valid(sprom);
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@ -137,6 +137,36 @@ struct bcma_host_ops {
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#define BCMA_MAX_NR_CORES 16
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/* Chip IDs of PCIe devices */
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#define BCMA_CHIP_ID_BCM4313 0x4313
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#define BCMA_CHIP_ID_BCM43224 43224
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#define BCMA_PKG_ID_BCM43224_FAB_CSM 0x8
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#define BCMA_PKG_ID_BCM43224_FAB_SMIC 0xa
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#define BCMA_CHIP_ID_BCM43225 43225
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#define BCMA_CHIP_ID_BCM43227 43227
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#define BCMA_CHIP_ID_BCM43228 43228
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#define BCMA_CHIP_ID_BCM43421 43421
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#define BCMA_CHIP_ID_BCM43428 43428
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#define BCMA_CHIP_ID_BCM43431 43431
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#define BCMA_CHIP_ID_BCM43460 43460
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#define BCMA_CHIP_ID_BCM4331 0x4331
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#define BCMA_CHIP_ID_BCM6362 0x6362
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#define BCMA_CHIP_ID_BCM4360 0x4360
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#define BCMA_CHIP_ID_BCM4352 0x4352
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/* Chip IDs of SoCs */
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#define BCMA_CHIP_ID_BCM4706 0x5300
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#define BCMA_CHIP_ID_BCM4716 0x4716
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#define BCMA_PKG_ID_BCM4716 8
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#define BCMA_PKG_ID_BCM4717 9
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#define BCMA_PKG_ID_BCM4718 10
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#define BCMA_CHIP_ID_BCM47162 47162
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#define BCMA_CHIP_ID_BCM4748 0x4748
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#define BCMA_CHIP_ID_BCM4749 0x4749
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#define BCMA_CHIP_ID_BCM5356 0x5356
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#define BCMA_CHIP_ID_BCM5357 0x5357
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#define BCMA_CHIP_ID_BCM53572 53572
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struct bcma_device {
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struct bcma_bus *bus;
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struct bcma_device_id id;
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