Now that a struct is the only member left in struct
mips_fpu_emulator_stats cleanup that unnecessary nesting of structs. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
parent
baee502ce2
commit
4a99d1e25b
3 changed files with 34 additions and 36 deletions
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@ -70,7 +70,7 @@ static int fpux_emu(struct pt_regs *,
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/* Further private data for which no space exists in mips_fpu_soft_struct */
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/* Further private data for which no space exists in mips_fpu_soft_struct */
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struct mips_fpu_emulator_private fpuemuprivate;
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struct mips_fpu_emulator_stats fpuemustats;
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/* Control registers */
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/* Control registers */
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@ -210,7 +210,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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unsigned int cond;
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unsigned int cond;
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if (get_user(ir, (mips_instruction *) xcp->cp0_epc)) {
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if (get_user(ir, (mips_instruction *) xcp->cp0_epc)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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@ -241,7 +241,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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return SIGILL;
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return SIGILL;
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}
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}
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if (get_user(ir, (mips_instruction *) emulpc)) {
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if (get_user(ir, (mips_instruction *) emulpc)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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/* __compute_return_epc() will have updated cp0_epc */
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/* __compute_return_epc() will have updated cp0_epc */
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@ -254,7 +254,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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}
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}
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emul:
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emul:
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fpuemuprivate.stats.emulated++;
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fpuemustats.emulated++;
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switch (MIPSInst_OPCODE(ir)) {
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switch (MIPSInst_OPCODE(ir)) {
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#ifndef SINGLE_ONLY_FPU
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#ifndef SINGLE_ONLY_FPU
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case ldc1_op:{
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case ldc1_op:{
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@ -262,9 +262,9 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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MIPSInst_SIMM(ir));
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MIPSInst_SIMM(ir));
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u64 val;
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u64 val;
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fpuemuprivate.stats.loads++;
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fpuemustats.loads++;
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if (get_user(val, va)) {
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if (get_user(val, va)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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DITOREG(val, MIPSInst_RT(ir));
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DITOREG(val, MIPSInst_RT(ir));
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@ -276,10 +276,10 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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MIPSInst_SIMM(ir));
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MIPSInst_SIMM(ir));
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u64 val;
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u64 val;
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fpuemuprivate.stats.stores++;
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fpuemustats.stores++;
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DIFROMREG(val, MIPSInst_RT(ir));
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DIFROMREG(val, MIPSInst_RT(ir));
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if (put_user(val, va)) {
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if (put_user(val, va)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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break;
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break;
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@ -291,9 +291,9 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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MIPSInst_SIMM(ir));
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MIPSInst_SIMM(ir));
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u32 val;
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u32 val;
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fpuemuprivate.stats.loads++;
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fpuemustats.loads++;
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if (get_user(val, va)) {
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if (get_user(val, va)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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#ifdef SINGLE_ONLY_FPU
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#ifdef SINGLE_ONLY_FPU
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@ -311,7 +311,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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MIPSInst_SIMM(ir));
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MIPSInst_SIMM(ir));
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u32 val;
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u32 val;
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fpuemuprivate.stats.stores++;
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fpuemustats.stores++;
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#ifdef SINGLE_ONLY_FPU
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#ifdef SINGLE_ONLY_FPU
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if (MIPSInst_RT(ir) & 1) {
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if (MIPSInst_RT(ir) & 1) {
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/* illegal register in single-float mode */
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/* illegal register in single-float mode */
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@ -320,7 +320,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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#endif
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#endif
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SIFROMREG(val, MIPSInst_RT(ir));
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SIFROMREG(val, MIPSInst_RT(ir));
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if (put_user(val, va)) {
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if (put_user(val, va)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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break;
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break;
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@ -460,7 +460,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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if (get_user(ir, (mips_instruction *)
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if (get_user(ir, (mips_instruction *)
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(void *) xcp->cp0_epc)) {
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(void *) xcp->cp0_epc)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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@ -626,7 +626,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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{
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{
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unsigned rcsr = 0; /* resulting csr */
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unsigned rcsr = 0; /* resulting csr */
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fpuemuprivate.stats.cp1xops++;
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fpuemustats.cp1xops++;
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switch (MIPSInst_FMA_FFMT(ir)) {
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switch (MIPSInst_FMA_FFMT(ir)) {
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case s_fmt:{ /* 0 */
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case s_fmt:{ /* 0 */
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@ -641,9 +641,9 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
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va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
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xcp->regs[MIPSInst_FT(ir)]);
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xcp->regs[MIPSInst_FT(ir)]);
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fpuemuprivate.stats.loads++;
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fpuemustats.loads++;
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if (get_user(val, va)) {
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if (get_user(val, va)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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#ifdef SINGLE_ONLY_FPU
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#ifdef SINGLE_ONLY_FPU
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@ -661,7 +661,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
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va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
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xcp->regs[MIPSInst_FT(ir)]);
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xcp->regs[MIPSInst_FT(ir)]);
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fpuemuprivate.stats.stores++;
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fpuemustats.stores++;
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#ifdef SINGLE_ONLY_FPU
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#ifdef SINGLE_ONLY_FPU
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if (MIPSInst_FS(ir) & 1) {
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if (MIPSInst_FS(ir) & 1) {
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/* illegal register in single-float
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/* illegal register in single-float
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@ -673,7 +673,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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SIFROMREG(val, MIPSInst_FS(ir));
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SIFROMREG(val, MIPSInst_FS(ir));
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if (put_user(val, va)) {
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if (put_user(val, va)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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break;
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break;
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@ -735,9 +735,9 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
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va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
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xcp->regs[MIPSInst_FT(ir)]);
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xcp->regs[MIPSInst_FT(ir)]);
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fpuemuprivate.stats.loads++;
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fpuemustats.loads++;
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if (get_user(val, va)) {
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if (get_user(val, va)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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DITOREG(val, MIPSInst_FD(ir));
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DITOREG(val, MIPSInst_FD(ir));
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@ -747,10 +747,10 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
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va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
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xcp->regs[MIPSInst_FT(ir)]);
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xcp->regs[MIPSInst_FT(ir)]);
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fpuemuprivate.stats.stores++;
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fpuemustats.stores++;
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DIFROMREG(val, MIPSInst_FS(ir));
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DIFROMREG(val, MIPSInst_FS(ir));
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if (put_user(val, va)) {
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if (put_user(val, va)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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break;
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break;
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@ -818,7 +818,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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#endif
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#endif
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} rv; /* resulting value */
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} rv; /* resulting value */
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fpuemuprivate.stats.cp1ops++;
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fpuemustats.cp1ops++;
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switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) {
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switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) {
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case s_fmt:{ /* 0 */
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case s_fmt:{ /* 0 */
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union {
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union {
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@ -1299,7 +1299,7 @@ int fpu_emulator_cop1Handler(int xcptno, struct pt_regs *xcp,
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prevepc = xcp->cp0_epc;
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prevepc = xcp->cp0_epc;
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if (get_user(insn, (mips_instruction *) xcp->cp0_epc)) {
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if (get_user(insn, (mips_instruction *) xcp->cp0_epc)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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if (insn == 0)
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if (insn == 0)
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@ -101,7 +101,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
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err |= __put_user(cpc, &fr->epc);
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err |= __put_user(cpc, &fr->epc);
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if (unlikely(err)) {
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if (unlikely(err)) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return SIGBUS;
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return SIGBUS;
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}
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}
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@ -138,7 +138,7 @@ int do_dsemulret(struct pt_regs *xcp)
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err |= __get_user(cookie, &fr->cookie);
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err |= __get_user(cookie, &fr->cookie);
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if (unlikely(err || (insn != BADINST) || (cookie != BD_COOKIE))) {
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if (unlikely(err || (insn != BADINST) || (cookie != BD_COOKIE))) {
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fpuemuprivate.stats.errors++;
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fpuemustats.errors++;
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return 0;
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return 0;
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}
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}
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@ -23,17 +23,15 @@
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#ifndef _ASM_FPU_EMULATOR_H
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#ifndef _ASM_FPU_EMULATOR_H
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#define _ASM_FPU_EMULATOR_H
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#define _ASM_FPU_EMULATOR_H
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struct mips_fpu_emulator_private {
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struct mips_fpu_emulator_stats {
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struct {
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unsigned int emulated;
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unsigned int emulated;
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unsigned int loads;
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unsigned int loads;
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unsigned int stores;
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unsigned int stores;
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unsigned int cp1ops;
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unsigned int cp1ops;
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unsigned int cp1xops;
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unsigned int cp1xops;
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unsigned int errors;
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unsigned int errors;
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} stats;
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};
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};
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extern struct mips_fpu_emulator_private fpuemuprivate;
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extern struct mips_fpu_emulator_stats fpuemustats;
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#endif /* _ASM_FPU_EMULATOR_H */
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#endif /* _ASM_FPU_EMULATOR_H */
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