ARM: OMAP: Add core fsample support
This patch adds core support for the TI F-Sample Board (OMAP 850). Signed-off-by: Brian Swetland <swetland@google.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
parent
ffb7a80f93
commit
495f71db30
9 changed files with 403 additions and 8 deletions
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@ -62,6 +62,13 @@ config MACH_OMAP_PERSEUS2
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Support for TI OMAP 730 Perseus2 board. Say Y here if you have such
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a board.
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config MACH_OMAP_FSAMPLE
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bool "TI F-Sample"
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depends on ARCH_OMAP1 && ARCH_OMAP730
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help
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Support for TI OMAP 850 F-Sample board. Say Y here if you have such
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a board.
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config MACH_VOICEBLUE
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bool "Voiceblue"
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depends on ARCH_OMAP1 && ARCH_OMAP15XX
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@ -17,6 +17,7 @@ obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o
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obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o
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obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
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obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o
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obj-$(CONFIG_MACH_OMAP_FSAMPLE) += board-fsample.o
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obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o
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obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o
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obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o
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319
arch/arm/mach-omap1/board-fsample.c
Normal file
319
arch/arm/mach-omap1/board-fsample.c
Normal file
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@ -0,0 +1,319 @@
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/*
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* linux/arch/arm/mach-omap1/board-fsample.c
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*
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* Modified from board-perseus2.c
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*
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* Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
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* Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/input.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/map.h>
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#include <asm/arch/tc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/fpga.h>
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#include <asm/arch/keypad.h>
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#include <asm/arch/common.h>
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#include <asm/arch/board.h>
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#include <asm/arch/board-fsample.h>
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static int fsample_keymap[] = {
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KEY(0,0,KEY_UP),
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KEY(0,1,KEY_RIGHT),
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KEY(0,2,KEY_LEFT),
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KEY(0,3,KEY_DOWN),
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KEY(0,4,KEY_CENTER),
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KEY(0,5,KEY_0_5),
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KEY(1,0,KEY_SOFT2),
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KEY(1,1,KEY_SEND),
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KEY(1,2,KEY_END),
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KEY(1,3,KEY_VOLUMEDOWN),
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KEY(1,4,KEY_VOLUMEUP),
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KEY(1,5,KEY_RECORD),
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KEY(2,0,KEY_SOFT1),
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KEY(2,1,KEY_3),
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KEY(2,2,KEY_6),
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KEY(2,3,KEY_9),
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KEY(2,4,KEY_SHARP),
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KEY(2,5,KEY_2_5),
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KEY(3,0,KEY_BACK),
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KEY(3,1,KEY_2),
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KEY(3,2,KEY_5),
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KEY(3,3,KEY_8),
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KEY(3,4,KEY_0),
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KEY(3,5,KEY_HEADSETHOOK),
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KEY(4,0,KEY_HOME),
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KEY(4,1,KEY_1),
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KEY(4,2,KEY_4),
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KEY(4,3,KEY_7),
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KEY(4,4,KEY_STAR),
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KEY(4,5,KEY_POWER),
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0
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};
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
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.end = H2P2_DBG_FPGA_ETHR_START + 0xf,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_730_MPU_EXT_NIRQ,
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.end = 0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mtd_partition nor_partitions[] = {
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/* bootloader (U-Boot, etc) in first sector */
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{
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.name = "bootloader",
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.offset = 0,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* bootloader params in the next sector */
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{
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_128K,
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.mask_flags = 0,
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},
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/* kernel */
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_2M,
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.mask_flags = 0
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},
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/* rest of flash is a file system */
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{
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.name = "rootfs",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0
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},
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};
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static struct flash_platform_data nor_data = {
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.map_name = "cfi_probe",
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.width = 2,
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.parts = nor_partitions,
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.nr_parts = ARRAY_SIZE(nor_partitions),
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};
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static struct resource nor_resource = {
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.start = OMAP_CS0_PHYS,
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.end = OMAP_CS0_PHYS + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device nor_device = {
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.name = "omapflash",
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.id = 0,
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.dev = {
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.platform_data = &nor_data,
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},
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.num_resources = 1,
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.resource = &nor_resource,
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};
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static struct nand_platform_data nand_data = {
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.options = NAND_SAMSUNG_LP_OPTIONS,
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};
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static struct resource nand_resource = {
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.start = OMAP_CS3_PHYS,
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.end = OMAP_CS3_PHYS + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device nand_device = {
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.name = "omapnand",
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.id = 0,
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.dev = {
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.platform_data = &nand_data,
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},
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.num_resources = 1,
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.resource = &nand_resource,
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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static struct resource kp_resources[] = {
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[0] = {
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.start = INT_730_MPUIO_KEYPAD,
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.end = INT_730_MPUIO_KEYPAD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_kp_platform_data kp_data = {
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.rows = 8,
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.cols = 8,
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.keymap = fsample_keymap,
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};
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static struct platform_device kp_device = {
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.name = "omap-keypad",
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.id = -1,
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.dev = {
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.platform_data = &kp_data,
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},
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.num_resources = ARRAY_SIZE(kp_resources),
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.resource = kp_resources,
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};
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static struct platform_device lcd_device = {
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.name = "lcd_p2",
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.id = -1,
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};
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static struct platform_device *devices[] __initdata = {
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&nor_device,
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&nand_device,
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&smc91x_device,
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&kp_device,
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&lcd_device,
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};
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#define P2_NAND_RB_GPIO_PIN 62
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static int nand_dev_ready(struct nand_platform_data *data)
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{
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return omap_get_gpio_datain(P2_NAND_RB_GPIO_PIN);
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}
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static struct omap_uart_config fsample_uart_config __initdata = {
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.enabled_uarts = ((1 << 0) | (1 << 1)),
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};
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static struct omap_lcd_config fsample_lcd_config __initdata = {
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.ctrl_name = "internal",
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};
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static struct omap_board_config_kernel fsample_config[] = {
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{ OMAP_TAG_UART, &fsample_uart_config },
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{ OMAP_TAG_LCD, &fsample_lcd_config },
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};
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static void __init omap_fsample_init(void)
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{
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if (!(omap_request_gpio(P2_NAND_RB_GPIO_PIN)))
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nand_data.dev_ready = nand_dev_ready;
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omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
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omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
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platform_add_devices(devices, ARRAY_SIZE(devices));
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omap_board_config = fsample_config;
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omap_board_config_size = ARRAY_SIZE(fsample_config);
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omap_serial_init();
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}
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static void __init fsample_init_smc91x(void)
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{
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fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
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mdelay(50);
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fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
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H2P2_DBG_FPGA_LAN_RESET);
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mdelay(50);
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}
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void omap_fsample_init_irq(void)
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{
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omap1_init_common_hw();
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omap_init_irq();
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omap_gpio_init();
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fsample_init_smc91x();
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}
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/* Only FPGA needs to be mapped here. All others are done with ioremap */
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static struct map_desc omap_fsample_io_desc[] __initdata = {
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{
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.virtual = H2P2_DBG_FPGA_BASE,
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.pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
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.length = H2P2_DBG_FPGA_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = FSAMPLE_CPLD_BASE,
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.pfn = __phys_to_pfn(FSAMPLE_CPLD_START),
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.length = FSAMPLE_CPLD_SIZE,
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.type = MT_DEVICE
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}
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};
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static void __init omap_fsample_map_io(void)
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{
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omap1_map_common_io();
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iotable_init(omap_fsample_io_desc,
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ARRAY_SIZE(omap_fsample_io_desc));
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/* Early, board-dependent init */
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/*
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* Hold GSM Reset until needed
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*/
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omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);
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/*
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* UARTs -> done automagically by 8250 driver
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*/
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/*
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* CSx timings, GPIO Mux ... setup
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*/
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/* Flash: CS0 timings setup */
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omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
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omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
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/*
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* Ethernet support through the debug board
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* CS1 timings setup
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*/
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omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
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omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);
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/*
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* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
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* It is used as the Ethernet controller interrupt
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*/
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omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
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}
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MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
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/* Maintainer: Brian Swetland <swetland@google.com> */
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.phys_io = 0xfff00000,
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.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
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.boot_params = 0x10000100,
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.map_io = omap_fsample_map_io,
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.init_irq = omap_fsample_init_irq,
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.init_machine = omap_fsample_init,
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.timer = &omap_timer,
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MACHINE_END
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@ -1,3 +1,4 @@
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//kernel/linux-omap-fsample/arch/arm/mach-omap1/clock.c#2 - edit change 3808 (text)
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/*
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* linux/arch/arm/mach-omap1/clock.c
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*
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@ -20,6 +21,7 @@
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/usb.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sram.h>
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@ -270,8 +272,12 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
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/*
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* In most cases we should not need to reprogram DPLL.
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* Reprogramming the DPLL is tricky, it must be done from SRAM.
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* (on 730, bit 13 must always be 1)
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*/
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omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
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if (cpu_is_omap730())
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omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000);
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else
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omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
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ck_dpll1.rate = ptr->pll_rate;
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propagate_rate(&ck_dpll1);
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@ -748,7 +754,7 @@ int __init omap1_clk_init(void)
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printk(KERN_ERR "System frequencies not set. Check your config.\n");
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/* Guess sane values (60MHz) */
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omap_writew(0x2290, DPLL_CTL);
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omap_writew(0x1005, ARM_CKCTL);
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omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL);
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ck_dpll1.rate = 60000000;
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propagate_rate(&ck_dpll1);
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}
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@ -761,13 +767,17 @@ int __init omap1_clk_init(void)
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ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
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arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
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#ifdef CONFIG_MACH_OMAP_PERSEUS2
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#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
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/* Select slicer output as OMAP input clock */
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omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
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#endif
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/* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
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omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);
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/* (on 730, bit 13 must not be cleared) */
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if (cpu_is_omap730())
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omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL);
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else
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omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);
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/* Put DSP/MPUI into reset until needed */
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omap_writew(0, ARM_RSTCT1);
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@ -1,3 +1,4 @@
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//kernel/linux-omap-fsample/arch/arm/mach-omap1/pm.c#3 - integrate change 4545 (text)
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/*
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* linux/arch/arm/mach-omap1/pm.c
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*
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@ -50,6 +51,7 @@
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#include <asm/mach/irq.h>
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#include <asm/mach-types.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/irqs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sram.h>
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@ -326,8 +328,9 @@ void omap_pm_suspend(void)
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/* stop DSP */
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omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1);
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/* shut down dsp_ck */
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omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL);
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/* shut down dsp_ck */
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if (!cpu_is_omap730())
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omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL);
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/* temporarily enabling api_ck to access DSP registers */
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omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2);
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@ -94,7 +94,7 @@ static inline unsigned long long cycles_2_ns(unsigned long long cyc)
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* will break. On P2, the timer count rate is 6.5 MHz after programming PTV
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* with 0. This divides the 13MHz input by 2, and is undocumented.
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*/
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#ifdef CONFIG_MACH_OMAP_PERSEUS2
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#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
|
||||
/* REVISIT: This ifdef construct should be replaced by a query to clock
|
||||
* framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz.
|
||||
*/
|
||||
|
|
|
@ -105,7 +105,7 @@ static void omap_init_kp(void)
|
|||
omap_cfg_reg(E20_1610_KBR3);
|
||||
omap_cfg_reg(E19_1610_KBR4);
|
||||
omap_cfg_reg(N19_1610_KBR5);
|
||||
} else if (machine_is_omap_perseus2()) {
|
||||
} else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
|
||||
omap_cfg_reg(E2_730_KBR0);
|
||||
omap_cfg_reg(J7_730_KBR1);
|
||||
omap_cfg_reg(E1_730_KBR2);
|
||||
|
|
51
include/asm-arm/arch-omap/board-fsample.h
Normal file
51
include/asm-arm/arch-omap/board-fsample.h
Normal file
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-omap/board-fsample.h
|
||||
*
|
||||
* Board-specific goodies for TI F-Sample.
|
||||
*
|
||||
* Copyright (C) 2006 Google, Inc.
|
||||
* Author: Brian Swetland <swetland@google.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_OMAP_FSAMPLE_H
|
||||
#define __ASM_ARCH_OMAP_FSAMPLE_H
|
||||
|
||||
/* fsample is pretty close to p2-sample */
|
||||
#include <asm/arch/board-perseus2.h>
|
||||
|
||||
#define fsample_cpld_read(reg) __raw_readb(reg)
|
||||
#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
|
||||
|
||||
#define FSAMPLE_CPLD_BASE 0xE8100000
|
||||
#define FSAMPLE_CPLD_SIZE SZ_4K
|
||||
#define FSAMPLE_CPLD_START 0x05080000
|
||||
|
||||
#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
|
||||
#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
|
||||
#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
|
||||
#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
|
||||
#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
|
||||
#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
|
||||
|
||||
#define FSAMPLE_CPLD_BIT_BT_RESET 0
|
||||
#define FSAMPLE_CPLD_BIT_LCD_RESET 1
|
||||
#define FSAMPLE_CPLD_BIT_CAM_PWDN 2
|
||||
#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
|
||||
#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
|
||||
#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
|
||||
#define FSAMPLE_CPLD_BIT_BACKLIGHT 6
|
||||
#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
|
||||
#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
|
||||
#define FSAMPLE_CPLD_BIT_OTG_RESET 9
|
||||
|
||||
#define fsample_cpld_set(bit) \
|
||||
fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
|
||||
|
||||
#define fsample_cpld_clear(bit) \
|
||||
fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
|
||||
|
||||
#endif
|
|
@ -297,6 +297,10 @@
|
|||
#include "board-perseus2.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MACH_OMAP_FSAMPLE
|
||||
#include "board-fsample.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MACH_OMAP_H3
|
||||
#include "board-h3.h"
|
||||
#endif
|
||||
|
|
Loading…
Reference in a new issue