thermal: exynos: Add the support for Exynos5433 TMU
This patch adds the support for Exynos5433's TMU (Thermal Management Unit). Exynos5433 has a little different register bit fields as following description: - Support the eight trip points for rising/falling interrupt by using two registers - Read the calibration type (1-point or 2-point) and sensor id from TRIMINFO register - Use a little different register address Cc: Zhang Rui <rui.zhang@intel.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
This commit is contained in:
Chanwoo Choi
Eduardo Valentin
parent
dd658e0235
commit
488c7455d7
2 changed files with 186 additions and 2 deletions
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@ -97,6 +97,32 @@
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#define EXYNOS4412_MUX_ADDR_VALUE 6
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#define EXYNOS4412_MUX_ADDR_SHIFT 20
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/* Exynos5433 specific registers */
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#define EXYNOS5433_TMU_REG_CONTROL1 0x024
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#define EXYNOS5433_TMU_SAMPLING_INTERVAL 0x02c
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#define EXYNOS5433_TMU_COUNTER_VALUE0 0x030
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#define EXYNOS5433_TMU_COUNTER_VALUE1 0x034
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#define EXYNOS5433_TMU_REG_CURRENT_TEMP1 0x044
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#define EXYNOS5433_THD_TEMP_RISE3_0 0x050
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#define EXYNOS5433_THD_TEMP_RISE7_4 0x054
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#define EXYNOS5433_THD_TEMP_FALL3_0 0x060
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#define EXYNOS5433_THD_TEMP_FALL7_4 0x064
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#define EXYNOS5433_TMU_REG_INTEN 0x0c0
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#define EXYNOS5433_TMU_REG_INTPEND 0x0c8
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#define EXYNOS5433_TMU_EMUL_CON 0x110
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#define EXYNOS5433_TMU_PD_DET_EN 0x130
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#define EXYNOS5433_TRIMINFO_SENSOR_ID_SHIFT 16
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#define EXYNOS5433_TRIMINFO_CALIB_SEL_SHIFT 23
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#define EXYNOS5433_TRIMINFO_SENSOR_ID_MASK \
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(0xf << EXYNOS5433_TRIMINFO_SENSOR_ID_SHIFT)
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#define EXYNOS5433_TRIMINFO_CALIB_SEL_MASK BIT(23)
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#define EXYNOS5433_TRIMINFO_ONE_POINT_TRIMMING 0
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#define EXYNOS5433_TRIMINFO_TWO_POINT_TRIMMING 1
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#define EXYNOS5433_PD_DET_EN 1
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/*exynos5440 specific registers*/
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#define EXYNOS5440_TMU_S0_7_TRIM 0x000
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#define EXYNOS5440_TMU_S0_7_CTRL 0x020
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@ -484,6 +510,101 @@ static int exynos4412_tmu_initialize(struct platform_device *pdev)
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return ret;
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}
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static int exynos5433_tmu_initialize(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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struct exynos_tmu_platform_data *pdata = data->pdata;
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struct thermal_zone_device *tz = data->tzd;
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unsigned int status, trim_info;
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unsigned int rising_threshold = 0, falling_threshold = 0;
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unsigned long temp, temp_hist;
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int ret = 0, threshold_code, i, sensor_id, cal_type;
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status = readb(data->base + EXYNOS_TMU_REG_STATUS);
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if (!status) {
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ret = -EBUSY;
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goto out;
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}
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trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
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sanitize_temp_error(data, trim_info);
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/* Read the temperature sensor id */
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sensor_id = (trim_info & EXYNOS5433_TRIMINFO_SENSOR_ID_MASK)
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>> EXYNOS5433_TRIMINFO_SENSOR_ID_SHIFT;
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dev_info(&pdev->dev, "Temperature sensor ID: 0x%x\n", sensor_id);
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/* Read the calibration mode */
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writel(trim_info, data->base + EXYNOS_TMU_REG_TRIMINFO);
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cal_type = (trim_info & EXYNOS5433_TRIMINFO_CALIB_SEL_MASK)
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>> EXYNOS5433_TRIMINFO_CALIB_SEL_SHIFT;
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switch (cal_type) {
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case EXYNOS5433_TRIMINFO_ONE_POINT_TRIMMING:
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pdata->cal_type = TYPE_ONE_POINT_TRIMMING;
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break;
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case EXYNOS5433_TRIMINFO_TWO_POINT_TRIMMING:
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pdata->cal_type = TYPE_TWO_POINT_TRIMMING;
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break;
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default:
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pdata->cal_type = TYPE_ONE_POINT_TRIMMING;
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break;
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};
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dev_info(&pdev->dev, "Calibration type is %d-point calibration\n",
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cal_type ? 2 : 1);
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/* Write temperature code for rising and falling threshold */
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for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
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int rising_reg_offset, falling_reg_offset;
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int j = 0;
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switch (i) {
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case 0:
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case 1:
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case 2:
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case 3:
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rising_reg_offset = EXYNOS5433_THD_TEMP_RISE3_0;
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falling_reg_offset = EXYNOS5433_THD_TEMP_FALL3_0;
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j = i;
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break;
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case 4:
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case 5:
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case 6:
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case 7:
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rising_reg_offset = EXYNOS5433_THD_TEMP_RISE7_4;
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falling_reg_offset = EXYNOS5433_THD_TEMP_FALL7_4;
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j = i - 4;
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break;
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default:
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continue;
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}
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/* Write temperature code for rising threshold */
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tz->ops->get_trip_temp(tz, i, &temp);
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temp /= MCELSIUS;
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threshold_code = temp_to_code(data, temp);
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rising_threshold = readl(data->base + rising_reg_offset);
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rising_threshold |= (threshold_code << j * 8);
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writel(rising_threshold, data->base + rising_reg_offset);
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/* Write temperature code for falling threshold */
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tz->ops->get_trip_hyst(tz, i, &temp_hist);
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temp_hist = temp - (temp_hist / MCELSIUS);
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threshold_code = temp_to_code(data, temp_hist);
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falling_threshold = readl(data->base + falling_reg_offset);
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falling_threshold &= ~(0xff << j * 8);
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falling_threshold |= (threshold_code << j * 8);
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writel(falling_threshold, data->base + falling_reg_offset);
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}
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data->tmu_clear_irqs(data);
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out:
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return ret;
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}
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static int exynos5440_tmu_initialize(struct platform_device *pdev)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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@ -643,6 +764,48 @@ static void exynos4210_tmu_control(struct platform_device *pdev, bool on)
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writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
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}
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static void exynos5433_tmu_control(struct platform_device *pdev, bool on)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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struct thermal_zone_device *tz = data->tzd;
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unsigned int con, interrupt_en, pd_det_en;
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con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
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if (on) {
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con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
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interrupt_en =
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(of_thermal_is_trip_valid(tz, 7)
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<< EXYNOS7_TMU_INTEN_RISE7_SHIFT) |
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(of_thermal_is_trip_valid(tz, 6)
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<< EXYNOS7_TMU_INTEN_RISE6_SHIFT) |
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(of_thermal_is_trip_valid(tz, 5)
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<< EXYNOS7_TMU_INTEN_RISE5_SHIFT) |
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(of_thermal_is_trip_valid(tz, 4)
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<< EXYNOS7_TMU_INTEN_RISE4_SHIFT) |
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(of_thermal_is_trip_valid(tz, 3)
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<< EXYNOS7_TMU_INTEN_RISE3_SHIFT) |
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(of_thermal_is_trip_valid(tz, 2)
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<< EXYNOS7_TMU_INTEN_RISE2_SHIFT) |
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(of_thermal_is_trip_valid(tz, 1)
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<< EXYNOS7_TMU_INTEN_RISE1_SHIFT) |
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(of_thermal_is_trip_valid(tz, 0)
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<< EXYNOS7_TMU_INTEN_RISE0_SHIFT);
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interrupt_en |=
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interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
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} else {
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con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
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interrupt_en = 0; /* Disable all interrupts */
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}
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pd_det_en = on ? EXYNOS5433_PD_DET_EN : 0;
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writel(pd_det_en, data->base + EXYNOS5433_TMU_PD_DET_EN);
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writel(interrupt_en, data->base + EXYNOS5433_TMU_REG_INTEN);
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writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
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}
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static void exynos5440_tmu_control(struct platform_device *pdev, bool on)
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{
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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@ -770,6 +933,8 @@ static void exynos4412_tmu_set_emulation(struct exynos_tmu_data *data,
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if (data->soc == SOC_ARCH_EXYNOS5260)
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emul_con = EXYNOS5260_EMUL_CON;
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if (data->soc == SOC_ARCH_EXYNOS5433)
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emul_con = EXYNOS5433_TMU_EMUL_CON;
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else if (data->soc == SOC_ARCH_EXYNOS7)
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emul_con = EXYNOS7_TMU_REG_EMUL_CON;
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else
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@ -882,6 +1047,9 @@ static void exynos4210_tmu_clear_irqs(struct exynos_tmu_data *data)
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} else if (data->soc == SOC_ARCH_EXYNOS7) {
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tmu_intstat = EXYNOS7_TMU_REG_INTPEND;
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tmu_intclear = EXYNOS7_TMU_REG_INTPEND;
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} else if (data->soc == SOC_ARCH_EXYNOS5433) {
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tmu_intstat = EXYNOS5433_TMU_REG_INTPEND;
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tmu_intclear = EXYNOS5433_TMU_REG_INTPEND;
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} else {
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tmu_intstat = EXYNOS_TMU_REG_INTSTAT;
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tmu_intclear = EXYNOS_TMU_REG_INTCLEAR;
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@ -926,6 +1094,7 @@ static const struct of_device_id exynos_tmu_match[] = {
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{ .compatible = "samsung,exynos5260-tmu", },
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{ .compatible = "samsung,exynos5420-tmu", },
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{ .compatible = "samsung,exynos5420-tmu-ext-triminfo", },
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{ .compatible = "samsung,exynos5433-tmu", },
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{ .compatible = "samsung,exynos5440-tmu", },
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{ .compatible = "samsung,exynos7-tmu", },
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{ /* sentinel */ },
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@ -949,6 +1118,8 @@ static int exynos_of_get_soc_type(struct device_node *np)
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else if (of_device_is_compatible(np,
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"samsung,exynos5420-tmu-ext-triminfo"))
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return SOC_ARCH_EXYNOS5420_TRIMINFO;
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else if (of_device_is_compatible(np, "samsung,exynos5433-tmu"))
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return SOC_ARCH_EXYNOS5433;
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else if (of_device_is_compatible(np, "samsung,exynos5440-tmu"))
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return SOC_ARCH_EXYNOS5440;
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else if (of_device_is_compatible(np, "samsung,exynos7-tmu"))
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@ -1069,6 +1240,13 @@ static int exynos_map_dt_data(struct platform_device *pdev)
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data->tmu_set_emulation = exynos4412_tmu_set_emulation;
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data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
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break;
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case SOC_ARCH_EXYNOS5433:
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data->tmu_initialize = exynos5433_tmu_initialize;
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data->tmu_control = exynos5433_tmu_control;
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data->tmu_read = exynos4412_tmu_read;
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data->tmu_set_emulation = exynos4412_tmu_set_emulation;
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data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
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break;
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case SOC_ARCH_EXYNOS5440:
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data->tmu_initialize = exynos5440_tmu_initialize;
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data->tmu_control = exynos5440_tmu_control;
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@ -1172,7 +1350,9 @@ static int exynos_tmu_probe(struct platform_device *pdev)
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goto err_clk_sec;
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}
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if (data->soc == SOC_ARCH_EXYNOS7) {
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switch (data->soc) {
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case SOC_ARCH_EXYNOS5433:
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case SOC_ARCH_EXYNOS7:
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data->sclk = devm_clk_get(&pdev->dev, "tmu_sclk");
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if (IS_ERR(data->sclk)) {
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dev_err(&pdev->dev, "Failed to get sclk\n");
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@ -1184,7 +1364,10 @@ static int exynos_tmu_probe(struct platform_device *pdev)
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goto err_clk;
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}
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}
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}
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break;
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default:
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break;
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};
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ret = exynos_tmu_initialize(pdev);
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if (ret) {
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@ -33,6 +33,7 @@ enum soc_type {
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SOC_ARCH_EXYNOS5260,
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SOC_ARCH_EXYNOS5420,
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SOC_ARCH_EXYNOS5420_TRIMINFO,
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SOC_ARCH_EXYNOS5433,
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SOC_ARCH_EXYNOS5440,
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SOC_ARCH_EXYNOS7,
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};
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